| /external/vixl/test/aarch32/config/ |
| D | rd-rn-rm.json | 32 "Crc32b", // CRC32B{<q>} <Rd>, <Rn>, <Rm> ; A1
33 // CRC32B{<q>} <Rd>, <Rn>, <Rm> ; T1
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| /external/vixl/src/aarch64/ |
| D | cpu-features-auditor-aarch64.cc | 294 case CRC32B: in VisitDataProcessing2Source()
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| D | constants-aarch64.h | 1472 CRC32B = DataProcessing2SourceFixed | 0x00004000, enumerator
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| D | assembler-aarch64.cc | 829 Emit(SF(wm) | Rm(wm) | CRC32B | Rn(wn) | Rd(wd)); in crc32b()
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| D | simulator-aarch64.cc | 5349 case CRC32B: { in VisitDataProcessing2Source()
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| /external/capstone/arch/ARM/ |
| D | ARMGenAsmWriter.inc | 108 33706710U, // CRC32B
2912 1048U, // CRC32B
6121 // AESD, AESE, AESIMC, AESMC, BKPT, BL, BLX, BLXi, BX, CPS1p, CRC32B, CRC...
6256 // AESD, AESE, AESIMC, AESMC, CRC32B, CRC32CB, CRC32CH, CRC32CW, CRC32H, ...
6742 // AESIMC, AESMC, CRC32B, CRC32CB, CRC32CH, CRC32CW, CRC32H, CRC32W, FLDM...
7272 // BFI, CPS3p, CRC32B, CRC32CB, CRC32CH, CRC32CW, CRC32H, CRC32W, MOVTi16...
7673 // CLZ, CMNzrr, CMPrr, CPS3p, CRC32B, CRC32CB, CRC32CH, CRC32CW, CRC32H, ...
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| D | ARMGenInstrInfo.inc | 3299 { 91, 3, 1, 0, 4, 0, 0xd00ULL, nullptr, nullptr, OperandInfo47,0,nullptr }, // Inst #91 = CRC32B
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| D | ARMGenDisassemblerTables.inc | 134 /* 416 */ MCD_OPC_Decode, 91, 8, // Opcode: CRC32B
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/ |
| D | Mips32r6InstrInfo.td | 974 def CRC32B : R6MMR6Rel, CRC32B_ENC, CRC32B_DESC, ISA_MIPS32R6, ASE_CRC;
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| D | MipsScheduleGeneric.td | 707 def : InstRW<[GenericWriteALU], (instrs CRC32B, CRC32H, CRC32W, CRC32CB,
|
| /external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/ARM/ |
| D | ARMGenAsmWriter.inc | 1356 741959275U, // CRC32B
5580 17920U, // CRC32B
9221 // AESD, AESE, AESIMC, AESMC, BKPT, BL, BLX, BLXi, BX, CPS1p, CRC32B, CRC...
9428 // AESD, AESE, AESIMC, AESMC, CRC32B, CRC32CB, CRC32CH, CRC32CW, CRC32H, ...
9961 // AESIMC, AESMC, CRC32B, CRC32CB, CRC32CH, CRC32CW, CRC32H, CRC32W, FLDM...
10543 // BFI, CPS3p, CRC32B, CRC32CB, CRC32CH, CRC32CW, CRC32H, CRC32W, MOVTi16...
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| D | ARMGenMCCodeEmitter.inc | 664 UINT64_C(3774873664), // CRC32B
6207 case ARM::CRC32B:
17339 CEFBS_IsARM_HasV8_HasCRC, // CRC32B = 651
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| D | ARMGenInstrInfo.inc | 666 CRC32B = 651,
6497 … 3, 1, 4, 698, 0, 0xd00ULL, nullptr, nullptr, OperandInfo144, -1 ,nullptr }, // Inst #651 = CRC32B
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| D | ARMGenAsmMatcher.inc | 10449 …{ 190 /* crc32b */, ARM::CRC32B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsARM_HasV8_HasCRC, { MCK_…
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| D | ARMGenGlobalISel.inc | 15614 …07:{ *:[iPTR] }, GPRnopc:{ *:[i32] }:$Rn, GPRnopc:{ *:[i32] }:$Rm) => (CRC32B:{ *:[i32] } GPRnop…
15615 GIR_BuildMI, /*InsnID*/0, /*Opcode*/ARM::CRC32B,
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| /external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/Mips/ |
| D | MipsGenSubtargetInfo.inc | 1442 {DBGFIELD("CRC32B") 1, false, false, 1, 2, 1, 1, 0, 0}, // #1182
3126 {DBGFIELD("CRC32B") 16383, false, false, 0, 0, 0, 0, 0, 0}, // #1182
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| D | MipsGenMCCodeEmitter.inc | 1142 UINT64_C(2080374799), // CRC32B
6389 case Mips::CRC32B:
10604 CEFBS_HasStdEnc_HasMips32r6_HasCRC_NotInMicroMips, // CRC32B = 1129
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| D | MipsGenAsmWriter.inc | 2370 268453411U, // CRC32B
5124 0U, // CRC32B
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| D | MipsGenInstrInfo.inc | 1144 CRC32B = 1129,
3962 CRC32B = 1182,
5990 …odeledSideEffects), 0x6ULL, nullptr, nullptr, OperandInfo65, -1 ,nullptr }, // Inst #1129 = CRC32B
16624 { Mips::CRC32B, Mips::CRC32B, (uint16_t)-1U },
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| D | MipsGenDisassemblerTables.inc | 6606 /* 1818 */ MCD::OPC_Decode, 233, 8, 228, 2, // Opcode: CRC32B
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| D | MipsGenAsmMatcher.inc | 6235 …{ 2920 /* crc32b */, Mips::CRC32B, Convert__GPR32AsmReg1_0__GPR32AsmReg1_1__GPR32AsmReg1_2, AMFBS_…
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/AsmParser/ |
| D | MipsAsmParser.cpp | 5704 case Mips::CRC32B: case Mips::CRC32CB: in checkTargetMatchPredicate()
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| /external/llvm/lib/Target/ARM/ |
| D | ARMInstrInfo.td | 4328 def CRC32B : AI_crc32<0, 0b00, "b", int_arm_crc32b>;
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| D | ARMInstrInfo.td | 4649 def CRC32B : AI_crc32<0, 0b00, "b", int_arm_crc32b>;
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| /external/vixl/doc/aarch64/ |
| D | supported-instructions-aarch64.md | 637 ### CRC32B ### subsection
|