| /external/vixl/test/aarch32/config/ |
| D | rd-rn-rm.json | 36 "Crc32ch", // CRC32CH{<q>} <Rd>, <Rn>, <Rm> ; A1
37 // CRC32CH{<q>} <Rd>, <Rn>, <Rm> ; T1
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| /external/vixl/src/aarch64/ |
| D | cpu-features-auditor-aarch64.cc | 299 case CRC32CH: in VisitDataProcessing2Source()
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| D | constants-aarch64.h | 1477 CRC32CH = DataProcessing2SourceFixed | 0x00005400, enumerator
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| D | assembler-aarch64.cc | 874 Emit(SF(wm) | Rm(wm) | CRC32CH | Rn(wn) | Rd(wd)); in crc32ch()
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| D | simulator-aarch64.cc | 5380 case CRC32CH: { in VisitDataProcessing2Source()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/ |
| D | Mips32r6InstrInfo.td | 978 def CRC32CH : R6MMR6Rel, CRC32CH_ENC, CRC32CH_DESC, ISA_MIPS32R6, ASE_CRC;
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| D | MipsScheduleGeneric.td | 708 CRC32CH, CRC32CW)>;
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| /external/capstone/arch/ARM/ |
| D | ARMGenAsmWriter.inc | 110 33706787U, // CRC32CH
2914 1048U, // CRC32CH
6256 // AESD, AESE, AESIMC, AESMC, CRC32B, CRC32CB, CRC32CH, CRC32CW, CRC32H, ...
6742 // AESIMC, AESMC, CRC32B, CRC32CB, CRC32CH, CRC32CW, CRC32H, CRC32W, FLDM...
7272 // BFI, CPS3p, CRC32B, CRC32CB, CRC32CH, CRC32CW, CRC32H, CRC32W, MOVTi16...
7673 // CLZ, CMNzrr, CMPrr, CPS3p, CRC32B, CRC32CB, CRC32CH, CRC32CW, CRC32H, ...
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| D | ARMGenInstrInfo.inc | 3301 { 93, 3, 1, 0, 4, 0, 0xd00ULL, nullptr, nullptr, OperandInfo47,0,nullptr }, // Inst #93 = CRC32CH
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| D | ARMGenDisassemblerTables.inc | 479 /* 1879 */ MCD_OPC_Decode, 93, 8, // Opcode: CRC32CH
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| /external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/ARM/ |
| D | ARMGenAsmWriter.inc | 1358 741959375U, // CRC32CH
5582 17920U, // CRC32CH
9428 // AESD, AESE, AESIMC, AESMC, CRC32B, CRC32CB, CRC32CH, CRC32CW, CRC32H, ...
9961 // AESIMC, AESMC, CRC32B, CRC32CB, CRC32CH, CRC32CW, CRC32H, CRC32W, FLDM...
10543 // BFI, CPS3p, CRC32B, CRC32CB, CRC32CH, CRC32CW, CRC32H, CRC32W, MOVTi16...
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| D | ARMGenMCCodeEmitter.inc | 666 UINT64_C(3776971328), // CRC32CH
6209 case ARM::CRC32CH:
17341 CEFBS_IsARM_HasV8_HasCRC, // CRC32CH = 653
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| D | ARMGenInstrInfo.inc | 668 CRC32CH = 653,
6499 …3, 1, 4, 698, 0, 0xd00ULL, nullptr, nullptr, OperandInfo144, -1 ,nullptr }, // Inst #653 = CRC32CH
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| D | ARMGenAsmMatcher.inc | 10453 …{ 205 /* crc32ch */, ARM::CRC32CH, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsARM_HasV8_HasCRC, { MC…
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| D | ARMGenGlobalISel.inc | 15671 …09:{ *:[iPTR] }, GPRnopc:{ *:[i32] }:$Rn, GPRnopc:{ *:[i32] }:$Rm) => (CRC32CH:{ *:[i32] } GPRno…
15672 GIR_BuildMI, /*InsnID*/0, /*Opcode*/ARM::CRC32CH,
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| /external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/Mips/ |
| D | MipsGenSubtargetInfo.inc | 1446 {DBGFIELD("CRC32CH") 1, false, false, 1, 2, 1, 1, 0, 0}, // #1186
3130 {DBGFIELD("CRC32CH") 16383, false, false, 0, 0, 0, 0, 0, 0}, // #1186
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| D | MipsGenMCCodeEmitter.inc | 1145 UINT64_C(2080375119), // CRC32CH
6392 case Mips::CRC32CH:
10607 CEFBS_HasStdEnc_HasMips32r6_HasCRC_NotInMicroMips, // CRC32CH = 1132
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| D | MipsGenAsmWriter.inc | 2373 268457215U, // CRC32CH
5127 0U, // CRC32CH
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| D | MipsGenInstrInfo.inc | 1147 CRC32CH = 1132,
3966 CRC32CH = 1186,
5993 …deledSideEffects), 0x6ULL, nullptr, nullptr, OperandInfo65, -1 ,nullptr }, // Inst #1132 = CRC32CH
16627 { Mips::CRC32CH, Mips::CRC32CH, (uint16_t)-1U },
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| D | MipsGenDisassemblerTables.inc | 6621 /* 1893 */ MCD::OPC_Decode, 236, 8, 228, 2, // Opcode: CRC32CH
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| D | MipsGenAsmMatcher.inc | 6238 …{ 2943 /* crc32ch */, Mips::CRC32CH, Convert__GPR32AsmReg1_0__GPR32AsmReg1_1__GPR32AsmReg1_2, AMFB…
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/AsmParser/ |
| D | MipsAsmParser.cpp | 5705 case Mips::CRC32H: case Mips::CRC32CH: in checkTargetMatchPredicate()
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| /external/llvm/lib/Target/ARM/ |
| D | ARMInstrInfo.td | 4331 def CRC32CH : AI_crc32<1, 0b01, "ch", int_arm_crc32ch>;
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| D | ARMInstrInfo.td | 4652 def CRC32CH : AI_crc32<1, 0b01, "ch", int_arm_crc32ch>;
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| /external/vixl/doc/aarch64/ |
| D | supported-instructions-aarch64.md | 651 ### CRC32CH ### subsection
|