| /external/vixl/test/aarch32/config/ |
| D | rd-rn-rm.json | 40 "Crc32h", // CRC32H{<q>} <Rd>, <Rn>, <Rm> ; A1
41 // CRC32H{<q>} <Rd>, <Rn>, <Rm> ; T1
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| /external/vixl/src/aarch64/ |
| D | cpu-features-auditor-aarch64.cc | 295 case CRC32H: in VisitDataProcessing2Source()
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| D | constants-aarch64.h | 1473 CRC32H = DataProcessing2SourceFixed | 0x00004400, enumerator
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| D | assembler-aarch64.cc | 838 Emit(SF(wm) | Rm(wm) | CRC32H | Rn(wn) | Rd(wd)); in crc32h()
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| D | simulator-aarch64.cc | 5355 case CRC32H: { in VisitDataProcessing2Source()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/ |
| D | Mips32r6InstrInfo.td | 975 def CRC32H : R6MMR6Rel, CRC32H_ENC, CRC32H_DESC, ISA_MIPS32R6, ASE_CRC;
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| D | MipsScheduleGeneric.td | 707 def : InstRW<[GenericWriteALU], (instrs CRC32B, CRC32H, CRC32W, CRC32CB,
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| /external/capstone/arch/ARM/ |
| D | ARMGenAsmWriter.inc | 112 33706779U, // CRC32H
2916 1048U, // CRC32H
6256 // AESD, AESE, AESIMC, AESMC, CRC32B, CRC32CB, CRC32CH, CRC32CW, CRC32H, ...
6742 // AESIMC, AESMC, CRC32B, CRC32CB, CRC32CH, CRC32CW, CRC32H, CRC32W, FLDM...
7272 // BFI, CPS3p, CRC32B, CRC32CB, CRC32CH, CRC32CW, CRC32H, CRC32W, MOVTi16...
7673 // CLZ, CMNzrr, CMPrr, CPS3p, CRC32B, CRC32CB, CRC32CH, CRC32CW, CRC32H, ...
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| D | ARMGenInstrInfo.inc | 3303 { 95, 3, 1, 0, 4, 0, 0xd00ULL, nullptr, nullptr, OperandInfo47,0,nullptr }, // Inst #95 = CRC32H
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| D | ARMGenDisassemblerTables.inc | 473 /* 1852 */ MCD_OPC_Decode, 95, 8, // Opcode: CRC32H
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| /external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/ARM/ |
| D | ARMGenAsmWriter.inc | 1360 741959367U, // CRC32H
5584 17920U, // CRC32H
9428 // AESD, AESE, AESIMC, AESMC, CRC32B, CRC32CB, CRC32CH, CRC32CW, CRC32H, ...
9961 // AESIMC, AESMC, CRC32B, CRC32CB, CRC32CH, CRC32CW, CRC32H, CRC32W, FLDM...
10543 // BFI, CPS3p, CRC32B, CRC32CB, CRC32CH, CRC32CW, CRC32H, CRC32W, MOVTi16...
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| D | ARMGenMCCodeEmitter.inc | 668 UINT64_C(3776970816), // CRC32H
6211 case ARM::CRC32H:
17343 CEFBS_IsARM_HasV8_HasCRC, // CRC32H = 655
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| D | ARMGenInstrInfo.inc | 670 CRC32H = 655,
6501 … 3, 1, 4, 698, 0, 0xd00ULL, nullptr, nullptr, OperandInfo144, -1 ,nullptr }, // Inst #655 = CRC32H
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| D | ARMGenAsmMatcher.inc | 10457 …{ 221 /* crc32h */, ARM::CRC32H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsARM_HasV8_HasCRC, { MCK_…
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| D | ARMGenGlobalISel.inc | 15652 …11:{ *:[iPTR] }, GPRnopc:{ *:[i32] }:$Rn, GPRnopc:{ *:[i32] }:$Rm) => (CRC32H:{ *:[i32] } GPRnop…
15653 GIR_BuildMI, /*InsnID*/0, /*Opcode*/ARM::CRC32H,
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| /external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/Mips/ |
| D | MipsGenSubtargetInfo.inc | 1443 {DBGFIELD("CRC32H") 1, false, false, 1, 2, 1, 1, 0, 0}, // #1183
3127 {DBGFIELD("CRC32H") 16383, false, false, 0, 0, 0, 0, 0, 0}, // #1183
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| D | MipsGenMCCodeEmitter.inc | 1148 UINT64_C(2080374863), // CRC32H
6395 case Mips::CRC32H:
10610 CEFBS_HasStdEnc_HasMips32r6_HasCRC_NotInMicroMips, // CRC32H = 1135
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| D | MipsGenAsmWriter.inc | 2376 268457195U, // CRC32H
5130 0U, // CRC32H
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| D | MipsGenInstrInfo.inc | 1150 CRC32H = 1135,
3963 CRC32H = 1183,
5996 …odeledSideEffects), 0x6ULL, nullptr, nullptr, OperandInfo65, -1 ,nullptr }, // Inst #1135 = CRC32H
16630 { Mips::CRC32H, Mips::CRC32H, (uint16_t)-1U },
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| D | MipsGenDisassemblerTables.inc | 6609 /* 1833 */ MCD::OPC_Decode, 239, 8, 228, 2, // Opcode: CRC32H
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| D | MipsGenAsmMatcher.inc | 6241 …{ 2966 /* crc32h */, Mips::CRC32H, Convert__GPR32AsmReg1_0__GPR32AsmReg1_1__GPR32AsmReg1_2, AMFBS_…
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/AsmParser/ |
| D | MipsAsmParser.cpp | 5705 case Mips::CRC32H: case Mips::CRC32CH: in checkTargetMatchPredicate()
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| /external/llvm/lib/Target/ARM/ |
| D | ARMInstrInfo.td | 4330 def CRC32H : AI_crc32<0, 0b01, "h", int_arm_crc32h>;
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| D | ARMInstrInfo.td | 4651 def CRC32H : AI_crc32<0, 0b01, "h", int_arm_crc32h>;
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| /external/vixl/doc/aarch64/ |
| D | supported-instructions-aarch64.md | 672 ### CRC32H ### subsection
|