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Searched refs:ICC_HPPIR0_EL1 (Results 1 – 15 of 15) sorted by relevance

/external/arm-trusted-firmware/include/plat/arm/common/aarch64/
Darm_macros.S56 mrs x8, ICC_HPPIR0_EL1
/external/arm-trusted-firmware/plat/xilinx/versal/include/
Dplat_macros.S56 mrs x8, ICC_HPPIR0_EL1
/external/arm-trusted-firmware/plat/qti/common/inc/aarch64/
Dplat_macros.S65 mrs x8, ICC_HPPIR0_EL1
/external/arm-trusted-firmware/include/plat/marvell/armada/common/aarch64/
Dmarvell_macros.S64 mrs x8, ICC_HPPIR0_EL1
/external/arm-trusted-firmware/plat/rockchip/common/include/
Dplat_macros.S64 mrs x8, ICC_HPPIR0_EL1
/external/arm-trusted-firmware/include/arch/aarch64/
Darch_helpers.h484 DEFINE_RENAME_SYSREG_READ_FUNC(icc_hppir0_el1, ICC_HPPIR0_EL1) in DEFINE_SYSREG_READ_FUNC()
Darch.h91 #define ICC_HPPIR0_EL1 S3_0_c12_c8_2 macro
/external/OpenCSD/decoder/tests/snapshots/a55-test-tpiu/
Ddevice1.ini269 ICC_HPPIR0_EL1=0x000003FF key
/external/llvm/test/MC/Disassembler/AArch64/
Dgicv3-regs.txt11 # CHECK: mrs x17, {{icc_hppir0_el1|ICC_HPPIR0_EL1}}
/external/OpenCSD/decoder/tests/snapshots/a57_single_step/
Ddevice1.ini269 ICC_HPPIR0_EL1=0x000003FF key
/external/rust/crates/gdbstub_arch/src/aarch64/reg/
Did.rs342 pub const ICC_HPPIR0_EL1: Self = Self::System(0b11_000_1100_1000_010); constant
/external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/AArch64/
DAArch64GenSystemOperands.inc283 ICC_HPPIR0_EL1 = 50754,
2347 { "ICC_HPPIR0_EL1", 0xC642, true, false, {} }, // 93
3283 { "ICC_HPPIR0_EL1", 93 },
/external/llvm/lib/Target/AArch64/
DAArch64SystemOperands.td409 def : ROSysReg<"ICC_HPPIR0_EL1", 0b11, 0b000, 0b1100, 0b1000, 0b010>;
/external/arm-trusted-firmware/docs/getting_started/
Dporting-guide.rst2716 ``ICC_HPPIR0_EL1``, *Highest Priority Pending group 0 Interrupt Register*,
2749 EL3, the system register ``ICC_HPPIR0_EL1``, *Highest Priority Pending Interrupt
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/
DAArch64SystemOperands.td661 def : ROSysReg<"ICC_HPPIR0_EL1", 0b11, 0b000, 0b1100, 0b1000, 0b010>;