1/* 2 * Copyright (c) 2018, ARM Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7#ifndef PLAT_MACROS_S 8#define PLAT_MACROS_S 9 10#include <drivers/arm/gic_common.h> 11#include <drivers/arm/gicv2.h> 12#include <drivers/arm/gicv3.h> 13 14#include "../include/platform_def.h" 15 16.section .rodata.gic_reg_name, "aS" 17/* Applicable only to GICv2 and GICv3 with SRE disabled (legacy mode) */ 18gicc_regs: 19 .asciz "gicc_hppir", "gicc_ahppir", "gicc_ctlr", "" 20 21/* Applicable only to GICv3 with SRE enabled */ 22icc_regs: 23 .asciz "icc_hppir0_el1", "icc_hppir1_el1", "icc_ctlr_el3", "" 24 25/* Registers common to both GICv2 and GICv3 */ 26gicd_pend_reg: 27 .asciz "gicd_ispendr regs (Offsets 0x200 - 0x278)\n Offset:\t\t\tvalue\n" 28newline: 29 .asciz "\n" 30spacer: 31 .asciz ":\t\t0x" 32 33 /* --------------------------------------------- 34 * The below utility macro prints out relevant GIC 35 * registers whenever an unhandled exception is 36 * taken in BL31 on Versal platform. 37 * Expects: GICD base in x16, GICC base in x17 38 * Clobbers: x0 - x10, sp 39 * --------------------------------------------- 40 */ 41 .macro versal_print_gic_regs 42 /* Check for GICv3 system register access */ 43 mrs x7, id_aa64pfr0_el1 44 ubfx x7, x7, #ID_AA64PFR0_GIC_SHIFT, #ID_AA64PFR0_GIC_WIDTH 45 cmp x7, #1 46 b.ne print_gicv2 47 48 /* Check for SRE enable */ 49 mrs x8, ICC_SRE_EL3 50 tst x8, #ICC_SRE_SRE_BIT 51 b.eq print_gicv2 52 53 /* Load the icc reg list to x6 */ 54 adr x6, icc_regs 55 /* Load the icc regs to gp regs used by str_in_crash_buf_print */ 56 mrs x8, ICC_HPPIR0_EL1 57 mrs x9, ICC_HPPIR1_EL1 58 mrs x10, ICC_CTLR_EL3 59 /* Store to the crash buf and print to console */ 60 bl str_in_crash_buf_print 61 b print_gic_common 62 63print_gicv2: 64 /* Load the gicc reg list to x6 */ 65 adr x6, gicc_regs 66 /* Load the gicc regs to gp regs used by str_in_crash_buf_print */ 67 ldr w8, [x17, #GICC_HPPIR] 68 ldr w9, [x17, #GICC_AHPPIR] 69 ldr w10, [x17, #GICC_CTLR] 70 /* Store to the crash buf and print to console */ 71 bl str_in_crash_buf_print 72 73print_gic_common: 74 /* Print the GICD_ISPENDR regs */ 75 add x7, x16, #GICD_ISPENDR 76 adr x4, gicd_pend_reg 77 bl asm_print_str 78gicd_ispendr_loop: 79 sub x4, x7, x16 80 cmp x4, #0x280 81 b.eq exit_print_gic_regs 82 bl asm_print_hex 83 84 adr x4, spacer 85 bl asm_print_str 86 87 ldr x4, [x7], #8 88 bl asm_print_hex 89 90 adr x4, newline 91 bl asm_print_str 92 b gicd_ispendr_loop 93exit_print_gic_regs: 94 .endm 95 96 /* --------------------------------------------- 97 * The below required platform porting macro 98 * prints out relevant GIC and CCI registers 99 * whenever an unhandled exception is taken in 100 * BL31. 101 * Clobbers: x0 - x10, x16, x17, sp 102 * --------------------------------------------- 103 */ 104 .macro plat_crash_print_regs 105 mov_imm x17, PLAT_VERSAL_GICD_BASE 106 mov_imm x16, PLAT_VERSAL_GICR_BASE 107 versal_print_gic_regs 108 .endm 109 110#endif /* PLAT_MACROS_S */ 111