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/external/swiftshader/third_party/subzero/unittest/AssemblerX8632/
DGPRArith.cpp678 #define TestImplRegReg(Inst0, Inst1, Dst0, Dst1, Value0, Src0, Src1, Value1, \ in TEST_F() argument
684 "(" #Inst0 ", " #Inst1 ", " #Dst0 ", " #Dst1 ", " #Value0 ", " #Src0 \ in TEST_F()
694 __ Inst0(IceType_i##Size, GPRRegister::Encoded_Reg_##Dst0, \ in TEST_F()
711 #define TestImplRegAddr(Inst0, Inst1, Dst0, Dst1, Value0, Value1, Op, Size) \ in TEST_F() argument
716 "(" #Inst0 ", " #Inst1 ", " #Dst0 ", " #Dst1 ", " #Value0 \ in TEST_F()
726 __ Inst0(IceType_i##Size, GPRRegister::Encoded_Reg_##Dst0, \ in TEST_F()
745 #define TestImplRegImm(Inst0, Inst1, Dst0, Dst1, Value0, Imm, Op, Size) \ in TEST_F() argument
750 "(" #Inst0 ", " #Inst1 ", " #Dst0 ", " #Dst1 ", " #Value0 \ in TEST_F()
756 __ Inst0(IceType_i##Size, GPRRegister::Encoded_Reg_##Dst0, \ in TEST_F()
773 #define TestImplAddrReg(Inst0, Inst1, Value0, Src0, Src1, Value1, Op, Size) \ in TEST_F() argument
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/external/swiftshader/third_party/subzero/unittest/AssemblerX8664/
DGPRArith.cpp709 #define TestImplRegReg(Inst0, Inst1, Dst0, Dst1, Value0, Src0, Src1, Value1, \ in TEST_F() argument
715 "(" #Inst0 ", " #Inst1 ", " #Dst0 ", " #Dst1 ", " #Value0 ", " #Src0 \ in TEST_F()
725 __ Inst0(IceType_i##Size, Encoded_GPR_##Dst0(), Encoded_GPR_##Src0()); \ in TEST_F()
740 #define TestImplRegAddr(Inst0, Inst1, Dst0, Dst1, Value0, Value1, Op, Size) \ in TEST_F() argument
745 "(" #Inst0 ", " #Inst1 ", " #Dst0 ", " #Dst1 ", " #Value0 \ in TEST_F()
755 __ Inst0(IceType_i##Size, Encoded_GPR_##Dst0(), dwordAddress(T0)); \ in TEST_F()
772 #define TestImplRegImm(Inst0, Inst1, Dst0, Dst1, Value0, Imm, Op, Size) \ in TEST_F() argument
777 "(" #Inst0 ", " #Inst1 ", " #Dst0 ", " #Dst1 ", " #Value0 \ in TEST_F()
783 __ Inst0(IceType_i##Size, Encoded_GPR_##Dst0(), \ in TEST_F()
800 #define TestImplAddrReg(Inst0, Inst1, Value0, Src0, Src1, Value1, Op, Size) \ in TEST_F() argument
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/MCTargetDesc/
DHexagonShuffler.cpp400 MCInst const &Inst0 = *ID.getOperand(0).getInst(); in check() local
402 if (HexagonMCInstrInfo::getDesc(MCII, Inst0).isBranch()) in check()
406 if (HexagonMCInstrInfo::getDesc(MCII, Inst0).isReturn()) in check()