/external/llvm/include/llvm/CodeGen/ |
D | ISDOpcodes.h | 861 SETUEQ, // 1 0 0 1 True if unordered or equal enumerator
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/external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/ |
D | ISDOpcodes.h | 1058 SETUEQ, // 1 0 0 1 True if unordered or equal enumerator
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/external/llvm/lib/CodeGen/ |
D | Analysis.cpp | 173 case FCmpInst::FCMP_UEQ: return ISD::SETUEQ; in getFCmpCondCode() 186 case ISD::SETOEQ: case ISD::SETUEQ: return ISD::SETEQ; in getFCmpCodeWithoutNaN()
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/ |
D | Analysis.cpp | 212 case FCmpInst::FCMP_UEQ: return ISD::SETUEQ; in getFCmpCondCode() 225 case ISD::SETOEQ: case ISD::SETUEQ: return ISD::SETEQ; in getFCmpCodeWithoutNaN()
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/external/llvm/lib/Target/AMDGPU/ |
D | AMDGPUInstructions.td | 122 def COND_UEQ : PatLeaf <(cond), [{return N->get() == ISD::SETUEQ;}]>; 151 [{return N->get() == ISD::SETEQ || N->get() == ISD::SETUEQ;}]
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
D | SIInsertSkips.cpp | 225 case ISD::SETUEQ: in kill()
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D | AMDGPUInstructions.td | 257 def COND_UEQ : PatFrag<(ops), (OtherVT SETUEQ)>; 281 def COND_EQ : PatFrags<(ops), [(OtherVT SETEQ), (OtherVT SETUEQ)]>;
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D | R600ISelLowering.cpp | 133 setCondCodeAction(ISD::SETUEQ, MVT::f32, Expand); in R600TargetLowering()
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/external/llvm/lib/CodeGen/SelectionDAG/ |
D | SelectionDAGDumper.cpp | 340 case ISD::SETUEQ: return "setueq"; in getOperationName()
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D | TargetLowering.cpp | 216 case ISD::SETUEQ: in softenSetCCOperands() 1948 if (Cond == ISD::SETUEQ && in SimplifySetCC() 1961 if (Cond == ISD::SETUEQ && in SimplifySetCC()
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D | SelectionDAG.cpp | 326 case ISD::SETUEQ: Result = ISD::SETEQ ; break; // SETUGE & SETULE in getSetCCAndOperation() 1915 case ISD::SETUEQ: in FoldSetCC() 1975 case ISD::SETUEQ: return getConstant(R==APFloat::cmpUnordered || in FoldSetCC()
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/external/llvm/lib/Target/WebAssembly/ |
D | WebAssemblyISelLowering.cpp | 77 for (auto CC : {ISD::SETO, ISD::SETUO, ISD::SETUEQ, ISD::SETONE, in WebAssemblyTargetLowering()
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/ |
D | SelectionDAGDumper.cpp | 417 case ISD::SETUEQ: return "setueq"; in getOperationName()
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D | TargetLowering.cpp | 359 case ISD::SETUEQ: in softenSetCCOperands() 3795 if (Cond == ISD::SETUEQ && in SimplifySetCC() 3808 if (Cond == ISD::SETUEQ && in SimplifySetCC()
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARC/ |
D | ARCISelLowering.cpp | 43 case ISD::SETUEQ: in ISDCCtoARCCC()
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/external/llvm/lib/Target/PowerPC/ |
D | PPCISelDAGToDAG.cpp | 2091 case ISD::SETUEQ: in getPredicateForSetCC() 2138 case ISD::SETUEQ: in getCRIdxForSetCC() 2215 case ISD::SETUNE: CC = ISD::SETUEQ; Negate = true; break; in getVCmpInst() 2223 case ISD::SETUEQ: in getVCmpInst()
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D | PPCInstrQPX.td | 1004 def : Pat<(setcc v4f64:$FRA, v4f64:$FRB, SETUEQ), 1051 def : Pat<(setcc v4f32:$FRA, v4f32:$FRB, SETUEQ),
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/external/llvm/include/llvm/Target/ |
D | TargetSelectionDAG.td | 594 def SETUEQ : CondCode; def SETUGT : CondCode; def SETUGE : CondCode; 989 (setcc node:$lhs, node:$rhs, SETUEQ)>;
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/ |
D | PPCInstrQPX.td | 1001 def : Pat<(setcc v4f64:$FRA, v4f64:$FRB, SETUEQ), 1048 def : Pat<(setcc v4f32:$FRA, v4f32:$FRB, SETUEQ),
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D | PPCISelDAGToDAG.cpp | 3858 case ISD::SETUEQ: in getPredicateForSetCC() 3911 case ISD::SETUEQ: in getCRIdxForSetCC() 3988 case ISD::SETUNE: CC = ISD::SETUEQ; Negate = true; break; in getVCmpInst() 3996 case ISD::SETUEQ: in getVCmpInst()
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/external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/Target/ |
D | TargetSelectionDAG.td | 692 def SETUEQ : CondCode<"FCMP_UEQ">; 1291 (setcc node:$lhs, node:$rhs, SETUEQ)>;
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Lanai/ |
D | LanaiISelLowering.cpp | 857 case ISD::SETUEQ: in IntCondCCodeToICC()
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/external/llvm/lib/Target/Lanai/ |
D | LanaiISelLowering.cpp | 846 case ISD::SETUEQ: in IntCondCCodeToICC()
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/WebAssembly/ |
D | WebAssemblyISelLowering.cpp | 89 for (auto CC : {ISD::SETO, ISD::SETUO, ISD::SETUEQ, ISD::SETONE, in WebAssemblyTargetLowering()
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/external/llvm/lib/Target/NVPTX/ |
D | NVPTXVector.td | 966 (setcc node:$lhs, node:$rhs, SETUEQ)>;
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