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Searched refs:SETUEQ (Results 1 – 25 of 56) sorted by relevance

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/external/llvm/include/llvm/CodeGen/
DISDOpcodes.h861 SETUEQ, // 1 0 0 1 True if unordered or equal enumerator
/external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/
DISDOpcodes.h1058 SETUEQ, // 1 0 0 1 True if unordered or equal enumerator
/external/llvm/lib/CodeGen/
DAnalysis.cpp173 case FCmpInst::FCMP_UEQ: return ISD::SETUEQ; in getFCmpCondCode()
186 case ISD::SETOEQ: case ISD::SETUEQ: return ISD::SETEQ; in getFCmpCodeWithoutNaN()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/
DAnalysis.cpp212 case FCmpInst::FCMP_UEQ: return ISD::SETUEQ; in getFCmpCondCode()
225 case ISD::SETOEQ: case ISD::SETUEQ: return ISD::SETEQ; in getFCmpCodeWithoutNaN()
/external/llvm/lib/Target/AMDGPU/
DAMDGPUInstructions.td122 def COND_UEQ : PatLeaf <(cond), [{return N->get() == ISD::SETUEQ;}]>;
151 [{return N->get() == ISD::SETEQ || N->get() == ISD::SETUEQ;}]
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
DSIInsertSkips.cpp225 case ISD::SETUEQ: in kill()
DAMDGPUInstructions.td257 def COND_UEQ : PatFrag<(ops), (OtherVT SETUEQ)>;
281 def COND_EQ : PatFrags<(ops), [(OtherVT SETEQ), (OtherVT SETUEQ)]>;
DR600ISelLowering.cpp133 setCondCodeAction(ISD::SETUEQ, MVT::f32, Expand); in R600TargetLowering()
/external/llvm/lib/CodeGen/SelectionDAG/
DSelectionDAGDumper.cpp340 case ISD::SETUEQ: return "setueq"; in getOperationName()
DTargetLowering.cpp216 case ISD::SETUEQ: in softenSetCCOperands()
1948 if (Cond == ISD::SETUEQ && in SimplifySetCC()
1961 if (Cond == ISD::SETUEQ && in SimplifySetCC()
DSelectionDAG.cpp326 case ISD::SETUEQ: Result = ISD::SETEQ ; break; // SETUGE & SETULE in getSetCCAndOperation()
1915 case ISD::SETUEQ: in FoldSetCC()
1975 case ISD::SETUEQ: return getConstant(R==APFloat::cmpUnordered || in FoldSetCC()
/external/llvm/lib/Target/WebAssembly/
DWebAssemblyISelLowering.cpp77 for (auto CC : {ISD::SETO, ISD::SETUO, ISD::SETUEQ, ISD::SETONE, in WebAssemblyTargetLowering()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/
DSelectionDAGDumper.cpp417 case ISD::SETUEQ: return "setueq"; in getOperationName()
DTargetLowering.cpp359 case ISD::SETUEQ: in softenSetCCOperands()
3795 if (Cond == ISD::SETUEQ && in SimplifySetCC()
3808 if (Cond == ISD::SETUEQ && in SimplifySetCC()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARC/
DARCISelLowering.cpp43 case ISD::SETUEQ: in ISDCCtoARCCC()
/external/llvm/lib/Target/PowerPC/
DPPCISelDAGToDAG.cpp2091 case ISD::SETUEQ: in getPredicateForSetCC()
2138 case ISD::SETUEQ: in getCRIdxForSetCC()
2215 case ISD::SETUNE: CC = ISD::SETUEQ; Negate = true; break; in getVCmpInst()
2223 case ISD::SETUEQ: in getVCmpInst()
DPPCInstrQPX.td1004 def : Pat<(setcc v4f64:$FRA, v4f64:$FRB, SETUEQ),
1051 def : Pat<(setcc v4f32:$FRA, v4f32:$FRB, SETUEQ),
/external/llvm/include/llvm/Target/
DTargetSelectionDAG.td594 def SETUEQ : CondCode; def SETUGT : CondCode; def SETUGE : CondCode;
989 (setcc node:$lhs, node:$rhs, SETUEQ)>;
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/
DPPCInstrQPX.td1001 def : Pat<(setcc v4f64:$FRA, v4f64:$FRB, SETUEQ),
1048 def : Pat<(setcc v4f32:$FRA, v4f32:$FRB, SETUEQ),
DPPCISelDAGToDAG.cpp3858 case ISD::SETUEQ: in getPredicateForSetCC()
3911 case ISD::SETUEQ: in getCRIdxForSetCC()
3988 case ISD::SETUNE: CC = ISD::SETUEQ; Negate = true; break; in getVCmpInst()
3996 case ISD::SETUEQ: in getVCmpInst()
/external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/Target/
DTargetSelectionDAG.td692 def SETUEQ : CondCode<"FCMP_UEQ">;
1291 (setcc node:$lhs, node:$rhs, SETUEQ)>;
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Lanai/
DLanaiISelLowering.cpp857 case ISD::SETUEQ: in IntCondCCodeToICC()
/external/llvm/lib/Target/Lanai/
DLanaiISelLowering.cpp846 case ISD::SETUEQ: in IntCondCCodeToICC()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/WebAssembly/
DWebAssemblyISelLowering.cpp89 for (auto CC : {ISD::SETO, ISD::SETUO, ISD::SETUEQ, ISD::SETONE, in WebAssemblyTargetLowering()
/external/llvm/lib/Target/NVPTX/
DNVPTXVector.td966 (setcc node:$lhs, node:$rhs, SETUEQ)>;

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