Searched refs:Vec64 (Results 1 – 5 of 5) sorted by relevance
| /external/llvm/lib/Target/AMDGPU/ |
| D | SIISelLowering.cpp | 164 for (MVT Vec64 : { MVT::v2i64, MVT::v2f64 }) { in SITargetLowering()
165 setOperationAction(ISD::BUILD_VECTOR, Vec64, Promote); in SITargetLowering()
166 AddPromotedToType(ISD::BUILD_VECTOR, Vec64, MVT::v4i32); in SITargetLowering()
168 setOperationAction(ISD::EXTRACT_VECTOR_ELT, Vec64, Promote); in SITargetLowering()
169 AddPromotedToType(ISD::EXTRACT_VECTOR_ELT, Vec64, MVT::v4i32); in SITargetLowering()
171 setOperationAction(ISD::INSERT_VECTOR_ELT, Vec64, Promote); in SITargetLowering()
172 AddPromotedToType(ISD::INSERT_VECTOR_ELT, Vec64, MVT::v4i32); in SITargetLowering()
174 setOperationAction(ISD::SCALAR_TO_VECTOR, Vec64, Promote); in SITargetLowering()
175 AddPromotedToType(ISD::SCALAR_TO_VECTOR, Vec64, MVT::v4i32); in SITargetLowering()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/ |
| D | HexagonISelLowering.h | 354 SDValue contractPredicate(SDValue Vec64, const SDLoc &dl,
|
| D | HexagonISelLowering.cpp | 2500 HexagonTargetLowering::contractPredicate(SDValue Vec64, const SDLoc &dl, in contractPredicate() argument
2502 assert(ty(Vec64).getSizeInBits() == 64); in contractPredicate()
2503 if (isUndef(Vec64)) in contractPredicate()
2505 return getInstr(Hexagon::S2_vtrunehb, dl, MVT::i32, {Vec64}, DAG); in contractPredicate()
|
| D | HexagonISelLoweringHVX.cpp | 871 SDValue Vec64 = DAG.getNode(HexagonISD::COMBINE, dl, MVT::v8i8, {W1, W0}); in extractHvxSubvectorPred() local
873 {Vec64, DAG.getTargetConstant(0, dl, MVT::i32)}, DAG); in extractHvxSubvectorPred()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | SIISelLowering.cpp | 293 for (MVT Vec64 : { MVT::v2i64, MVT::v2f64 }) { in SITargetLowering()
294 setOperationAction(ISD::BUILD_VECTOR, Vec64, Promote); in SITargetLowering()
295 AddPromotedToType(ISD::BUILD_VECTOR, Vec64, MVT::v4i32); in SITargetLowering()
297 setOperationAction(ISD::EXTRACT_VECTOR_ELT, Vec64, Promote); in SITargetLowering()
298 AddPromotedToType(ISD::EXTRACT_VECTOR_ELT, Vec64, MVT::v4i32); in SITargetLowering()
300 setOperationAction(ISD::INSERT_VECTOR_ELT, Vec64, Promote); in SITargetLowering()
301 AddPromotedToType(ISD::INSERT_VECTOR_ELT, Vec64, MVT::v4i32); in SITargetLowering()
303 setOperationAction(ISD::SCALAR_TO_VECTOR, Vec64, Promote); in SITargetLowering()
304 AddPromotedToType(ISD::SCALAR_TO_VECTOR, Vec64, MVT::v4i32); in SITargetLowering()
|