| /external/mesa3d/src/mesa/x86/ |
| D | sse_xform3.S | 88 MOVSS ( REGOFF(4, ESI), XMM5 ) /* | | | oy */
89 SHUFPS ( CONST(0x0), XMM5, XMM5 ) /* oy | oy | oy | oy */
94 MULPS ( XMM1, XMM5 ) /* m7*oy | m6*oy | m5*oy | m4*oy */
97 ADDPS ( XMM5, XMM4 )
282 MOVSS ( S(2), XMM5 ) /* oz */
283 SHUFPS ( CONST(0x0), XMM5, XMM5 ) /* oz | oz */
284 MULPS ( XMM2, XMM5 ) /* oz*m9 | oz*m8 */
285 ADDPS ( XMM5, XMM0 ) /* +oy*m5 | +ox*m0 */
294 MOVSS ( XMM6, XMM5 ) /* 0 */
295 SUBPS ( XMM0, XMM5 ) /* -oz */
[all …]
|
| D | sse_normal.S | 169 MOVSS ( S(2), XMM5 ) /* uz */
170 SHUFPS ( CONST(0x0), XMM5, XMM5 ) /* uz | uz */
171 MULPS ( XMM2, XMM5 ) /* uz*m6 | uz*m2 */
174 ADDPS ( XMM5, XMM3 )
182 MOVSS ( S(0), XMM5 ) /* ux */
183 MULSS ( XMM6, XMM5 ) /* ux*m8*scale */
186 ADDSS ( XMM5, XMM3 )
|
| D | sse_xform4.S | 72 MOVAPS( MAT(4), XMM5 ) /* m7 | m6 | m5 | m4 */
85 MULPS( XMM5, XMM1 ) /* oy*m7 | oy*m6 | oy*m5 | oy*m4 */
155 MOVSS( SRC(1), XMM5 ) /* oy */
156 SHUFPS( CONST(0x0), XMM5, XMM5 ) /* oy | oy | oy | oy */
157 MULPS( XMM1, XMM5 ) /* oy*m7 | oy*m6 | oy*m5 | oy*m4 */
167 ADDPS( XMM5, XMM4 ) /* ox*m3+oy*m7 | ... */
|
| /external/llvm/test/TableGen/ |
| D | TargetInstrSpec.td | 52 def XMM5: Register<"xmm5">;
65 [XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7,
|
| D | Slice.td | 45 def XMM5: Register<"xmm5">;
58 [XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7,
|
| D | cast.td | 51 def XMM5: Register<"xmm5">;
64 [XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7,
|
| D | MultiPat.td | 55 def XMM5: Register<"xmm5">;
68 [XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7,
|
| /external/llvm/test/MC/X86/ |
| D | intel-syntax-encoding.s | 59 movsd XMM5, QWORD PTR [-8]
|
| D | intel-syntax.s | 79 movsd XMM5, QWORD PTR [-8]
|
| /external/capstone/suite/MC/X86/ |
| D | intel-syntax-encoding.s.cs | 24 0xf2,0x0f,0x10,0x2c,0x25,0xf8,0xff,0xff,0xff = movsd XMM5, QWORD PTR [-8]
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86CallingConv.cpp | 81 X86::XMM3, X86::XMM4, X86::XMM5}; in CC_X86_VectorCallGetSSEs()
168 TRI->regsOverlap(Reg, X86::XMM5)) in CC_X86_64_VectorCall()
|
| D | X86CallLowering.cpp | 166 X86::XMM3, X86::XMM4, X86::XMM5, in assignArg()
|
| D | X86CallingConv.td | 46 let XMM = [XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7];
52 let XMM = [XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7,
544 CCAssignToReg<[XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7]>>>,
683 CCAssignToReg<[XMM1, XMM2, XMM3, XMM4, XMM5, XMM6]>>>,
|
| /external/llvm/test/CodeGen/X86/ |
| D | ghc-cc64.ll | 20 @d1 = external global double ; assigned to register: XMM5
|
| /external/llvm/lib/Target/X86/ |
| D | X86CallingConv.td | 333 CCAssignToReg<[XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7]>>>,
440 // XMM0-XMM5.
442 CCAssignToReg<[XMM0, XMM1, XMM2, XMM3, XMM4, XMM5]>>,
468 CCAssignToReg<[XMM1, XMM2, XMM3, XMM4, XMM5, XMM6]>>>
662 // XMM0-XMM5.
664 CCAssignToReg<[XMM0, XMM1, XMM2, XMM3, XMM4, XMM5]>>,
|
| D | X86RegisterInfo.td | 177 def XMM5: X86Reg<"xmm5", 5>, DwarfRegNum<[22, 26, 26]>;
|
| /external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/X86/ |
| D | X86GenRegisterInfo.inc | 168 XMM5 = 148,
1284 { X86::XMM5 },
1586 …X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3, X86::XMM4, X86::XMM5, X86::XMM6, X86::XMM7, X86::XMM8,…
1636 …X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3, X86::XMM4, X86::XMM5, X86::XMM6, X86::XMM7, X86::XMM8,…
1956 …X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3, X86::XMM4, X86::XMM5, X86::XMM6, X86::XMM7, X86::XMM8,…
1986 …X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3, X86::XMM4, X86::XMM5, X86::XMM6, X86::XMM7, X86::XMM8,…
2426 …X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3, X86::XMM4, X86::XMM5, X86::XMM6, X86::XMM7, X86::XMM8,…
2436 …X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3, X86::XMM4, X86::XMM5, X86::XMM6, X86::XMM7, X86::XMM8,…
2737 { 22U, X86::XMM5 },
2814 { 26U, X86::XMM5 },
[all …]
|
| D | X86GenCallingConv.inc | 880 X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3, X86::XMM4, X86::XMM5, X86::XMM6, X86::XMM7
904 X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3, X86::XMM4, X86::XMM5, X86::XMM6, X86::XMM7
1550 X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3, X86::XMM4, X86::XMM5, X86::XMM6, X86::XMM7
1688 X86::XMM1, X86::XMM2, X86::XMM3, X86::XMM4, X86::XMM5, X86::XMM6
1952 …X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3, X86::XMM4, X86::XMM5, X86::XMM6, X86::XMM7, X86::XMM8,…
1976 …X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3, X86::XMM4, X86::XMM5, X86::XMM6, X86::XMM7, X86::XMM8,…
2423 …X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3, X86::XMM4, X86::XMM5, X86::XMM6, X86::XMM7, X86::XMM8,…
2447 …X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3, X86::XMM4, X86::XMM5, X86::XMM6, X86::XMM7, X86::XMM8,…
3135 X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3, X86::XMM4, X86::XMM5, X86::XMM6, X86::XMM7
3152 X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3, X86::XMM4, X86::XMM5, X86::XMM6, X86::XMM7
[all …]
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/Disassembler/ |
| D | X86DisassemblerDecoder.h | 224 ENTRY(XMM5) \
|
| /external/llvm/lib/Target/X86/Disassembler/ |
| D | X86DisassemblerDecoder.h | 222 ENTRY(XMM5) \
|
| /external/capstone/arch/X86/ |
| D | X86DisassemblerDecoder.h | 232 ENTRY(XMM5) \
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/MCTargetDesc/ |
| D | X86MCTargetDesc.cpp | 139 {codeview::RegisterId::XMM5, X86::XMM5}, in initLLVMToSEHAndCVRegMapping()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/DebugInfo/CodeView/ |
| D | CodeViewRegisters.def | 156 CV_REGISTER(XMM5, 159)
|
| /external/llvm/docs/TableGen/ |
| D | index.rst | 69 XMM0, XMM1, XMM10, XMM11, XMM12, XMM13, XMM14, XMM15, XMM2, XMM3, XMM4, XMM5,
|
| D | LangIntro.rst | 544 XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7, EFLAGS] in {
|