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/external/llvm/test/MC/AArch64/
Dneon-compare-instructions.s150 cmlt v0.8b, v17.8b, v15.8b
151 cmlt v1.16b, v8.16b, v31.16b
152 cmlt v15.4h, v17.4h, v16.4h
153 cmlt v5.8h, v7.8h, v6.8h
154 cmlt v29.2s, v28.2s, v27.2s
155 cmlt v9.4s, v8.4s, v7.4s
156 cmlt v3.2d, v21.2d, v31.2d
347 cmlt v0.8b, v15.8b, #0
348 cmlt v1.16b, v31.16b, #0
349 cmlt v15.4h, v16.4h, #0
[all …]
Dneon-scalar-compare.s80 cmlt d20, d21, #0x0
Darm64-advsimd.s742 cmlt.8b v0, v0, #0
750 cmlt v8.8b, v14.8b, #0
751 cmlt v8.16b, v14.16b, #0
752 cmlt v8.4h, v14.4h, #0
753 cmlt v8.8h, v14.8h, #0
754 cmlt v8.2s, v14.2s, #0
755 cmlt v8.4s, v14.4s, #0
756 cmlt v8.2d, v14.2d, #0
761 ; CHECK: cmlt.8b v0, v0, #0 ; encoding: [0x00,0xa8,0x20,0x0e]
767 ; CHECK: cmlt.8b v8, v14, #0 ; encoding: [0xc8,0xa9,0x20,0x0e]
[all …]
Dneon-diagnostics.s516 cmlt c0.8h, v1.16b, v2.4s
658 cmlt c0.8h, v1.16b, #0
659 cmlt c0.8h, v1.8h, #-15
4587 cmlt d20, b21, #0
/external/capstone/suite/MC/AArch64/
Dneon-compare-instructions.s.cs115 0xe0,0xa9,0x20,0x0e = cmlt v0.8b, v15.8b, #0x0
116 0xe1,0xab,0x20,0x4e = cmlt v1.16b, v31.16b, #0x0
117 0x0f,0xaa,0x60,0x0e = cmlt v15.4h, v16.4h, #0x0
118 0xc5,0xa8,0x60,0x4e = cmlt v5.8h, v6.8h, #0x0
119 0x7d,0xab,0xa0,0x0e = cmlt v29.2s, v27.2s, #0x0
120 0xe9,0xa8,0xa0,0x4e = cmlt v9.4s, v7.4s, #0x0
121 0xe3,0xab,0xe0,0x4e = cmlt v3.2d, v31.2d, #0x0
Dneon-scalar-compare.s.cs11 0xb4,0xaa,0xe0,0x5e = cmlt d20, d21, #0x0
/external/llvm/test/CodeGen/AArch64/
Darm64-neon-compare-instructions.ll756 ;CHECK: cmlt {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, #0
763 ;CHECK: cmlt {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, #0
770 ;CHECK: cmlt {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, #0
777 ;CHECK: cmlt {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, #0
784 ;CHECK: cmlt {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, #0
791 ;CHECK: cmlt {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, #0
798 ;CHECK: cmlt {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, #0
1147 ; CHECK: cmlt d0, d0, #0
Dneon-compare-instructions.ll976 ; CHECK: cmlt {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, #{{0x0|0}}
984 ; CHECK: cmlt {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, #{{0x0|0}}
992 ; CHECK: cmlt {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, #{{0x0|0}}
1000 ; CHECK: cmlt {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, #{{0x0|0}}
1008 ; CHECK: cmlt {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, #{{0x0|0}}
1016 ; CHECK: cmlt {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, #{{0x0|0}}
1024 ; CHECK: cmlt {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, #{{0x0|0}}
/external/llvm/lib/Target/AArch64/
DAArch64InstrInfo.td2774 defm CMLT : SIMDCmpTwoVector<0, 0b01010, "cmlt", AArch64cmltz>;
3145 def : InstAlias<"{cmlt\t$dst.8b, $src1.8b, $src2.8b" #
3146 "|cmlt.8b\t$dst, $src1, $src2}",
3148 def : InstAlias<"{cmlt\t$dst.16b, $src1.16b, $src2.16b" #
3149 "|cmlt.16b\t$dst, $src1, $src2}",
3151 def : InstAlias<"{cmlt\t$dst.4h, $src1.4h, $src2.4h" #
3152 "|cmlt.4h\t$dst, $src1, $src2}",
3154 def : InstAlias<"{cmlt\t$dst.8h, $src1.8h, $src2.8h" #
3155 "|cmlt.8h\t$dst, $src1, $src2}",
3157 def : InstAlias<"{cmlt\t$dst.2s, $src1.2s, $src2.2s" #
[all …]
/external/vixl/test/aarch64/
Dtest-trace-aarch64.cc749 __ cmlt(d25, d23, 0); in GenerateTestSequenceNEON() local
750 __ cmlt(v7.V16B(), v21.V16B(), 0); in GenerateTestSequenceNEON() local
751 __ cmlt(v7.V2D(), v30.V2D(), 0); in GenerateTestSequenceNEON() local
752 __ cmlt(v25.V2S(), v28.V2S(), 0); in GenerateTestSequenceNEON() local
753 __ cmlt(v0.V4H(), v11.V4H(), 0); in GenerateTestSequenceNEON() local
754 __ cmlt(v24.V4S(), v5.V4S(), 0); in GenerateTestSequenceNEON() local
755 __ cmlt(v26.V8B(), v11.V8B(), 0); in GenerateTestSequenceNEON() local
756 __ cmlt(v1.V8H(), v21.V8H(), 0); in GenerateTestSequenceNEON() local
Dtest-cpu-features-aarch64.cc889 TEST_NEON(cmlt_0, cmlt(v0.V8B(), v1.V8B(), 0))
890 TEST_NEON(cmlt_1, cmlt(v0.V16B(), v1.V16B(), 0))
891 TEST_NEON(cmlt_2, cmlt(v0.V4H(), v1.V4H(), 0))
892 TEST_NEON(cmlt_3, cmlt(v0.V8H(), v1.V8H(), 0))
893 TEST_NEON(cmlt_4, cmlt(v0.V2S(), v1.V2S(), 0))
894 TEST_NEON(cmlt_5, cmlt(v0.V4S(), v1.V4S(), 0))
895 TEST_NEON(cmlt_6, cmlt(v0.V2D(), v1.V2D(), 0))
896 TEST_NEON(cmlt_7, cmlt(d0, d1, 0))
Dtest-simulator-aarch64.cc4803 DEFINE_TEST_NEON_2OPIMM(cmlt, Basic, Zero) in DEFINE_TEST_NEON_2DIFF_FP_SCALAR_SD()
4866 DEFINE_TEST_NEON_2OPIMM_SCALAR_D(cmlt, Basic, Zero) in DEFINE_TEST_NEON_2DIFF_FP_SCALAR_SD()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/
DAArch64InstrInfo.td3668 defm CMLT : SIMDCmpTwoVector<0, 0b01010, "cmlt", AArch64cmltz>;
4056 def : InstAlias<"{cmlt\t$dst.8b, $src1.8b, $src2.8b" #
4057 "|cmlt.8b\t$dst, $src1, $src2}",
4059 def : InstAlias<"{cmlt\t$dst.16b, $src1.16b, $src2.16b" #
4060 "|cmlt.16b\t$dst, $src1, $src2}",
4062 def : InstAlias<"{cmlt\t$dst.4h, $src1.4h, $src2.4h" #
4063 "|cmlt.4h\t$dst, $src1, $src2}",
4065 def : InstAlias<"{cmlt\t$dst.8h, $src1.8h, $src2.8h" #
4066 "|cmlt.8h\t$dst, $src1, $src2}",
4068 def : InstAlias<"{cmlt\t$dst.2s, $src1.2s, $src2.2s" #
[all …]
/external/vixl/test/test-trace-reference/
Dlog-disasm-colour661 0x~~~~~~~~~~~~~~~~ 5ee0aaf9 cmlt d25, d23, #0
662 0x~~~~~~~~~~~~~~~~ 4e20aaa7 cmlt v7.16b, v21.16b, #0
663 0x~~~~~~~~~~~~~~~~ 4ee0abc7 cmlt v7.2d, v30.2d, #0
664 0x~~~~~~~~~~~~~~~~ 0ea0ab99 cmlt v25.2s, v28.2s, #0
665 0x~~~~~~~~~~~~~~~~ 0e60a960 cmlt v0.4h, v11.4h, #0
666 0x~~~~~~~~~~~~~~~~ 4ea0a8b8 cmlt v24.4s, v5.4s, #0
667 0x~~~~~~~~~~~~~~~~ 0e20a97a cmlt v26.8b, v11.8b, #0
668 0x~~~~~~~~~~~~~~~~ 4e60aaa1 cmlt v1.8h, v21.8h, #0
Dlog-disasm661 0x~~~~~~~~~~~~~~~~ 5ee0aaf9 cmlt d25, d23, #0
662 0x~~~~~~~~~~~~~~~~ 4e20aaa7 cmlt v7.16b, v21.16b, #0
663 0x~~~~~~~~~~~~~~~~ 4ee0abc7 cmlt v7.2d, v30.2d, #0
664 0x~~~~~~~~~~~~~~~~ 0ea0ab99 cmlt v25.2s, v28.2s, #0
665 0x~~~~~~~~~~~~~~~~ 0e60a960 cmlt v0.4h, v11.4h, #0
666 0x~~~~~~~~~~~~~~~~ 4ea0a8b8 cmlt v24.4s, v5.4s, #0
667 0x~~~~~~~~~~~~~~~~ 0e20a97a cmlt v26.8b, v11.8b, #0
668 0x~~~~~~~~~~~~~~~~ 4e60aaa1 cmlt v1.8h, v21.8h, #0
Dlog-cpufeatures-custom660 0x~~~~~~~~~~~~~~~~ 5ee0aaf9 cmlt d25, d23, #0 ### {NEON} ###
661 0x~~~~~~~~~~~~~~~~ 4e20aaa7 cmlt v7.16b, v21.16b, #0 ### {NEON} ###
662 0x~~~~~~~~~~~~~~~~ 4ee0abc7 cmlt v7.2d, v30.2d, #0 ### {NEON} ###
663 0x~~~~~~~~~~~~~~~~ 0ea0ab99 cmlt v25.2s, v28.2s, #0 ### {NEON} ###
664 0x~~~~~~~~~~~~~~~~ 0e60a960 cmlt v0.4h, v11.4h, #0 ### {NEON} ###
665 0x~~~~~~~~~~~~~~~~ 4ea0a8b8 cmlt v24.4s, v5.4s, #0 ### {NEON} ###
666 0x~~~~~~~~~~~~~~~~ 0e20a97a cmlt v26.8b, v11.8b, #0 ### {NEON} ###
667 0x~~~~~~~~~~~~~~~~ 4e60aaa1 cmlt v1.8h, v21.8h, #0 ### {NEON} ###
Dlog-cpufeatures660 0x~~~~~~~~~~~~~~~~ 5ee0aaf9 cmlt d25, d23, #0 // Needs: NEON
661 0x~~~~~~~~~~~~~~~~ 4e20aaa7 cmlt v7.16b, v21.16b, #0 // Needs: NEON
662 0x~~~~~~~~~~~~~~~~ 4ee0abc7 cmlt v7.2d, v30.2d, #0 // Needs: NEON
663 0x~~~~~~~~~~~~~~~~ 0ea0ab99 cmlt v25.2s, v28.2s, #0 // Needs: NEON
664 0x~~~~~~~~~~~~~~~~ 0e60a960 cmlt v0.4h, v11.4h, #0 // Needs: NEON
665 0x~~~~~~~~~~~~~~~~ 4ea0a8b8 cmlt v24.4s, v5.4s, #0 // Needs: NEON
666 0x~~~~~~~~~~~~~~~~ 0e20a97a cmlt v26.8b, v11.8b, #0 // Needs: NEON
667 0x~~~~~~~~~~~~~~~~ 4e60aaa1 cmlt v1.8h, v21.8h, #0 // Needs: NEON
Dlog-cpufeatures-colour660 0x~~~~~~~~~~~~~~~~ 5ee0aaf9 cmlt d25, d23, #0 NEON
661 0x~~~~~~~~~~~~~~~~ 4e20aaa7 cmlt v7.16b, v21.16b, #0 NEON
662 0x~~~~~~~~~~~~~~~~ 4ee0abc7 cmlt v7.2d, v30.2d, #0 NEON
663 0x~~~~~~~~~~~~~~~~ 0ea0ab99 cmlt v25.2s, v28.2s, #0 NEON
664 0x~~~~~~~~~~~~~~~~ 0e60a960 cmlt v0.4h, v11.4h, #0 NEON
665 0x~~~~~~~~~~~~~~~~ 4ea0a8b8 cmlt v24.4s, v5.4s, #0 NEON
666 0x~~~~~~~~~~~~~~~~ 0e20a97a cmlt v26.8b, v11.8b, #0 NEON
667 0x~~~~~~~~~~~~~~~~ 4e60aaa1 cmlt v1.8h, v21.8h, #0 NEON
Dlog-all1724 0x~~~~~~~~~~~~~~~~ 5ee0aaf9 cmlt d25, d23, #0
1726 0x~~~~~~~~~~~~~~~~ 4e20aaa7 cmlt v7.16b, v21.16b, #0
1728 0x~~~~~~~~~~~~~~~~ 4ee0abc7 cmlt v7.2d, v30.2d, #0
1730 0x~~~~~~~~~~~~~~~~ 0ea0ab99 cmlt v25.2s, v28.2s, #0
1732 0x~~~~~~~~~~~~~~~~ 0e60a960 cmlt v0.4h, v11.4h, #0
1734 0x~~~~~~~~~~~~~~~~ 4ea0a8b8 cmlt v24.4s, v5.4s, #0
1736 0x~~~~~~~~~~~~~~~~ 0e20a97a cmlt v26.8b, v11.8b, #0
1738 0x~~~~~~~~~~~~~~~~ 4e60aaa1 cmlt v1.8h, v21.8h, #0
/external/capstone/arch/AArch64/
DAArch64MappingInsnOp.inc785 { /* AArch64_CMLTv16i8rz, ARM64_INS_CMLT: cmlt.16b $rd, $rn, #0 */
789 { /* AArch64_CMLTv1i64rz, ARM64_INS_CMLT: cmlt $rd, $rn, #0 */
793 { /* AArch64_CMLTv2i32rz, ARM64_INS_CMLT: cmlt.2s $rd, $rn, #0 */
797 { /* AArch64_CMLTv2i64rz, ARM64_INS_CMLT: cmlt.2d $rd, $rn, #0 */
801 { /* AArch64_CMLTv4i16rz, ARM64_INS_CMLT: cmlt.4h $rd, $rn, #0 */
805 { /* AArch64_CMLTv4i32rz, ARM64_INS_CMLT: cmlt.4s $rd, $rn, #0 */
809 { /* AArch64_CMLTv8i16rz, ARM64_INS_CMLT: cmlt.8h $rd, $rn, #0 */
813 { /* AArch64_CMLTv8i8rz, ARM64_INS_CMLT: cmlt.8b $rd, $rn, #0 */
/external/llvm/test/MC/Disassembler/AArch64/
Dneon-instructions.txt272 # CHECK: cmlt v13.8h, v11.8h, #{{0x0|0}}
1610 # CHECK: cmlt d20, d21, #{{0x0|0}}
Darm64-advsimd.txt537 # CHECK: cmlt.8b v0, v0, #0
/external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/AArch64/
DAArch64GenAsmMatcher.inc12488 "cmls\004cmlt\003cmn\003cmp\005cmpeq\005cmpge\005cmpgt\005cmphi\005cmphs"
13235 …{ 656 /* cmlt */, AArch64::CMLTv1i64rz, Convert__Reg1_0__Reg1_1, AMFBS_HasNEON, { MCK_FPR64, MCK_F…
13236 …{ 656 /* cmlt */, AArch64::CMGTv1i64, Convert__Reg1_0__Reg1_2__Reg1_1, AMFBS_None, { MCK_FPR64, MC…
13237 …{ 656 /* cmlt */, AArch64::CMLTv16i8rz, Convert__VectorReg1281_0__VectorReg1281_2, AMFBS_HasNEON, …
13238 …{ 656 /* cmlt */, AArch64::CMLTv2i64rz, Convert__VectorReg1281_0__VectorReg1281_2, AMFBS_HasNEON, …
13239 …{ 656 /* cmlt */, AArch64::CMLTv4i32rz, Convert__VectorReg1281_0__VectorReg1281_2, AMFBS_HasNEON, …
13240 …{ 656 /* cmlt */, AArch64::CMLTv8i16rz, Convert__VectorReg1281_0__VectorReg1281_2, AMFBS_HasNEON, …
13241 …{ 656 /* cmlt */, AArch64::CMLTv2i32rz, Convert__VectorReg641_0__VectorReg641_2, AMFBS_HasNEON, { …
13242 …{ 656 /* cmlt */, AArch64::CMLTv4i16rz, Convert__VectorReg641_0__VectorReg641_2, AMFBS_HasNEON, { …
13243 …{ 656 /* cmlt */, AArch64::CMLTv8i8rz, Convert__VectorReg641_0__VectorReg641_2, AMFBS_HasNEON, { M…
[all …]
/external/vixl/src/aarch64/
Dassembler-aarch64.h2681 void cmlt(const VRegister& vd, const VRegister& vn, int value);
/external/cronet/third_party/icu/source/data/misc/
DsupplementalData.txt8799 "cmlt",
21036 "cmlt",

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