| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AVR/ |
| D | AVRExpandPseudoInsts.cpp | 155 .addReg(DstLoReg, RegState::Define | getDeadRegState(DstIsDead)) in expandArith()
160 .addReg(DstHiReg, RegState::Define | getDeadRegState(DstIsDead)) in expandArith()
188 .addReg(DstLoReg, RegState::Define | getDeadRegState(DstIsDead)) in expandLogic()
196 .addReg(DstHiReg, RegState::Define | getDeadRegState(DstIsDead)) in expandLogic()
236 .addReg(DstLoReg, RegState::Define | getDeadRegState(DstIsDead)) in expandLogicImm()
246 .addReg(DstHiReg, RegState::Define | getDeadRegState(DstIsDead)) in expandLogicImm()
284 .addReg(DstLoReg, RegState::Define | getDeadRegState(DstIsDead)) in expand()
288 .addReg(DstHiReg, RegState::Define | getDeadRegState(DstIsDead)) in expand()
341 .addReg(DstLoReg, RegState::Define | getDeadRegState(DstIsDead)) in expand()
349 .addReg(DstHiReg, RegState::Define | getDeadRegState(DstIsDead)) in expand()
[all …]
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| /external/llvm/lib/Target/ARM/ |
| D | ARMExpandPseudoInsts.cpp | 409 MIB.addReg(D0, RegState::Define | getDeadRegState(DstIsDead)); in ExpandVLD()
411 MIB.addReg(D1, RegState::Define | getDeadRegState(DstIsDead)); in ExpandVLD()
413 MIB.addReg(D2, RegState::Define | getDeadRegState(DstIsDead)); in ExpandVLD()
415 MIB.addReg(D3, RegState::Define | getDeadRegState(DstIsDead)); in ExpandVLD()
446 MIB.addReg(DstReg, RegState::ImplicitDefine | getDeadRegState(DstIsDead)); in ExpandVLD()
542 MIB.addReg(D0, RegState::Define | getDeadRegState(DstIsDead)); in ExpandLaneOp()
544 MIB.addReg(D1, RegState::Define | getDeadRegState(DstIsDead)); in ExpandLaneOp()
546 MIB.addReg(D2, RegState::Define | getDeadRegState(DstIsDead)); in ExpandLaneOp()
548 MIB.addReg(D3, RegState::Define | getDeadRegState(DstIsDead)); in ExpandLaneOp()
590 MIB.addReg(DstReg, RegState::ImplicitDefine | getDeadRegState(DstIsDead)); in ExpandLaneOp()
[all …]
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| D | MLxExpansionPass.cpp | 301 .addReg(DstReg, getDefRegState(true) | getDeadRegState(DstDead)); in ExpandFPMLxInstruction()
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| D | ARMBaseInstrInfo.h | 411 return MIB.addReg(ARM::CPSR, getDefRegState(true) | getDeadRegState(isDead));
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| D | ARMLoadStoreOptimizer.cpp | 1560 .addReg(Reg, getDefRegState(true) | getDeadRegState(RegDeadKill)) in InsertLDR_STR()
1623 .addReg(EvenReg, getDefRegState(isLd) | getDeadRegState(EvenDeadKill)) in FixInvalidRegPairOp()
1624 .addReg(OddReg, getDefRegState(isLd) | getDeadRegState(OddDeadKill)); in FixInvalidRegPairOp()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| D | ARMExpandPseudoInsts.cpp | 498 MIB.addReg(DstRegPair, RegState::Define | getDeadRegState(DstIsDead)); in ExpandVLD()
502 MIB.addReg(D0, RegState::Define | getDeadRegState(DstIsDead)); in ExpandVLD()
504 MIB.addReg(D1, RegState::Define | getDeadRegState(DstIsDead)); in ExpandVLD()
506 MIB.addReg(D2, RegState::Define | getDeadRegState(DstIsDead)); in ExpandVLD()
508 MIB.addReg(D3, RegState::Define | getDeadRegState(DstIsDead)); in ExpandVLD()
569 MIB.addReg(DstReg, RegState::ImplicitDefine | getDeadRegState(DstIsDead)); in ExpandVLD()
689 MIB.addReg(D0, RegState::Define | getDeadRegState(DstIsDead)); in ExpandLaneOp()
691 MIB.addReg(D1, RegState::Define | getDeadRegState(DstIsDead)); in ExpandLaneOp()
693 MIB.addReg(D2, RegState::Define | getDeadRegState(DstIsDead)); in ExpandLaneOp()
695 MIB.addReg(D3, RegState::Define | getDeadRegState(DstIsDead)); in ExpandLaneOp()
[all …]
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| D | MLxExpansionPass.cpp | 298 .addReg(DstReg, getDefRegState(true) | getDeadRegState(DstDead)); in ExpandFPMLxInstruction()
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| D | ARMLoadStoreOptimizer.cpp | 1637 .addReg(Reg, getDefRegState(true) | getDeadRegState(RegDeadKill)) in InsertLDR_STR()
1708 .addReg(EvenReg, getDefRegState(isLd) | getDeadRegState(EvenDeadKill)) in FixInvalidRegPairOp()
1709 .addReg(OddReg, getDefRegState(isLd) | getDeadRegState(OddDeadKill)) in FixInvalidRegPairOp()
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64ExpandPseudoInsts.cpp | 131 .addReg(DstReg, RegState::Define | getDeadRegState(DstIsDead)) in tryOrrMovk()
209 RegState::Define | getDeadRegState(DstIsDead && CountThree)) in tryToreplicateChunks()
233 .addReg(DstReg, RegState::Define | getDeadRegState(DstIsDead)) in tryToreplicateChunks()
383 RegState::Define | getDeadRegState(DstIsDead && SingleMovk)) in trySequenceOfOnes()
399 .addReg(DstReg, RegState::Define | getDeadRegState(DstIsDead)) in trySequenceOfOnes()
556 getDeadRegState(DstIsDead && Shift == LastShift)) in expandMOVImm()
581 getDeadRegState(DstIsDead && Shift == LastShift)) in expandMOVImm()
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| /external/llvm/include/llvm/CodeGen/ |
| D | MachineInstrBuilder.h | 381 inline unsigned getDeadRegState(bool B) { in getDeadRegState() function
400 getDeadRegState(RegOp.isDead()) | in getRegState()
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| /external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/ |
| D | MachineInstrBuilder.h | 479 inline unsigned getDeadRegState(bool B) { in getDeadRegState() function
499 getKillRegState(RegOp.isKill()) | getDeadRegState(RegOp.isDead()) | in getRegState()
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| /external/llvm/lib/CodeGen/ |
| D | MachineInstrBundle.cpp | 204 MIB.addReg(Reg, getDefRegState(true) | getDeadRegState(isDead) | in finalizeBundle()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/ |
| D | MachineInstrBundle.cpp | 216 MIB.addReg(Reg, getDefRegState(true) | getDeadRegState(isDead) | in finalizeBundle()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64ExpandPseudoInsts.cpp | 149 getDeadRegState(DstIsDead && LastItem) | in expandMOVImm()
161 getDeadRegState(DstIsDead && LastItem) | in expandMOVImm()
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCInstrInfo.cpp | 381 .addReg(Reg0, RegState::Define | getDeadRegState(Reg0IsDead)) in commuteInstructionImpl()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/ |
| D | PPCInstrInfo.cpp | 428 .addReg(Reg0, RegState::Define | getDeadRegState(Reg0IsDead)) in commuteInstructionImpl()
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| /external/llvm/lib/Target/X86/ |
| D | X86InstrInfo.cpp | 2725 .addReg(Dest, RegState::Define | getDeadRegState(isDead)) in convertToThreeAddressWithLEA()
6438 getDeadRegState(ImpOp.isDead()) | in unfoldMemoryOperand()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86InstrInfo.cpp | 865 .addReg(Dest, RegState::Define | getDeadRegState(IsDead)) in convertToThreeAddressWithLEA()
5543 getDeadRegState(ImpOp.isDead()) | in unfoldMemoryOperand()
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