| /external/libopus/m4/ |
| D | as-gcc-inline-assembly.m4 | 60 AC_COMPILE_IFELSE([AC_LANG_PROGRAM([],[__asm__("shadd8 r3,r3,r3")])],
|
| /external/vixl/test/aarch32/ |
| D | test-assembler-cond-rd-rn-rm-a32.cc | 62 M(shadd8) \
|
| D | test-assembler-cond-rd-rn-rm-t32.cc | 61 M(shadd8) \
|
| /external/libopus/ |
| D | meson.build | 236 if cc.compiles(asm_tmpl.format('shadd8 r3,r3,r3'),
|
| /external/capstone/suite/MC/ARM/ |
| D | basic-arm-instructions.s.cs | 633 0x92,0x4f,0x38,0xe6 = shadd8 r4, r8, r2
|
| /external/vixl/src/aarch32/ |
| D | assembler-aarch32.h | 3034 void shadd8(Condition cond, Register rd, Register rn, Register rm);
3035 void shadd8(Register rd, Register rn, Register rm) { shadd8(al, rd, rn, rm); } in shadd8() function
|
| D | disasm-aarch32.h | 1075 void shadd8(Condition cond, Register rd, Register rn, Register rm);
|
| D | disasm-aarch32.cc | 2495 void Disassembler::shadd8(Condition cond, in shadd8() function in vixl::aarch32::Disassembler
21175 shadd8(CurrentCond(), in DecodeT32()
62611 shadd8(condition, Register(rd), Register(rn), Register(rm)); in DecodeA32()
|
| D | assembler-aarch32.cc | 9738 void Assembler::shadd8(Condition cond, Register rd, Register rn, Register rm) { in shadd8() function in vixl::aarch32::Assembler
9758 Delegate(kShadd8, &Assembler::shadd8, cond, rd, rn, rm); in shadd8()
|
| D | macro-assembler-aarch32.h | 3484 shadd8(cond, rd, rn, rm); in Shadd8()
|
| /external/llvm/test/MC/ARM/ |
| D | basic-arm-instructions.s | 2329 shadd8 r4, r8, r2
2334 @ CHECK: shadd8 r4, r8, r2 @ encoding: [0x92,0x4f,0x38,0xe6]
|
| /external/llvm/test/MC/Disassembler/ARM/ |
| D | basic-arm-instructions.txt | 1537 # CHECK: shadd8 r4, r8, r2
|
| /external/capstone/arch/ARM/ |
| D | ARMMappingInsnOp.inc | 721 { /* ARM_SHADD8, ARM_INS_SHADD8: shadd8${p} $rd, $rn, $rm */
5947 { /* ARM_t2SHADD8, ARM_INS_SHADD8: shadd8${p} $rd, $rn, $rm */
|
| /external/capstone/arch/AArch64/ |
| D | ARMMappingInsnOp.inc | 721 { /* ARM_SHADD8, ARM_INS_SHADD8: shadd8${p} $rd, $rn, $rm */
5947 { /* ARM_t2SHADD8, ARM_INS_SHADD8: shadd8${p} $rd, $rn, $rm */
|
| /external/llvm/lib/Target/ARM/ |
| D | ARMInstrThumb2.td | 2177 def t2SHADD8 : T2I_pam<0b000, 0b0010, "shadd8">;
|
| D | ARMInstrInfo.td | 3606 def SHADD8 : AAI<0b01100011, 0b11111001, "shadd8">;
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| D | ARMInstrThumb2.td | 2480 def t2SHADD8 : T2I_pam_intrinsics<0b000, 0b0010, "shadd8", int_arm_shadd8>;
|
| D | ARMInstrInfo.td | 3831 def SHADD8 : AAIIntrinsic<0b01100011, 0b11111001, "shadd8", int_arm_shadd8>;
|
| /external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/ARM/ |
| D | ARMGenAsmMatcher.inc | 9900 "shadd16\006shadd8\005shasx\005shsax\007shsub16\006shsub8\003smc\006smla"
11093 …{ 1067 /* shadd8 */, ARM::t2SHADD8, Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, AMFBS_IsThumb2_H…
11094 …{ 1067 /* shadd8 */, ARM::SHADD8, Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, AMFBS_IsARM, { MCK…
|
| /external/swiftshader/third_party/llvm-10.0/configs/common/include/llvm/IR/ |
| D | IntrinsicImpl.inc | 1829 "llvm.arm.shadd8",
11962 1, // llvm.arm.shadd8
|