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1 // Copyright 2016, VIXL authors
2 // All rights reserved.
3 //
4 // Redistribution and use in source and binary forms, with or without
5 // modification, are permitted provided that the following conditions are met:
6 //
7 //   * Redistributions of source code must retain the above copyright notice,
8 //     this list of conditions and the following disclaimer.
9 //   * Redistributions in binary form must reproduce the above copyright notice,
10 //     this list of conditions and the following disclaimer in the documentation
11 //     and/or other materials provided with the distribution.
12 //   * Neither the name of ARM Limited nor the names of its contributors may be
13 //     used to endorse or promote products derived from this software without
14 //     specific prior written permission.
15 //
16 // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS CONTRIBUTORS "AS IS" AND
17 // ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
18 // WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
19 // DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
20 // FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 // DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
22 // SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
23 // CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
24 // OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
25 // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26 
27 
28 // -----------------------------------------------------------------------------
29 // This file is auto generated from the
30 // test/aarch32/config/template-assembler-aarch32.cc.in template file using
31 // tools/generate_tests.py.
32 //
33 // PLEASE DO NOT EDIT.
34 // -----------------------------------------------------------------------------
35 
36 
37 #include "test-runner.h"
38 
39 #include "test-utils.h"
40 #include "test-utils-aarch32.h"
41 
42 #include "aarch32/assembler-aarch32.h"
43 #include "aarch32/macro-assembler-aarch32.h"
44 
45 #define BUF_SIZE (4096)
46 
47 namespace vixl {
48 namespace aarch32 {
49 
50 // List of instruction mnemonics.
51 #define FOREACH_INSTRUCTION(M) \
52   M(mul)                       \
53   M(qadd16)                    \
54   M(qadd8)                     \
55   M(qasx)                      \
56   M(qsax)                      \
57   M(qsub16)                    \
58   M(qsub8)                     \
59   M(sdiv)                      \
60   M(shadd16)                   \
61   M(shadd8)                    \
62   M(shasx)                     \
63   M(shsax)                     \
64   M(shsub16)                   \
65   M(shsub8)                    \
66   M(smmul)                     \
67   M(smmulr)                    \
68   M(smuad)                     \
69   M(smuadx)                    \
70   M(smulbb)                    \
71   M(smulbt)                    \
72   M(smultb)                    \
73   M(smultt)                    \
74   M(smulwb)                    \
75   M(smulwt)                    \
76   M(smusd)                     \
77   M(smusdx)                    \
78   M(udiv)                      \
79   M(uhadd16)                   \
80   M(uhadd8)                    \
81   M(uhasx)                     \
82   M(uhsax)                     \
83   M(uhsub16)                   \
84   M(uhsub8)                    \
85   M(uqadd16)                   \
86   M(uqadd8)                    \
87   M(uqasx)                     \
88   M(uqsax)                     \
89   M(uqsub16)                   \
90   M(uqsub8)                    \
91   M(usad8)                     \
92   M(sadd16)                    \
93   M(sadd8)                     \
94   M(sasx)                      \
95   M(sel)                       \
96   M(ssax)                      \
97   M(ssub16)                    \
98   M(ssub8)                     \
99   M(uadd16)                    \
100   M(uadd8)                     \
101   M(uasx)                      \
102   M(usax)                      \
103   M(usub16)                    \
104   M(usub8)                     \
105   M(qadd)                      \
106   M(qdadd)                     \
107   M(qdsub)                     \
108   M(qsub)
109 
110 
111 // The following definitions are defined again in each generated test, therefore
112 // we need to place them in an anomymous namespace. It expresses that they are
113 // local to this file only, and the compiler is not allowed to share these types
114 // across test files during template instantiation. Specifically, `Operands` has
115 // various layouts across generated tests so it absolutely cannot be shared.
116 
117 #ifdef VIXL_INCLUDE_TARGET_T32
118 namespace {
119 
120 // Values to be passed to the assembler to produce the instruction under test.
121 struct Operands {
122   Condition cond;
123   Register rd;
124   Register rn;
125   Register rm;
126 };
127 
128 // This structure contains all data needed to test one specific
129 // instruction.
130 struct TestData {
131   // The `operands` field represents what to pass to the assembler to
132   // produce the instruction.
133   Operands operands;
134   // True if we need to generate an IT instruction for this test to be valid.
135   bool in_it_block;
136   // The condition to give the IT instruction, this will be set to "al" by
137   // default.
138   Condition it_condition;
139   // Description of the operands, used for error reporting.
140   const char* operands_description;
141   // Unique identifier, used for generating traces.
142   const char* identifier;
143 };
144 
145 struct TestResult {
146   size_t size;
147   const byte* encoding;
148 };
149 
150 // Each element of this array produce one instruction encoding.
151 const TestData kTests[] =
152     {{{al, r5, r12, r2}, false, al, "al r5 r12 r2", "al_r5_r12_r2"},
153      {{al, r7, r3, r12}, false, al, "al r7 r3 r12", "al_r7_r3_r12"},
154      {{al, r1, r2, r10}, false, al, "al r1 r2 r10", "al_r1_r2_r10"},
155      {{al, r2, r7, r1}, false, al, "al r2 r7 r1", "al_r2_r7_r1"},
156      {{al, r11, r9, r0}, false, al, "al r11 r9 r0", "al_r11_r9_r0"},
157      {{al, r6, r9, r10}, false, al, "al r6 r9 r10", "al_r6_r9_r10"},
158      {{al, r0, r5, r0}, false, al, "al r0 r5 r0", "al_r0_r5_r0"},
159      {{al, r4, r6, r6}, false, al, "al r4 r6 r6", "al_r4_r6_r6"},
160      {{al, r1, r13, r1}, false, al, "al r1 r13 r1", "al_r1_r13_r1"},
161      {{al, r8, r14, r8}, false, al, "al r8 r14 r8", "al_r8_r14_r8"},
162      {{al, r6, r12, r11}, false, al, "al r6 r12 r11", "al_r6_r12_r11"},
163      {{al, r7, r2, r8}, false, al, "al r7 r2 r8", "al_r7_r2_r8"},
164      {{al, r13, r6, r7}, false, al, "al r13 r6 r7", "al_r13_r6_r7"},
165      {{al, r10, r3, r13}, false, al, "al r10 r3 r13", "al_r10_r3_r13"},
166      {{al, r10, r10, r2}, false, al, "al r10 r10 r2", "al_r10_r10_r2"},
167      {{al, r3, r2, r12}, false, al, "al r3 r2 r12", "al_r3_r2_r12"},
168      {{al, r0, r9, r7}, false, al, "al r0 r9 r7", "al_r0_r9_r7"},
169      {{al, r4, r1, r5}, false, al, "al r4 r1 r5", "al_r4_r1_r5"},
170      {{al, r12, r12, r1}, false, al, "al r12 r12 r1", "al_r12_r12_r1"},
171      {{al, r4, r12, r2}, false, al, "al r4 r12 r2", "al_r4_r12_r2"},
172      {{al, r9, r3, r4}, false, al, "al r9 r3 r4", "al_r9_r3_r4"},
173      {{al, r13, r11, r3}, false, al, "al r13 r11 r3", "al_r13_r11_r3"},
174      {{al, r5, r1, r5}, false, al, "al r5 r1 r5", "al_r5_r1_r5"},
175      {{al, r14, r6, r2}, false, al, "al r14 r6 r2", "al_r14_r6_r2"},
176      {{al, r1, r2, r0}, false, al, "al r1 r2 r0", "al_r1_r2_r0"},
177      {{al, r1, r8, r14}, false, al, "al r1 r8 r14", "al_r1_r8_r14"},
178      {{al, r12, r9, r10}, false, al, "al r12 r9 r10", "al_r12_r9_r10"},
179      {{al, r2, r2, r6}, false, al, "al r2 r2 r6", "al_r2_r2_r6"},
180      {{al, r13, r6, r2}, false, al, "al r13 r6 r2", "al_r13_r6_r2"},
181      {{al, r8, r4, r3}, false, al, "al r8 r4 r3", "al_r8_r4_r3"},
182      {{al, r7, r11, r3}, false, al, "al r7 r11 r3", "al_r7_r11_r3"},
183      {{al, r8, r1, r13}, false, al, "al r8 r1 r13", "al_r8_r1_r13"},
184      {{al, r1, r11, r6}, false, al, "al r1 r11 r6", "al_r1_r11_r6"},
185      {{al, r2, r3, r10}, false, al, "al r2 r3 r10", "al_r2_r3_r10"},
186      {{al, r0, r9, r0}, false, al, "al r0 r9 r0", "al_r0_r9_r0"},
187      {{al, r6, r6, r1}, false, al, "al r6 r6 r1", "al_r6_r6_r1"},
188      {{al, r5, r7, r10}, false, al, "al r5 r7 r10", "al_r5_r7_r10"},
189      {{al, r10, r14, r7}, false, al, "al r10 r14 r7", "al_r10_r14_r7"},
190      {{al, r8, r2, r12}, false, al, "al r8 r2 r12", "al_r8_r2_r12"},
191      {{al, r11, r12, r3}, false, al, "al r11 r12 r3", "al_r11_r12_r3"},
192      {{al, r0, r4, r13}, false, al, "al r0 r4 r13", "al_r0_r4_r13"},
193      {{al, r13, r0, r8}, false, al, "al r13 r0 r8", "al_r13_r0_r8"},
194      {{al, r7, r14, r12}, false, al, "al r7 r14 r12", "al_r7_r14_r12"},
195      {{al, r8, r11, r10}, false, al, "al r8 r11 r10", "al_r8_r11_r10"},
196      {{al, r8, r13, r14}, false, al, "al r8 r13 r14", "al_r8_r13_r14"},
197      {{al, r13, r7, r1}, false, al, "al r13 r7 r1", "al_r13_r7_r1"},
198      {{al, r10, r0, r14}, false, al, "al r10 r0 r14", "al_r10_r0_r14"},
199      {{al, r6, r4, r12}, false, al, "al r6 r4 r12", "al_r6_r4_r12"},
200      {{al, r8, r8, r12}, false, al, "al r8 r8 r12", "al_r8_r8_r12"},
201      {{al, r10, r9, r4}, false, al, "al r10 r9 r4", "al_r10_r9_r4"},
202      {{al, r14, r9, r8}, false, al, "al r14 r9 r8", "al_r14_r9_r8"},
203      {{al, r9, r1, r0}, false, al, "al r9 r1 r0", "al_r9_r1_r0"},
204      {{al, r14, r4, r11}, false, al, "al r14 r4 r11", "al_r14_r4_r11"},
205      {{al, r13, r1, r12}, false, al, "al r13 r1 r12", "al_r13_r1_r12"},
206      {{al, r6, r14, r5}, false, al, "al r6 r14 r5", "al_r6_r14_r5"},
207      {{al, r7, r7, r6}, false, al, "al r7 r7 r6", "al_r7_r7_r6"},
208      {{al, r6, r14, r0}, false, al, "al r6 r14 r0", "al_r6_r14_r0"},
209      {{al, r7, r5, r11}, false, al, "al r7 r5 r11", "al_r7_r5_r11"},
210      {{al, r9, r10, r9}, false, al, "al r9 r10 r9", "al_r9_r10_r9"},
211      {{al, r4, r5, r0}, false, al, "al r4 r5 r0", "al_r4_r5_r0"},
212      {{al, r3, r11, r2}, false, al, "al r3 r11 r2", "al_r3_r11_r2"},
213      {{al, r1, r4, r3}, false, al, "al r1 r4 r3", "al_r1_r4_r3"},
214      {{al, r13, r14, r6}, false, al, "al r13 r14 r6", "al_r13_r14_r6"},
215      {{al, r1, r8, r13}, false, al, "al r1 r8 r13", "al_r1_r8_r13"},
216      {{al, r4, r2, r7}, false, al, "al r4 r2 r7", "al_r4_r2_r7"},
217      {{al, r1, r11, r3}, false, al, "al r1 r11 r3", "al_r1_r11_r3"},
218      {{al, r9, r3, r6}, false, al, "al r9 r3 r6", "al_r9_r3_r6"},
219      {{al, r0, r10, r5}, false, al, "al r0 r10 r5", "al_r0_r10_r5"},
220      {{al, r5, r7, r2}, false, al, "al r5 r7 r2", "al_r5_r7_r2"},
221      {{al, r1, r14, r9}, false, al, "al r1 r14 r9", "al_r1_r14_r9"},
222      {{al, r9, r12, r11}, false, al, "al r9 r12 r11", "al_r9_r12_r11"},
223      {{al, r0, r11, r8}, false, al, "al r0 r11 r8", "al_r0_r11_r8"},
224      {{al, r9, r10, r12}, false, al, "al r9 r10 r12", "al_r9_r10_r12"},
225      {{al, r8, r5, r5}, false, al, "al r8 r5 r5", "al_r8_r5_r5"},
226      {{al, r10, r3, r10}, false, al, "al r10 r3 r10", "al_r10_r3_r10"},
227      {{al, r13, r5, r8}, false, al, "al r13 r5 r8", "al_r13_r5_r8"},
228      {{al, r11, r4, r2}, false, al, "al r11 r4 r2", "al_r11_r4_r2"},
229      {{al, r1, r10, r7}, false, al, "al r1 r10 r7", "al_r1_r10_r7"},
230      {{al, r12, r4, r1}, false, al, "al r12 r4 r1", "al_r12_r4_r1"},
231      {{al, r11, r14, r8}, false, al, "al r11 r14 r8", "al_r11_r14_r8"},
232      {{al, r1, r11, r8}, false, al, "al r1 r11 r8", "al_r1_r11_r8"},
233      {{al, r3, r11, r10}, false, al, "al r3 r11 r10", "al_r3_r11_r10"},
234      {{al, r6, r7, r0}, false, al, "al r6 r7 r0", "al_r6_r7_r0"},
235      {{al, r6, r13, r9}, false, al, "al r6 r13 r9", "al_r6_r13_r9"},
236      {{al, r9, r14, r0}, false, al, "al r9 r14 r0", "al_r9_r14_r0"},
237      {{al, r6, r8, r2}, false, al, "al r6 r8 r2", "al_r6_r8_r2"},
238      {{al, r7, r11, r12}, false, al, "al r7 r11 r12", "al_r7_r11_r12"},
239      {{al, r9, r3, r0}, false, al, "al r9 r3 r0", "al_r9_r3_r0"},
240      {{al, r5, r3, r5}, false, al, "al r5 r3 r5", "al_r5_r3_r5"},
241      {{al, r5, r10, r8}, false, al, "al r5 r10 r8", "al_r5_r10_r8"},
242      {{al, r12, r4, r13}, false, al, "al r12 r4 r13", "al_r12_r4_r13"},
243      {{al, r7, r12, r10}, false, al, "al r7 r12 r10", "al_r7_r12_r10"},
244      {{al, r6, r13, r11}, false, al, "al r6 r13 r11", "al_r6_r13_r11"},
245      {{al, r5, r3, r7}, false, al, "al r5 r3 r7", "al_r5_r3_r7"},
246      {{al, r11, r4, r6}, false, al, "al r11 r4 r6", "al_r11_r4_r6"},
247      {{al, r10, r2, r3}, false, al, "al r10 r2 r3", "al_r10_r2_r3"},
248      {{al, r0, r2, r1}, false, al, "al r0 r2 r1", "al_r0_r2_r1"},
249      {{al, r11, r5, r7}, false, al, "al r11 r5 r7", "al_r11_r5_r7"},
250      {{al, r14, r10, r1}, false, al, "al r14 r10 r1", "al_r14_r10_r1"},
251      {{al, r1, r4, r1}, false, al, "al r1 r4 r1", "al_r1_r4_r1"},
252      {{al, r9, r10, r11}, false, al, "al r9 r10 r11", "al_r9_r10_r11"},
253      {{al, r6, r8, r0}, false, al, "al r6 r8 r0", "al_r6_r8_r0"},
254      {{al, r0, r10, r11}, false, al, "al r0 r10 r11", "al_r0_r10_r11"},
255      {{al, r14, r1, r4}, false, al, "al r14 r1 r4", "al_r14_r1_r4"},
256      {{al, r7, r9, r5}, false, al, "al r7 r9 r5", "al_r7_r9_r5"},
257      {{al, r13, r4, r2}, false, al, "al r13 r4 r2", "al_r13_r4_r2"},
258      {{al, r5, r6, r3}, false, al, "al r5 r6 r3", "al_r5_r6_r3"},
259      {{al, r13, r4, r8}, false, al, "al r13 r4 r8", "al_r13_r4_r8"},
260      {{al, r11, r11, r12}, false, al, "al r11 r11 r12", "al_r11_r11_r12"},
261      {{al, r3, r12, r6}, false, al, "al r3 r12 r6", "al_r3_r12_r6"},
262      {{al, r4, r10, r1}, false, al, "al r4 r10 r1", "al_r4_r10_r1"},
263      {{al, r7, r8, r12}, false, al, "al r7 r8 r12", "al_r7_r8_r12"},
264      {{al, r11, r3, r3}, false, al, "al r11 r3 r3", "al_r11_r3_r3"},
265      {{al, r14, r6, r6}, false, al, "al r14 r6 r6", "al_r14_r6_r6"},
266      {{al, r1, r12, r1}, false, al, "al r1 r12 r1", "al_r1_r12_r1"},
267      {{al, r13, r5, r7}, false, al, "al r13 r5 r7", "al_r13_r5_r7"},
268      {{al, r6, r10, r8}, false, al, "al r6 r10 r8", "al_r6_r10_r8"},
269      {{al, r7, r13, r5}, false, al, "al r7 r13 r5", "al_r7_r13_r5"},
270      {{al, r12, r13, r4}, false, al, "al r12 r13 r4", "al_r12_r13_r4"},
271      {{al, r7, r0, r8}, false, al, "al r7 r0 r8", "al_r7_r0_r8"},
272      {{al, r7, r11, r9}, false, al, "al r7 r11 r9", "al_r7_r11_r9"},
273      {{al, r8, r9, r1}, false, al, "al r8 r9 r1", "al_r8_r9_r1"},
274      {{al, r14, r5, r10}, false, al, "al r14 r5 r10", "al_r14_r5_r10"},
275      {{al, r4, r9, r14}, false, al, "al r4 r9 r14", "al_r4_r9_r14"},
276      {{al, r10, r14, r9}, false, al, "al r10 r14 r9", "al_r10_r14_r9"},
277      {{al, r0, r1, r11}, false, al, "al r0 r1 r11", "al_r0_r1_r11"},
278      {{al, r11, r0, r11}, false, al, "al r11 r0 r11", "al_r11_r0_r11"},
279      {{al, r10, r10, r7}, false, al, "al r10 r10 r7", "al_r10_r10_r7"},
280      {{al, r8, r12, r7}, false, al, "al r8 r12 r7", "al_r8_r12_r7"},
281      {{al, r9, r4, r10}, false, al, "al r9 r4 r10", "al_r9_r4_r10"},
282      {{al, r8, r11, r14}, false, al, "al r8 r11 r14", "al_r8_r11_r14"},
283      {{al, r8, r4, r7}, false, al, "al r8 r4 r7", "al_r8_r4_r7"},
284      {{al, r13, r9, r11}, false, al, "al r13 r9 r11", "al_r13_r9_r11"},
285      {{al, r2, r5, r7}, false, al, "al r2 r5 r7", "al_r2_r5_r7"},
286      {{al, r9, r6, r8}, false, al, "al r9 r6 r8", "al_r9_r6_r8"},
287      {{al, r2, r4, r10}, false, al, "al r2 r4 r10", "al_r2_r4_r10"},
288      {{al, r2, r9, r4}, false, al, "al r2 r9 r4", "al_r2_r9_r4"},
289      {{al, r12, r8, r12}, false, al, "al r12 r8 r12", "al_r12_r8_r12"},
290      {{al, r0, r12, r2}, false, al, "al r0 r12 r2", "al_r0_r12_r2"},
291      {{al, r4, r11, r13}, false, al, "al r4 r11 r13", "al_r4_r11_r13"},
292      {{al, r7, r12, r14}, false, al, "al r7 r12 r14", "al_r7_r12_r14"},
293      {{al, r4, r10, r3}, false, al, "al r4 r10 r3", "al_r4_r10_r3"},
294      {{al, r5, r14, r7}, false, al, "al r5 r14 r7", "al_r5_r14_r7"},
295      {{al, r1, r6, r10}, false, al, "al r1 r6 r10", "al_r1_r6_r10"},
296      {{al, r0, r10, r10}, false, al, "al r0 r10 r10", "al_r0_r10_r10"},
297      {{al, r6, r3, r3}, false, al, "al r6 r3 r3", "al_r6_r3_r3"},
298      {{al, r2, r14, r6}, false, al, "al r2 r14 r6", "al_r2_r14_r6"},
299      {{al, r7, r4, r2}, false, al, "al r7 r4 r2", "al_r7_r4_r2"},
300      {{al, r3, r7, r9}, false, al, "al r3 r7 r9", "al_r3_r7_r9"},
301      {{al, r0, r4, r12}, false, al, "al r0 r4 r12", "al_r0_r4_r12"},
302      {{al, r8, r14, r11}, false, al, "al r8 r14 r11", "al_r8_r14_r11"},
303      {{al, r2, r8, r11}, false, al, "al r2 r8 r11", "al_r2_r8_r11"},
304      {{al, r14, r11, r8}, false, al, "al r14 r11 r8", "al_r14_r11_r8"},
305      {{al, r5, r10, r12}, false, al, "al r5 r10 r12", "al_r5_r10_r12"},
306      {{al, r0, r12, r5}, false, al, "al r0 r12 r5", "al_r0_r12_r5"},
307      {{al, r4, r4, r7}, false, al, "al r4 r4 r7", "al_r4_r4_r7"},
308      {{al, r5, r2, r10}, false, al, "al r5 r2 r10", "al_r5_r2_r10"},
309      {{al, r14, r0, r0}, false, al, "al r14 r0 r0", "al_r14_r0_r0"},
310      {{al, r1, r14, r4}, false, al, "al r1 r14 r4", "al_r1_r14_r4"},
311      {{al, r1, r0, r2}, false, al, "al r1 r0 r2", "al_r1_r0_r2"},
312      {{al, r11, r10, r7}, false, al, "al r11 r10 r7", "al_r11_r10_r7"},
313      {{al, r13, r10, r4}, false, al, "al r13 r10 r4", "al_r13_r10_r4"},
314      {{al, r13, r1, r9}, false, al, "al r13 r1 r9", "al_r13_r1_r9"},
315      {{al, r8, r1, r9}, false, al, "al r8 r1 r9", "al_r8_r1_r9"},
316      {{al, r6, r3, r9}, false, al, "al r6 r3 r9", "al_r6_r3_r9"},
317      {{al, r10, r6, r8}, false, al, "al r10 r6 r8", "al_r10_r6_r8"},
318      {{al, r6, r11, r9}, false, al, "al r6 r11 r9", "al_r6_r11_r9"},
319      {{al, r1, r13, r14}, false, al, "al r1 r13 r14", "al_r1_r13_r14"},
320      {{al, r1, r14, r12}, false, al, "al r1 r14 r12", "al_r1_r14_r12"},
321      {{al, r0, r1, r4}, false, al, "al r0 r1 r4", "al_r0_r1_r4"},
322      {{al, r8, r13, r1}, false, al, "al r8 r13 r1", "al_r8_r13_r1"},
323      {{al, r7, r14, r5}, false, al, "al r7 r14 r5", "al_r7_r14_r5"},
324      {{al, r5, r13, r8}, false, al, "al r5 r13 r8", "al_r5_r13_r8"},
325      {{al, r11, r10, r13}, false, al, "al r11 r10 r13", "al_r11_r10_r13"},
326      {{al, r7, r13, r2}, false, al, "al r7 r13 r2", "al_r7_r13_r2"},
327      {{al, r2, r2, r13}, false, al, "al r2 r2 r13", "al_r2_r2_r13"},
328      {{al, r1, r7, r5}, false, al, "al r1 r7 r5", "al_r1_r7_r5"},
329      {{al, r12, r6, r12}, false, al, "al r12 r6 r12", "al_r12_r6_r12"},
330      {{al, r5, r9, r11}, false, al, "al r5 r9 r11", "al_r5_r9_r11"},
331      {{al, r12, r7, r1}, false, al, "al r12 r7 r1", "al_r12_r7_r1"},
332      {{al, r13, r9, r9}, false, al, "al r13 r9 r9", "al_r13_r9_r9"},
333      {{al, r10, r4, r13}, false, al, "al r10 r4 r13", "al_r10_r4_r13"},
334      {{al, r9, r2, r10}, false, al, "al r9 r2 r10", "al_r9_r2_r10"},
335      {{al, r1, r5, r13}, false, al, "al r1 r5 r13", "al_r1_r5_r13"},
336      {{al, r12, r3, r9}, false, al, "al r12 r3 r9", "al_r12_r3_r9"},
337      {{al, r6, r3, r0}, false, al, "al r6 r3 r0", "al_r6_r3_r0"},
338      {{al, r9, r8, r8}, false, al, "al r9 r8 r8", "al_r9_r8_r8"},
339      {{al, r6, r3, r4}, false, al, "al r6 r3 r4", "al_r6_r3_r4"},
340      {{al, r12, r9, r0}, false, al, "al r12 r9 r0", "al_r12_r9_r0"},
341      {{al, r4, r10, r0}, false, al, "al r4 r10 r0", "al_r4_r10_r0"},
342      {{al, r3, r13, r4}, false, al, "al r3 r13 r4", "al_r3_r13_r4"},
343      {{al, r2, r10, r14}, false, al, "al r2 r10 r14", "al_r2_r10_r14"},
344      {{al, r3, r9, r8}, false, al, "al r3 r9 r8", "al_r3_r9_r8"},
345      {{al, r12, r4, r8}, false, al, "al r12 r4 r8", "al_r12_r4_r8"},
346      {{al, r2, r1, r11}, false, al, "al r2 r1 r11", "al_r2_r1_r11"},
347      {{al, r1, r7, r0}, false, al, "al r1 r7 r0", "al_r1_r7_r0"},
348      {{al, r0, r1, r2}, false, al, "al r0 r1 r2", "al_r0_r1_r2"},
349      {{al, r11, r12, r7}, false, al, "al r11 r12 r7", "al_r11_r12_r7"},
350      {{al, r12, r14, r7}, false, al, "al r12 r14 r7", "al_r12_r14_r7"},
351      {{al, r0, r3, r10}, false, al, "al r0 r3 r10", "al_r0_r3_r10"},
352      {{al, r3, r6, r7}, false, al, "al r3 r6 r7", "al_r3_r6_r7"},
353      {{al, r0, r10, r1}, false, al, "al r0 r10 r1", "al_r0_r10_r1"},
354      {{al, r8, r11, r5}, false, al, "al r8 r11 r5", "al_r8_r11_r5"},
355      {{al, r1, r10, r8}, false, al, "al r1 r10 r8", "al_r1_r10_r8"},
356      {{al, r7, r8, r5}, false, al, "al r7 r8 r5", "al_r7_r8_r5"},
357      {{al, r9, r9, r2}, false, al, "al r9 r9 r2", "al_r9_r9_r2"},
358      {{al, r13, r13, r0}, false, al, "al r13 r13 r0", "al_r13_r13_r0"},
359      {{al, r9, r10, r5}, false, al, "al r9 r10 r5", "al_r9_r10_r5"},
360      {{al, r6, r6, r14}, false, al, "al r6 r6 r14", "al_r6_r6_r14"},
361      {{al, r1, r8, r5}, false, al, "al r1 r8 r5", "al_r1_r8_r5"},
362      {{al, r1, r4, r8}, false, al, "al r1 r4 r8", "al_r1_r4_r8"},
363      {{al, r0, r2, r12}, false, al, "al r0 r2 r12", "al_r0_r2_r12"},
364      {{al, r5, r14, r1}, false, al, "al r5 r14 r1", "al_r5_r14_r1"},
365      {{al, r2, r1, r5}, false, al, "al r2 r1 r5", "al_r2_r1_r5"},
366      {{al, r11, r11, r6}, false, al, "al r11 r11 r6", "al_r11_r11_r6"},
367      {{al, r3, r11, r1}, false, al, "al r3 r11 r1", "al_r3_r11_r1"},
368      {{al, r13, r14, r9}, false, al, "al r13 r14 r9", "al_r13_r14_r9"},
369      {{al, r7, r1, r5}, false, al, "al r7 r1 r5", "al_r7_r1_r5"},
370      {{al, r10, r14, r3}, false, al, "al r10 r14 r3", "al_r10_r14_r3"},
371      {{al, r5, r6, r14}, false, al, "al r5 r6 r14", "al_r5_r6_r14"},
372      {{al, r1, r7, r7}, false, al, "al r1 r7 r7", "al_r1_r7_r7"},
373      {{al, r12, r5, r14}, false, al, "al r12 r5 r14", "al_r12_r5_r14"},
374      {{al, r10, r5, r1}, false, al, "al r10 r5 r1", "al_r10_r5_r1"},
375      {{al, r10, r8, r3}, false, al, "al r10 r8 r3", "al_r10_r8_r3"},
376      {{al, r4, r6, r5}, false, al, "al r4 r6 r5", "al_r4_r6_r5"},
377      {{al, r4, r3, r2}, false, al, "al r4 r3 r2", "al_r4_r3_r2"},
378      {{al, r10, r13, r13}, false, al, "al r10 r13 r13", "al_r10_r13_r13"},
379      {{al, r1, r10, r4}, false, al, "al r1 r10 r4", "al_r1_r10_r4"},
380      {{al, r8, r10, r12}, false, al, "al r8 r10 r12", "al_r8_r10_r12"},
381      {{al, r6, r0, r13}, false, al, "al r6 r0 r13", "al_r6_r0_r13"},
382      {{al, r1, r12, r0}, false, al, "al r1 r12 r0", "al_r1_r12_r0"},
383      {{al, r4, r13, r1}, false, al, "al r4 r13 r1", "al_r4_r13_r1"},
384      {{al, r10, r0, r0}, false, al, "al r10 r0 r0", "al_r10_r0_r0"},
385      {{al, r13, r6, r4}, false, al, "al r13 r6 r4", "al_r13_r6_r4"},
386      {{al, r0, r3, r14}, false, al, "al r0 r3 r14", "al_r0_r3_r14"},
387      {{al, r7, r11, r2}, false, al, "al r7 r11 r2", "al_r7_r11_r2"},
388      {{al, r9, r11, r12}, false, al, "al r9 r11 r12", "al_r9_r11_r12"},
389      {{al, r2, r14, r7}, false, al, "al r2 r14 r7", "al_r2_r14_r7"},
390      {{al, r10, r14, r8}, false, al, "al r10 r14 r8", "al_r10_r14_r8"},
391      {{al, r1, r3, r2}, false, al, "al r1 r3 r2", "al_r1_r3_r2"},
392      {{al, r0, r1, r8}, false, al, "al r0 r1 r8", "al_r0_r1_r8"},
393      {{al, r2, r9, r13}, false, al, "al r2 r9 r13", "al_r2_r9_r13"},
394      {{al, r2, r3, r5}, false, al, "al r2 r3 r5", "al_r2_r3_r5"},
395      {{al, r13, r9, r3}, false, al, "al r13 r9 r3", "al_r13_r9_r3"},
396      {{al, r3, r8, r8}, false, al, "al r3 r8 r8", "al_r3_r8_r8"},
397      {{al, r0, r8, r7}, false, al, "al r0 r8 r7", "al_r0_r8_r7"},
398      {{al, r9, r14, r7}, false, al, "al r9 r14 r7", "al_r9_r14_r7"},
399      {{al, r10, r3, r11}, false, al, "al r10 r3 r11", "al_r10_r3_r11"},
400      {{al, r1, r14, r13}, false, al, "al r1 r14 r13", "al_r1_r14_r13"},
401      {{al, r14, r4, r1}, false, al, "al r14 r4 r1", "al_r14_r4_r1"},
402      {{al, r12, r12, r4}, false, al, "al r12 r12 r4", "al_r12_r12_r4"},
403      {{al, r0, r12, r0}, false, al, "al r0 r12 r0", "al_r0_r12_r0"},
404      {{al, r1, r5, r1}, false, al, "al r1 r5 r1", "al_r1_r5_r1"},
405      {{al, r3, r9, r6}, false, al, "al r3 r9 r6", "al_r3_r9_r6"},
406      {{al, r2, r11, r0}, false, al, "al r2 r11 r0", "al_r2_r11_r0"},
407      {{al, r2, r6, r11}, false, al, "al r2 r6 r11", "al_r2_r6_r11"},
408      {{al, r8, r12, r8}, false, al, "al r8 r12 r8", "al_r8_r12_r8"},
409      {{al, r2, r12, r10}, false, al, "al r2 r12 r10", "al_r2_r12_r10"},
410      {{al, r4, r4, r10}, false, al, "al r4 r4 r10", "al_r4_r4_r10"},
411      {{al, r6, r14, r7}, false, al, "al r6 r14 r7", "al_r6_r14_r7"},
412      {{al, r11, r10, r14}, false, al, "al r11 r10 r14", "al_r11_r10_r14"},
413      {{al, r13, r0, r5}, false, al, "al r13 r0 r5", "al_r13_r0_r5"},
414      {{al, r4, r3, r7}, false, al, "al r4 r3 r7", "al_r4_r3_r7"},
415      {{al, r13, r7, r8}, false, al, "al r13 r7 r8", "al_r13_r7_r8"},
416      {{al, r9, r2, r8}, false, al, "al r9 r2 r8", "al_r9_r2_r8"},
417      {{al, r4, r13, r11}, false, al, "al r4 r13 r11", "al_r4_r13_r11"},
418      {{al, r4, r7, r14}, false, al, "al r4 r7 r14", "al_r4_r7_r14"},
419      {{al, r7, r10, r4}, false, al, "al r7 r10 r4", "al_r7_r10_r4"},
420      {{al, r10, r9, r12}, false, al, "al r10 r9 r12", "al_r10_r9_r12"},
421      {{al, r8, r13, r3}, false, al, "al r8 r13 r3", "al_r8_r13_r3"},
422      {{al, r3, r7, r14}, false, al, "al r3 r7 r14", "al_r3_r7_r14"},
423      {{al, r12, r0, r6}, false, al, "al r12 r0 r6", "al_r12_r0_r6"},
424      {{al, r10, r9, r11}, false, al, "al r10 r9 r11", "al_r10_r9_r11"},
425      {{al, r3, r10, r1}, false, al, "al r3 r10 r1", "al_r3_r10_r1"},
426      {{al, r5, r0, r11}, false, al, "al r5 r0 r11", "al_r5_r0_r11"},
427      {{al, r8, r13, r2}, false, al, "al r8 r13 r2", "al_r8_r13_r2"},
428      {{al, r5, r4, r10}, false, al, "al r5 r4 r10", "al_r5_r4_r10"},
429      {{al, r3, r7, r2}, false, al, "al r3 r7 r2", "al_r3_r7_r2"},
430      {{al, r14, r14, r6}, false, al, "al r14 r14 r6", "al_r14_r14_r6"},
431      {{al, r6, r14, r13}, false, al, "al r6 r14 r13", "al_r6_r14_r13"},
432      {{al, r2, r2, r10}, false, al, "al r2 r2 r10", "al_r2_r2_r10"},
433      {{al, r5, r13, r2}, false, al, "al r5 r13 r2", "al_r5_r13_r2"},
434      {{al, r7, r14, r9}, false, al, "al r7 r14 r9", "al_r7_r14_r9"},
435      {{al, r5, r6, r7}, false, al, "al r5 r6 r7", "al_r5_r6_r7"},
436      {{al, r5, r3, r6}, false, al, "al r5 r3 r6", "al_r5_r3_r6"},
437      {{al, r2, r1, r14}, false, al, "al r2 r1 r14", "al_r2_r1_r14"},
438      {{al, r13, r11, r10}, false, al, "al r13 r11 r10", "al_r13_r11_r10"},
439      {{al, r7, r9, r12}, false, al, "al r7 r9 r12", "al_r7_r9_r12"},
440      {{al, r11, r14, r11}, false, al, "al r11 r14 r11", "al_r11_r14_r11"},
441      {{al, r3, r10, r9}, false, al, "al r3 r10 r9", "al_r3_r10_r9"},
442      {{al, r0, r4, r4}, false, al, "al r0 r4 r4", "al_r0_r4_r4"},
443      {{al, r5, r8, r3}, false, al, "al r5 r8 r3", "al_r5_r8_r3"},
444      {{al, r10, r5, r13}, false, al, "al r10 r5 r13", "al_r10_r5_r13"},
445      {{al, r8, r3, r12}, false, al, "al r8 r3 r12", "al_r8_r3_r12"},
446      {{al, r2, r1, r12}, false, al, "al r2 r1 r12", "al_r2_r1_r12"},
447      {{al, r6, r8, r7}, false, al, "al r6 r8 r7", "al_r6_r8_r7"},
448      {{al, r13, r13, r6}, false, al, "al r13 r13 r6", "al_r13_r13_r6"},
449      {{al, r7, r2, r3}, false, al, "al r7 r2 r3", "al_r7_r2_r3"},
450      {{al, r3, r6, r3}, false, al, "al r3 r6 r3", "al_r3_r6_r3"},
451      {{al, r6, r5, r7}, false, al, "al r6 r5 r7", "al_r6_r5_r7"}};
452 
453 // These headers each contain an array of `TestResult` with the reference output
454 // values. The reference arrays are names `kReference{mnemonic}`.
455 #include "aarch32/traces/assembler-cond-rd-rn-rm-mul-t32.h"
456 #include "aarch32/traces/assembler-cond-rd-rn-rm-qadd-t32.h"
457 #include "aarch32/traces/assembler-cond-rd-rn-rm-qadd16-t32.h"
458 #include "aarch32/traces/assembler-cond-rd-rn-rm-qadd8-t32.h"
459 #include "aarch32/traces/assembler-cond-rd-rn-rm-qasx-t32.h"
460 #include "aarch32/traces/assembler-cond-rd-rn-rm-qdadd-t32.h"
461 #include "aarch32/traces/assembler-cond-rd-rn-rm-qdsub-t32.h"
462 #include "aarch32/traces/assembler-cond-rd-rn-rm-qsax-t32.h"
463 #include "aarch32/traces/assembler-cond-rd-rn-rm-qsub-t32.h"
464 #include "aarch32/traces/assembler-cond-rd-rn-rm-qsub16-t32.h"
465 #include "aarch32/traces/assembler-cond-rd-rn-rm-qsub8-t32.h"
466 #include "aarch32/traces/assembler-cond-rd-rn-rm-sadd16-t32.h"
467 #include "aarch32/traces/assembler-cond-rd-rn-rm-sadd8-t32.h"
468 #include "aarch32/traces/assembler-cond-rd-rn-rm-sasx-t32.h"
469 #include "aarch32/traces/assembler-cond-rd-rn-rm-sdiv-t32.h"
470 #include "aarch32/traces/assembler-cond-rd-rn-rm-sel-t32.h"
471 #include "aarch32/traces/assembler-cond-rd-rn-rm-shadd16-t32.h"
472 #include "aarch32/traces/assembler-cond-rd-rn-rm-shadd8-t32.h"
473 #include "aarch32/traces/assembler-cond-rd-rn-rm-shasx-t32.h"
474 #include "aarch32/traces/assembler-cond-rd-rn-rm-shsax-t32.h"
475 #include "aarch32/traces/assembler-cond-rd-rn-rm-shsub16-t32.h"
476 #include "aarch32/traces/assembler-cond-rd-rn-rm-shsub8-t32.h"
477 #include "aarch32/traces/assembler-cond-rd-rn-rm-smmul-t32.h"
478 #include "aarch32/traces/assembler-cond-rd-rn-rm-smmulr-t32.h"
479 #include "aarch32/traces/assembler-cond-rd-rn-rm-smuad-t32.h"
480 #include "aarch32/traces/assembler-cond-rd-rn-rm-smuadx-t32.h"
481 #include "aarch32/traces/assembler-cond-rd-rn-rm-smulbb-t32.h"
482 #include "aarch32/traces/assembler-cond-rd-rn-rm-smulbt-t32.h"
483 #include "aarch32/traces/assembler-cond-rd-rn-rm-smultb-t32.h"
484 #include "aarch32/traces/assembler-cond-rd-rn-rm-smultt-t32.h"
485 #include "aarch32/traces/assembler-cond-rd-rn-rm-smulwb-t32.h"
486 #include "aarch32/traces/assembler-cond-rd-rn-rm-smulwt-t32.h"
487 #include "aarch32/traces/assembler-cond-rd-rn-rm-smusd-t32.h"
488 #include "aarch32/traces/assembler-cond-rd-rn-rm-smusdx-t32.h"
489 #include "aarch32/traces/assembler-cond-rd-rn-rm-ssax-t32.h"
490 #include "aarch32/traces/assembler-cond-rd-rn-rm-ssub16-t32.h"
491 #include "aarch32/traces/assembler-cond-rd-rn-rm-ssub8-t32.h"
492 #include "aarch32/traces/assembler-cond-rd-rn-rm-uadd16-t32.h"
493 #include "aarch32/traces/assembler-cond-rd-rn-rm-uadd8-t32.h"
494 #include "aarch32/traces/assembler-cond-rd-rn-rm-uasx-t32.h"
495 #include "aarch32/traces/assembler-cond-rd-rn-rm-udiv-t32.h"
496 #include "aarch32/traces/assembler-cond-rd-rn-rm-uhadd16-t32.h"
497 #include "aarch32/traces/assembler-cond-rd-rn-rm-uhadd8-t32.h"
498 #include "aarch32/traces/assembler-cond-rd-rn-rm-uhasx-t32.h"
499 #include "aarch32/traces/assembler-cond-rd-rn-rm-uhsax-t32.h"
500 #include "aarch32/traces/assembler-cond-rd-rn-rm-uhsub16-t32.h"
501 #include "aarch32/traces/assembler-cond-rd-rn-rm-uhsub8-t32.h"
502 #include "aarch32/traces/assembler-cond-rd-rn-rm-uqadd16-t32.h"
503 #include "aarch32/traces/assembler-cond-rd-rn-rm-uqadd8-t32.h"
504 #include "aarch32/traces/assembler-cond-rd-rn-rm-uqasx-t32.h"
505 #include "aarch32/traces/assembler-cond-rd-rn-rm-uqsax-t32.h"
506 #include "aarch32/traces/assembler-cond-rd-rn-rm-uqsub16-t32.h"
507 #include "aarch32/traces/assembler-cond-rd-rn-rm-uqsub8-t32.h"
508 #include "aarch32/traces/assembler-cond-rd-rn-rm-usad8-t32.h"
509 #include "aarch32/traces/assembler-cond-rd-rn-rm-usax-t32.h"
510 #include "aarch32/traces/assembler-cond-rd-rn-rm-usub16-t32.h"
511 #include "aarch32/traces/assembler-cond-rd-rn-rm-usub8-t32.h"
512 
513 
514 // The maximum number of errors to report in detail for each test.
515 const unsigned kErrorReportLimit = 8;
516 
517 typedef void (MacroAssembler::*Fn)(Condition cond,
518                                    Register rd,
519                                    Register rn,
520                                    Register rm);
521 
TestHelper(Fn instruction,const char * mnemonic,const TestResult reference[])522 void TestHelper(Fn instruction,
523                 const char* mnemonic,
524                 const TestResult reference[]) {
525   unsigned total_error_count = 0;
526   MacroAssembler masm(BUF_SIZE);
527 
528   masm.UseT32();
529 
530   for (unsigned i = 0; i < ARRAY_SIZE(kTests); i++) {
531     // Values to pass to the macro-assembler.
532     Condition cond = kTests[i].operands.cond;
533     Register rd = kTests[i].operands.rd;
534     Register rn = kTests[i].operands.rn;
535     Register rm = kTests[i].operands.rm;
536 
537     int32_t start = masm.GetCursorOffset();
538     {
539       // We never generate more that 4 bytes, as IT instructions are only
540       // allowed for narrow encodings.
541       ExactAssemblyScope scope(&masm, 4, ExactAssemblyScope::kMaximumSize);
542       if (kTests[i].in_it_block) {
543         masm.it(kTests[i].it_condition);
544       }
545       (masm.*instruction)(cond, rd, rn, rm);
546     }
547     int32_t end = masm.GetCursorOffset();
548 
549     const byte* result_ptr =
550         masm.GetBuffer()->GetOffsetAddress<const byte*>(start);
551     VIXL_ASSERT(start < end);
552     uint32_t result_size = end - start;
553 
554     if (Test::generate_test_trace()) {
555       // Print the result bytes.
556       printf("const byte kInstruction_%s_%s[] = {\n",
557              mnemonic,
558              kTests[i].identifier);
559       for (uint32_t j = 0; j < result_size; j++) {
560         if (j == 0) {
561           printf("  0x%02" PRIx8, result_ptr[j]);
562         } else {
563           printf(", 0x%02" PRIx8, result_ptr[j]);
564         }
565       }
566       // This comment is meant to be used by external tools to validate
567       // the encoding. We can parse the comment to figure out what
568       // instruction this corresponds to.
569       if (kTests[i].in_it_block) {
570         printf(" // It %s; %s %s\n};\n",
571                kTests[i].it_condition.GetName(),
572                mnemonic,
573                kTests[i].operands_description);
574       } else {
575         printf(" // %s %s\n};\n", mnemonic, kTests[i].operands_description);
576       }
577     } else {
578       // Check we've emitted the exact same encoding as present in the
579       // trace file. Only print up to `kErrorReportLimit` errors.
580       if (((result_size != reference[i].size) ||
581            (memcmp(result_ptr, reference[i].encoding, reference[i].size) !=
582             0)) &&
583           (++total_error_count <= kErrorReportLimit)) {
584         printf("Error when testing \"%s\" with operands \"%s\":\n",
585                mnemonic,
586                kTests[i].operands_description);
587         printf("  Expected: ");
588         for (uint32_t j = 0; j < reference[i].size; j++) {
589           if (j == 0) {
590             printf("0x%02" PRIx8, reference[i].encoding[j]);
591           } else {
592             printf(", 0x%02" PRIx8, reference[i].encoding[j]);
593           }
594         }
595         printf("\n");
596         printf("  Found:    ");
597         for (uint32_t j = 0; j < result_size; j++) {
598           if (j == 0) {
599             printf("0x%02" PRIx8, result_ptr[j]);
600           } else {
601             printf(", 0x%02" PRIx8, result_ptr[j]);
602           }
603         }
604         printf("\n");
605       }
606     }
607   }
608 
609   masm.FinalizeCode();
610 
611   if (Test::generate_test_trace()) {
612     // Finalize the trace file by writing the final `TestResult` array
613     // which links all generated instruction encodings.
614     printf("const TestResult kReference%s[] = {\n", mnemonic);
615     for (unsigned i = 0; i < ARRAY_SIZE(kTests); i++) {
616       printf("  {\n");
617       printf("    ARRAY_SIZE(kInstruction_%s_%s),\n",
618              mnemonic,
619              kTests[i].identifier);
620       printf("    kInstruction_%s_%s,\n", mnemonic, kTests[i].identifier);
621       printf("  },\n");
622     }
623     printf("};\n");
624   } else {
625     if (total_error_count > kErrorReportLimit) {
626       printf("%u other errors follow.\n",
627              total_error_count - kErrorReportLimit);
628     }
629     // Crash if the test failed.
630     VIXL_CHECK(total_error_count == 0);
631   }
632 }
633 
634 // Instantiate tests for each instruction in the list.
635 #define TEST(mnemonic)                                                      \
636   void Test_##mnemonic() {                                                  \
637     TestHelper(&MacroAssembler::mnemonic, #mnemonic, kReference##mnemonic); \
638   }                                                                         \
639   Test test_##mnemonic("AARCH32_ASSEMBLER_COND_RD_RN_RM_" #mnemonic "_T32", \
640                        &Test_##mnemonic);
641 FOREACH_INSTRUCTION(TEST)
642 #undef TEST
643 
644 }  // namespace
645 #endif
646 
647 }  // namespace aarch32
648 }  // namespace vixl
649