| /external/mesa3d/prebuilt-intermediates/nir/ |
| D | nir_builder_opcodes.h | 29 nir_amul(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1) in nir_amul() argument
31 return nir_build_alu(build, nir_op_amul, src0, src1, NULL, NULL); in nir_amul()
34 nir_b16all_fequal16(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1) in nir_b16all_fequal16() argument
36 return nir_build_alu(build, nir_op_b16all_fequal16, src0, src1, NULL, NULL); in nir_b16all_fequal16()
39 nir_b16all_fequal2(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1) in nir_b16all_fequal2() argument
41 return nir_build_alu(build, nir_op_b16all_fequal2, src0, src1, NULL, NULL); in nir_b16all_fequal2()
44 nir_b16all_fequal3(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1) in nir_b16all_fequal3() argument
46 return nir_build_alu(build, nir_op_b16all_fequal3, src0, src1, NULL, NULL); in nir_b16all_fequal3()
49 nir_b16all_fequal4(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1) in nir_b16all_fequal4() argument
51 return nir_build_alu(build, nir_op_b16all_fequal4, src0, src1, NULL, NULL); in nir_b16all_fequal4()
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| D | nir_constant_expressions.c | 576 const int1_t src0 = -(int1_t)_src[0][_i].b; in evaluate_amul() local
580 int1_t dst = src0 * src1; in evaluate_amul()
595 const int8_t src0 = in evaluate_amul() local
600 int8_t dst = src0 * src1; in evaluate_amul()
614 const int16_t src0 = in evaluate_amul() local
619 int16_t dst = src0 * src1; in evaluate_amul()
633 const int32_t src0 = in evaluate_amul() local
638 int32_t dst = src0 * src1; in evaluate_amul()
652 const int64_t src0 = in evaluate_amul() local
657 int64_t dst = src0 * src1; in evaluate_amul()
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| /external/rust/crates/libz-sys/src/zlib-ng/ |
| D | compare256.c | 10 static inline uint32_t compare256_c_static(const uint8_t *src0, const uint8_t *src1) { in compare256_c_static() argument
14 if (*src0 != *src1) in compare256_c_static()
16 src0 += 1, src1 += 1, len += 1; in compare256_c_static()
17 if (*src0 != *src1) in compare256_c_static()
19 src0 += 1, src1 += 1, len += 1; in compare256_c_static()
20 if (*src0 != *src1) in compare256_c_static()
22 src0 += 1, src1 += 1, len += 1; in compare256_c_static()
23 if (*src0 != *src1) in compare256_c_static()
25 src0 += 1, src1 += 1, len += 1; in compare256_c_static()
26 if (*src0 != *src1) in compare256_c_static()
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| /external/mesa3d/prebuilt-intermediates/bifrost/ |
| D | bi_generated_pack.h | 35 unsigned src0 = bi_get_src(ins, regs, 0); in pan_pack_fma_rshift_and_i32() local
36 assert((1 << src0) & 0xfb); in pan_pack_fma_rshift_and_i32()
57 …return 0x301000 | (src0 << 0) | (src1 << 3) | (src2 << 6) | (lane2 << 9) | (not1 << 14) | (not_res… in pan_pack_fma_rshift_and_i32()
63 unsigned src0 = bi_get_src(ins, regs, 0); in pan_pack_add_iadd_u32() local
87 return 0xbc600 | (src0 << 0) | (src1 << 3) | (saturate << 8) | (derived_7 << 7); in pan_pack_add_iadd_u32()
99 …return 0xbec00 | (src0 << 0) | (src1 << 3) | (saturate << 8) | (derived_7 << 7) | (derived_9 << 9); in pan_pack_add_iadd_u32()
113 …return 0xbe000 | (src0 << 0) | (src1 << 3) | (saturate << 8) | (derived_7 << 7) | (derived_9 << 9); in pan_pack_add_iadd_u32()
122 unsigned src0 = bi_get_src(ins, regs, 0); in pan_pack_add_ld_var_flat() local
150 …return 0x538c0 | (src0 << 3) | (vecsize << 8) | (function << 0) | (derived_10 << 10) | (derived_19… in pan_pack_add_ld_var_flat()
152 return 0xcf8c0 | (src0 << 3) | (vecsize << 8) | (function << 0); in pan_pack_add_ld_var_flat()
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| /external/ComputeLibrary/src/cpu/operators/ |
| D | CpuElementwise.cpp | 49 void CpuElementwiseArithmetic<op>::configure(const ITensorInfo *src0, const ITensorInfo *src1, ITen… in configure() argument
51 ARM_COMPUTE_LOG_PARAMS(src0, src1, dst); in configure()
53 k->configure(op, src0, src1, dst); in configure()
58 Status CpuElementwiseArithmetic<op>::validate(const ITensorInfo *src0, const ITensorInfo *src1, con… in validate() argument
60 return kernels::CpuArithmeticKernel::validate(op, src0, src1, dst); in validate()
68 void CpuElementwiseDivision::configure(const ITensorInfo *src0, const ITensorInfo *src1, ITensorInf… in configure() argument
70 ARM_COMPUTE_LOG_PARAMS(src0, src1, dst); in configure()
72 k->configure(src0, src1, dst); in configure()
76 Status CpuElementwiseDivision::validate(const ITensorInfo *src0, const ITensorInfo *src1, const ITe… in validate() argument
78 return kernels::CpuDivisionKernel::validate(src0, src1, dst); in validate()
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| /external/libvpx/vpx_dsp/mips/ |
| D | sum_squares_msa.c | 22 uint64_t src0, src1, src2, src3; in vpx_sum_squares_2d_i16_msa() local
26 LD4(src, src_stride, src0, src1, src2, src3); in vpx_sum_squares_2d_i16_msa()
27 INSERT_D2_SH(src0, src1, diff0); in vpx_sum_squares_2d_i16_msa()
35 v8i16 src0, src1, src2, src3, src4, src5, src6, src7; in vpx_sum_squares_2d_i16_msa() local
37 LD_SH8(src, src_stride, src0, src1, src2, src3, src4, src5, src6, src7); in vpx_sum_squares_2d_i16_msa()
38 DOTP_SH2_SW(src0, src1, src0, src1, mul0, mul1); in vpx_sum_squares_2d_i16_msa()
47 v8i16 src0, src1, src2, src3, src4, src5, src6, src7; in vpx_sum_squares_2d_i16_msa() local
49 LD_SH8(src, src_stride, src0, src1, src2, src3, src4, src5, src6, src7); in vpx_sum_squares_2d_i16_msa()
50 DOTP_SH2_SW(src0, src1, src0, src1, mul0, mul1); in vpx_sum_squares_2d_i16_msa()
54 LD_SH8(src + 8, src_stride, src0, src1, src2, src3, src4, src5, src6, src7); in vpx_sum_squares_2d_i16_msa()
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| D | variance_msa.c | 45 uint32_t src0, src1, src2, src3; in sse_diff_4width_msa() local
54 LW4(src_ptr, src_stride, src0, src1, src2, src3); in sse_diff_4width_msa()
59 INSERT_W4_UB(src0, src1, src2, src3, src); in sse_diff_4width_msa()
74 v16u8 src0, src1, src2, src3; in sse_diff_8width_msa() local
80 LD_UB4(src_ptr, src_stride, src0, src1, src2, src3); in sse_diff_8width_msa()
85 PCKEV_D4_UB(src1, src0, src3, src2, ref1, ref0, ref3, ref2, src0, src1, in sse_diff_8width_msa()
87 CALC_MSE_AVG_B(src0, ref0, var, avg); in sse_diff_8width_msa()
141 v16u8 src0, src1, ref0, ref1; in sse_diff_32width_msa() local
146 LD_UB2(src_ptr, 16, src0, src1); in sse_diff_32width_msa()
150 CALC_MSE_AVG_B(src0, ref0, var, avg); in sse_diff_32width_msa()
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| D | vpx_convolve_copy_msa.c | 19 v16u8 src0, src1, src2, src3, src4, src5, src6, src7; in copy_width8_msa() local
23 LD_UB8(src, src_stride, src0, src1, src2, src3, src4, src5, src6, src7); in copy_width8_msa()
26 out0 = __msa_copy_u_d((v2i64)src0, 0); in copy_width8_msa()
40 LD_UB4(src, src_stride, src0, src1, src2, src3); in copy_width8_msa()
43 out0 = __msa_copy_u_d((v2i64)src0, 0); in copy_width8_msa()
52 LD_UB8(src, src_stride, src0, src1, src2, src3, src4, src5, src6, src7); in copy_width8_msa()
55 out0 = __msa_copy_u_d((v2i64)src0, 0); in copy_width8_msa()
71 LD_UB4(src, src_stride, src0, src1, src2, src3); in copy_width8_msa()
73 out0 = __msa_copy_u_d((v2i64)src0, 0); in copy_width8_msa()
83 LD_UB2(src, src_stride, src0, src1); in copy_width8_msa()
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| D | vpx_convolve8_horiz_msa.c | 19 v16i8 src0, src1, src2, src3, filt0, filt1, filt2, filt3; in common_hz_8t_4x4_msa() local
33 LD_SB4(src, src_stride, src0, src1, src2, src3); in common_hz_8t_4x4_msa()
34 XORI_B4_128_SB(src0, src1, src2, src3); in common_hz_8t_4x4_msa()
35 HORIZ_8TAP_4WID_4VECS_FILT(src0, src1, src2, src3, mask0, mask1, mask2, mask3, in common_hz_8t_4x4_msa()
47 v16i8 src0, src1, src2, src3; in common_hz_8t_4x8_msa() local
62 LD_SB4(src, src_stride, src0, src1, src2, src3); in common_hz_8t_4x8_msa()
63 XORI_B4_128_SB(src0, src1, src2, src3); in common_hz_8t_4x8_msa()
65 HORIZ_8TAP_4WID_4VECS_FILT(src0, src1, src2, src3, mask0, mask1, mask2, mask3, in common_hz_8t_4x8_msa()
67 LD_SB4(src, src_stride, src0, src1, src2, src3); in common_hz_8t_4x8_msa()
68 XORI_B4_128_SB(src0, src1, src2, src3); in common_hz_8t_4x8_msa()
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| /external/libaom/av1/common/x86/ |
| D | reconinter_avx2.c | 31 const uint8_t *src0, int src0_stride, in av1_build_compound_diffwtd_mask_avx2() argument
39 const __m128i s0A = xx_loadl_32(src0); in av1_build_compound_diffwtd_mask_avx2()
40 const __m128i s0B = xx_loadl_32(src0 + src0_stride); in av1_build_compound_diffwtd_mask_avx2()
41 const __m128i s0C = xx_loadl_32(src0 + src0_stride * 2); in av1_build_compound_diffwtd_mask_avx2()
42 const __m128i s0D = xx_loadl_32(src0 + src0_stride * 3); in av1_build_compound_diffwtd_mask_avx2()
61 src0 += (src0_stride << 2); in av1_build_compound_diffwtd_mask_avx2()
68 const __m128i s0A = xx_loadl_64(src0); in av1_build_compound_diffwtd_mask_avx2()
69 const __m128i s0B = xx_loadl_64(src0 + src0_stride); in av1_build_compound_diffwtd_mask_avx2()
70 const __m128i s0C = xx_loadl_64(src0 + src0_stride * 2); in av1_build_compound_diffwtd_mask_avx2()
71 const __m128i s0D = xx_loadl_64(src0 + src0_stride * 3); in av1_build_compound_diffwtd_mask_avx2()
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| /external/ComputeLibrary/src/cpu/kernels/ |
| D | CpuDirectConv3dKernel.cpp | 78 Status validate_arguments(const ITensorInfo *src0, const ITensorInfo *src1, const ITensorInfo *src2… in validate_arguments() argument
80 ARM_COMPUTE_RETURN_ERROR_ON_NULLPTR(src0, src1, dst); in validate_arguments()
81 ARM_COMPUTE_RETURN_ERROR_ON(src0->data_layout() != DataLayout::NDHWC); in validate_arguments()
82 ARM_COMPUTE_RETURN_ERROR_ON_MISMATCHING_DATA_LAYOUT(src0, src1, dst); in validate_arguments()
83 ARM_COMPUTE_RETURN_ERROR_ON_CPU_F16_UNSUPPORTED(src0); in validate_arguments()
84 …ARM_COMPUTE_RETURN_ERROR_ON_DATA_TYPE_CHANNEL_NOT_IN(src0, 1, DataType::F16, DataType::F32, DataTy… in validate_arguments()
85 ARM_COMPUTE_RETURN_ERROR_ON_MISMATCHING_DATA_TYPES(src0, src1); in validate_arguments()
88 …const auto *uk = CpuDirectConv3dKernel::get_implementation(DataTypeISASelectorData{ src0->data_typ… in validate_arguments()
92 const DataLayout data_layout = src0->data_layout(); in validate_arguments()
97 ARM_COMPUTE_RETURN_ERROR_ON(src1->dimension(1) != src0->dimension(channel_idx)); in validate_arguments()
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| D | CpuElementwiseKernel.cpp | 301 Status CpuElementwiseKernel<Derived>::validate_arguments_common(const ITensorInfo &src0, const ITen… in validate_arguments_common() argument
303 ARM_COMPUTE_RETURN_ERROR_ON_CPU_F16_UNSUPPORTED(&src0); in validate_arguments_common()
304 ARM_COMPUTE_RETURN_ERROR_ON_MISMATCHING_DATA_TYPES(&src0, &src1); in validate_arguments_common()
306 …const TensorShape out_shape = TensorShape::broadcast_shape(src0.tensor_shape(), src1.tensor_shape(… in validate_arguments_common()
320 void CpuArithmeticKernel::configure_common(const ITensorInfo *src0, const ITensorInfo *src1, ITenso… in configure_common() argument
322 ARM_COMPUTE_ERROR_ON_NULLPTR(src0, src1, dst); in configure_common()
324 …uArithmeticKernel::get_implementation(ElementwiseDataTypeISASelectorData{ src0->data_type(), CPUIn… in configure_common()
332 if(src0->is_dynamic() || src1->is_dynamic()) in configure_common()
337 …auto shape_and_window = compute_output_shape_and_window(src0->tensor_shape(), src1->tensor_shape()… in configure_common()
338 auto_init_if_empty(*dst, shape_and_window.first, 1, src0->data_type()); in configure_common()
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| D | CpuSubKernel.cpp | 108 inline Status validate_arguments(const ITensorInfo &src0, const ITensorInfo &src1, const ITensorInf… in validate_arguments() argument
111 ARM_COMPUTE_RETURN_ERROR_ON_CPU_F16_UNSUPPORTED(&src0); in validate_arguments()
112 …ARM_COMPUTE_RETURN_ERROR_ON_DATA_TYPE_CHANNEL_NOT_IN(&src0, 1, DataType::U8, DataType::QASYMM8, Da… in validate_arguments()
114 ARM_COMPUTE_RETURN_ERROR_ON_MISMATCHING_DATA_TYPES(&src0, &src1); in validate_arguments()
116 const auto can_use_fixedpoint = sub_q8_neon_fixedpoint_possible(&src0, &src1, &dst); in validate_arguments()
117 …CpuSubKernelDataTypeISASelectorData>(CpuSubKernelDataTypeISASelectorData{ src0.data_type(), CPUInf… in validate_arguments()
121 …const TensorShape out_shape = TensorShape::broadcast_shape(src0.tensor_shape(), src1.tensor_shape(… in validate_arguments()
124 …ARM_COMPUTE_RETURN_ERROR_ON_MSG(is_data_type_quantized(src0.data_type()) && (policy == ConvertPoli… in validate_arguments()
130 ARM_COMPUTE_RETURN_ERROR_ON_MISMATCHING_DATA_TYPES(&src0, &dst); in validate_arguments()
138 void CpuSubKernel::configure(const ITensorInfo *src0, const ITensorInfo *src1, ITensorInfo *dst, Co… in configure() argument
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| D | CpuAddKernel.cpp | 179 Status validate_arguments(const ITensorInfo &src0, const ITensorInfo &src1, const ITensorInfo &dst,… in validate_arguments() argument
183 ARM_COMPUTE_RETURN_ERROR_ON_CPU_F16_UNSUPPORTED(&src0); in validate_arguments()
184 …ARM_COMPUTE_RETURN_ERROR_ON_DATA_TYPE_CHANNEL_NOT_IN(&src0, 1, DataType::U8, DataType::QASYMM8, Da… in validate_arguments()
187 ARM_COMPUTE_RETURN_ERROR_ON_MISMATCHING_DATA_TYPES(&src0, &src1); in validate_arguments()
189 …const TensorShape out_shape = TensorShape::broadcast_shape(src0.tensor_shape(), src1.tensor_shape(… in validate_arguments()
192 …UTE_RETURN_ERROR_ON_MSG((src0.tensor_shape().x() != src1.tensor_shape().x()) && ((src0.data_type()… in validate_arguments()
199 ARM_COMPUTE_RETURN_ERROR_ON_MISMATCHING_DATA_TYPES(&src0, &dst); in validate_arguments()
204 const auto can_use_fixedpoint = add_q8_neon_fixedpoint_possible(&src0, &src1, &dst); in validate_arguments()
205 …ntation<CpuAddKernelDataTypeISASelectorData>(CpuAddKernelDataTypeISASelectorData{ src0.data_type(), in validate_arguments()
213 void CpuAddKernel::configure(const ITensorInfo *src0, const ITensorInfo *src1, ITensorInfo *dst, Co… in configure() argument
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| /external/libaom/aom_dsp/x86/ |
| D | blend_a64_vmask_sse4.c | 31 const uint8_t *src0, uint32_t src0_stride, in blend_a64_vmask_w4_sse4_1() argument
42 const __m128i v_res_w = blend_4(src0, src1, &v_m0_w, &v_m1_w); in blend_a64_vmask_w4_sse4_1()
49 src0 += src0_stride; in blend_a64_vmask_w4_sse4_1()
56 const uint8_t *src0, uint32_t src0_stride, in blend_a64_vmask_w8_sse4_1() argument
67 const __m128i v_res_w = blend_8(src0, src1, &v_m0_w, &v_m1_w); in blend_a64_vmask_w8_sse4_1()
74 src0 += src0_stride; in blend_a64_vmask_w8_sse4_1()
81 const uint8_t *src0, in blend_a64_vmask_w16n_sse4_1() argument
93 const __m128i v_resl_w = blend_8(src0 + c, src1 + c, &v_m0_w, &v_m1_w); in blend_a64_vmask_w16n_sse4_1()
95 blend_8(src0 + c + 8, src1 + c + 8, &v_m0_w, &v_m1_w); in blend_a64_vmask_w16n_sse4_1()
102 src0 += src0_stride; in blend_a64_vmask_w16n_sse4_1()
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| D | blend_a64_mask_sse4.c | 32 const uint8_t *src0, uint32_t src0_stride, in blend_a64_mask_w4_sse4_1() argument
42 const __m128i v_res_b = blend_4_u8(src0, src1, &v_m0_b, &v_m1_b, &_r); in blend_a64_mask_w4_sse4_1()
46 src0 += src0_stride; in blend_a64_mask_w4_sse4_1()
53 const uint8_t *src0, uint32_t src0_stride, in blend_a64_mask_w8_sse4_1() argument
63 const __m128i v_res_b = blend_8_u8(src0, src1, &v_m0_b, &v_m1_b, &_r); in blend_a64_mask_w8_sse4_1()
67 src0 += src0_stride; in blend_a64_mask_w8_sse4_1()
74 uint8_t *dst, uint32_t dst_stride, const uint8_t *src0, in blend_a64_mask_w16n_sse4_1() argument
87 blend_16_u8(src0 + c, src1 + c, &v_m0_b, &v_m1_b, &_r); in blend_a64_mask_w16n_sse4_1()
92 src0 += src0_stride; in blend_a64_mask_w16n_sse4_1()
103 uint8_t *dst, uint32_t dst_stride, const uint8_t *src0, in blend_a64_mask_sx_w4_sse4_1() argument
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| D | blend_a64_mask_avx2.c | 29 uint8_t *dst, const CONV_BUF_TYPE *src0, const CONV_BUF_TYPE *src1, in blend_a64_d16_mask_w16_avx2() argument
33 const __m256i s0_0 = yy_loadu_256(src0); in blend_a64_d16_mask_w16_avx2()
50 uint8_t *dst, const CONV_BUF_TYPE *src0, const CONV_BUF_TYPE *src1, in blend_a64_d16_mask_w32_avx2() argument
55 const __m256i s0_0 = yy_loadu_256(src0); in blend_a64_d16_mask_w32_avx2()
56 const __m256i s0_1 = yy_loadu_256(src0 + 16); in blend_a64_d16_mask_w32_avx2()
83 uint8_t *dst, uint32_t dst_stride, const CONV_BUF_TYPE *src0, in lowbd_blend_a64_d16_mask_subw0_subh0_w16_avx2() argument
92 blend_a64_d16_mask_w16_avx2(dst, src0, src1, &m0, round_offset, &v_maxval, in lowbd_blend_a64_d16_mask_subw0_subh0_w16_avx2()
96 src0 += src0_stride; in lowbd_blend_a64_d16_mask_subw0_subh0_w16_avx2()
102 uint8_t *dst, uint32_t dst_stride, const CONV_BUF_TYPE *src0, in lowbd_blend_a64_d16_mask_subw0_subh0_w32_avx2() argument
113 blend_a64_d16_mask_w32_avx2(dst + j, src0 + j, src1 + j, &m0, &m1, in lowbd_blend_a64_d16_mask_subw0_subh0_w32_avx2()
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| /external/webp/src/dsp/ |
| D | lossless_enc_msa.c | 21 #define TRANSFORM_COLOR_8(src0, src1, dst0, dst1, c0, c1, mask0, mask1) do { \ argument
24 VSHF_B2_SH(src0, src0, src1, src1, mask0, mask0, g0, g1); \
27 t0 = __msa_subv_h((v8i16)src0, t0); \
29 t4 = __msa_srli_w((v4i32)src0, 16); \
34 VSHF_B2_UB(src0, t0, src1, t1, mask1, mask1, dst0, dst1); \
53 v16u8 src0, dst0; in TransformColor_MSA() local
64 LD_UB2(data, 4, src0, src1); in TransformColor_MSA()
65 TRANSFORM_COLOR_8(src0, src1, dst0, dst1, g2br, r2b, mask0, mask1); in TransformColor_MSA()
72 src0 = LD_UB(data); in TransformColor_MSA()
73 TRANSFORM_COLOR_4(src0, dst0, g2br, r2b, mask0, mask1); in TransformColor_MSA()
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| D | lossless_msa.c | 25 v16u8 src0, src1, src2, src3, dst0, dst1, dst2; \
26 LD_UB4(psrc, 16, src0, src1, src2, src3); \
27 VSHF_B2_UB(src0, src1, src1, src2, m0, m1, dst0, dst1); \
35 v16u8 src0, src1, src2, dst0, dst1, dst2; \
36 LD_UB3(psrc, 16, src0, src1, src2); \
37 VSHF_B2_UB(src0, src1, src1, src2, m0, m1, dst0, dst1); \
46 v16u8 src0, src1, src2 = { 0 }, dst0, dst1; \
47 LD_UB2(psrc, 16, src0, src1); \
48 VSHF_B2_UB(src0, src1, src1, src2, m0, m1, dst0, dst1); \
55 const v16u8 src0 = LD_UB(psrc); \
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| D | rescaler_msa.c | 125 v4u32 src0, src1, src2, src3; in ExportRowExpand_0() local
127 LD_UW4(frow, 4, src0, src1, src2, src3); in ExportRowExpand_0()
128 CALC_MULT_FIX_16(src0, src1, src2, src3, scale, shift, out); in ExportRowExpand_0()
138 v4u32 src0, src1, src2; in ExportRowExpand_0() local
139 LD_UW3(frow, 4, src0, src1, src2); in ExportRowExpand_0()
140 CALC_MULT_FIX_4(src0, scale, shift, val0_m); in ExportRowExpand_0()
149 v4u32 src0, src1; in ExportRowExpand_0() local
150 LD_UW2(frow, 4, src0, src1); in ExportRowExpand_0()
151 CALC_MULT_FIX_4(src0, scale, shift, val0_m); in ExportRowExpand_0()
159 const v4u32 src0 = LD_UW(frow); in ExportRowExpand_0() local
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| /external/mesa3d/src/freedreno/ir3/ |
| D | ir3_a4xx.c | 43 struct ir3_instruction *ldgb, *src0, *src1, *byte_offset, *offset; in emit_intrinsic_load_ssbo() local
51 src0 = ir3_create_collect(ctx, (struct ir3_instruction*[]){ in emit_intrinsic_load_ssbo()
58 src0, 0, src1, 0); in emit_intrinsic_load_ssbo()
74 struct ir3_instruction *stgb, *src0, *src1, *src2, *byte_offset, *offset; in emit_intrinsic_store_ssbo() local
88 src0 = ir3_create_collect(ctx, ir3_get_src(ctx, &intr->src[0]), ncomp); in emit_intrinsic_store_ssbo()
95 stgb = ir3_STGB(b, ssbo, 0, src0, 0, src1, 0, src2, 0); in emit_intrinsic_store_ssbo()
126 struct ir3_instruction *atomic, *ssbo, *src0, *src1, *src2, *byte_offset, in emit_intrinsic_atomic_ssbo() local
141 src0 = ir3_get_src(ctx, &intr->src[2])[0]; in emit_intrinsic_atomic_ssbo()
150 atomic = ir3_ATOMIC_ADD_G(b, ssbo, 0, src0, 0, src1, 0, src2, 0); in emit_intrinsic_atomic_ssbo()
153 atomic = ir3_ATOMIC_MIN_G(b, ssbo, 0, src0, 0, src1, 0, src2, 0); in emit_intrinsic_atomic_ssbo()
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| /external/ComputeLibrary/src/gpu/cl/kernels/ |
| D | ClGemmLowpMatrixMultiplyNativeKernel.cpp | 53 Status validate_arguments(const ITensorInfo *src0, const ITensorInfo *src1, const ITensorInfo *dst,… in validate_arguments() argument
56 ARM_COMPUTE_RETURN_ERROR_ON_NULLPTR(src0, src1, dst); in validate_arguments()
57 …ARM_COMPUTE_RETURN_ERROR_ON_DATA_TYPE_CHANNEL_NOT_IN(src0, 1, DataType::QASYMM8, DataType::QASYMM8… in validate_arguments()
58 if(src0->data_type() == DataType::QASYMM8) in validate_arguments()
60 ARM_COMPUTE_RETURN_ERROR_ON_MISMATCHING_DATA_TYPES(src0, src1); in validate_arguments()
66 …ARM_COMPUTE_RETURN_ERROR_ON_MSG(src0->num_dimensions() > 4, "The number of dimensions for the LHS … in validate_arguments()
83 ARM_COMPUTE_RETURN_ERROR_ON(src0->dimension(0) != static_cast<unsigned int>(k)); in validate_arguments()
88 …ARM_COMPUTE_RETURN_ERROR_ON(src0->dimension(1) * src0->dimension(2) != static_cast<unsigned int>(m… in validate_arguments()
92 ARM_COMPUTE_RETURN_ERROR_ON(src0->dimension(1) != static_cast<unsigned int>(m)); in validate_arguments()
97 … dst->clone()->set_tensor_shape(misc::shape_calculator::compute_mm_shape(*src0, *src1, gemm_info)); in validate_arguments()
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| D | ClGemmMatrixMultiplyReshapedOnlyRhsMMULKernel.cpp | 58 Status validate_arguments(const ITensorInfo *src0, const ITensorInfo *src1, const ITensorInfo *src2… in validate_arguments() argument
63 ARM_COMPUTE_RETURN_ERROR_ON_NULLPTR(src0, src1, dst); in validate_arguments()
65 ARM_COMPUTE_RETURN_ERROR_ON_DATA_TYPE_CHANNEL_NOT_IN(src0, 1, DataType::F16, DataType::F32); in validate_arguments()
66 ARM_COMPUTE_RETURN_ERROR_ON_MISMATCHING_DATA_TYPES(src0, src1); in validate_arguments()
67 …ARM_COMPUTE_RETURN_ERROR_ON_MSG(src0->num_dimensions() > 4, "The number of dimensions for the LHS … in validate_arguments()
86 ARM_COMPUTE_RETURN_ERROR_ON(src0->dimension(0) != k); in validate_arguments()
91 ARM_COMPUTE_RETURN_ERROR_ON(src0->dimension(1) * src0->dimension(2) != m); in validate_arguments()
95 ARM_COMPUTE_RETURN_ERROR_ON(src0->dimension(1) != m); in validate_arguments()
103 ARM_COMPUTE_RETURN_ERROR_ON(src0->dimension(3) != src1->dimension(2)); in validate_arguments()
107 ARM_COMPUTE_RETURN_ERROR_ON(src0->dimension(2) != src1->dimension(2)); in validate_arguments()
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| /external/libyuv/files/source/ |
| D | scale_lsx.cc | 43 __m128i src0, src1, dst0; in ScaleARGBRowDown2_LSX() local
46 DUP2_ARG2(__lsx_vld, src_argb, 0, src_argb, 16, src0, src1); in ScaleARGBRowDown2_LSX()
47 dst0 = __lsx_vpickod_w(src1, src0); in ScaleARGBRowDown2_LSX()
61 __m128i src0, src1, tmp0, tmp1, dst0; in ScaleARGBRowDown2Linear_LSX() local
64 DUP2_ARG2(__lsx_vld, src_argb, 0, src_argb, 16, src0, src1); in ScaleARGBRowDown2Linear_LSX()
65 tmp0 = __lsx_vpickev_w(src1, src0); in ScaleARGBRowDown2Linear_LSX()
66 tmp1 = __lsx_vpickod_w(src1, src0); in ScaleARGBRowDown2Linear_LSX()
82 __m128i src0, src1, src2, src3, tmp0, tmp1, tmp2, tmp3, dst0; in ScaleARGBRowDown2Box_LSX() local
87 DUP2_ARG2(__lsx_vld, s, 0, s, 16, src0, src1); in ScaleARGBRowDown2Box_LSX()
89 DUP4_ARG3(__lsx_vshuf_b, src0, src0, shuff, src1, src1, shuff, src2, src2, in ScaleARGBRowDown2Box_LSX()
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| /external/libvpx/vpx_dsp/loongarch/ |
| D | vpx_convolve8_horiz_lsx.c | 27 __m128i src0, src1, src2, src3; in common_hz_8t_4x4_lsx() local
39 LSX_LD_4(src, src_stride, src0, src1, src2, src3); in common_hz_8t_4x4_lsx()
40 DUP4_ARG2(__lsx_vxori_b, src0, 128, src1, 128, src2, 128, src3, 128, src0, in common_hz_8t_4x4_lsx()
42 HORIZ_8TAP_4WID_4VECS_FILT(src0, src1, src2, src3, mask0, mask1, mask2, mask3, in common_hz_8t_4x4_lsx()
61 __m128i src0, src1, src2, src3; in common_hz_8t_4x8_lsx() local
73 src0 = __lsx_vld(_src, 0); in common_hz_8t_4x8_lsx()
77 DUP4_ARG2(__lsx_vxori_b, src0, 128, src1, 128, src2, 128, src3, 128, src0, in common_hz_8t_4x8_lsx()
79 HORIZ_8TAP_4WID_4VECS_FILT(src0, src1, src2, src3, mask0, mask1, mask2, mask3, in common_hz_8t_4x8_lsx()
81 src0 = __lsx_vld(_src, 0); in common_hz_8t_4x8_lsx()
84 DUP4_ARG2(__lsx_vxori_b, src0, 128, src1, 128, src2, 128, src3, 128, src0, in common_hz_8t_4x8_lsx()
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