/external/llvm/include/llvm/CodeGen/ |
D | ISDOpcodes.h | 728 ATOMIC_LOAD_ADD, enumerator
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D | SelectionDAGNodes.h | 1103 N->getOpcode() == ISD::ATOMIC_LOAD_ADD || 1184 N->getOpcode() == ISD::ATOMIC_LOAD_ADD ||
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/external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/ |
D | ISDOpcodes.h | 872 ATOMIC_LOAD_ADD, enumerator
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D | SelectionDAGNodes.h | 1401 N->getOpcode() == ISD::ATOMIC_LOAD_ADD || 1458 N->getOpcode() == ISD::ATOMIC_LOAD_ADD ||
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/external/llvm/lib/CodeGen/SelectionDAG/ |
D | SelectionDAGDumper.cpp | 67 case ISD::ATOMIC_LOAD_ADD: return "AtomicLoadAdd"; in getOperationName()
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D | LegalizeIntegerTypes.cpp | 142 case ISD::ATOMIC_LOAD_ADD: in PromoteIntegerResult() 1337 case ISD::ATOMIC_LOAD_ADD: in ExpandIntegerResult()
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D | SelectionDAG.cpp | 466 case ISD::ATOMIC_LOAD_ADD: in AddNodeIDCustom() 4908 assert((Opcode == ISD::ATOMIC_LOAD_ADD || in getAtomic()
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D | LegalizeDAG.cpp | 3767 case ISD::ATOMIC_LOAD_ADD: in ConvertNodeToLibcall()
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D | SelectionDAGBuilder.cpp | 3935 case AtomicRMWInst::Add: NT = ISD::ATOMIC_LOAD_ADD; break; in visitAtomicRMW()
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/external/llvm/lib/Target/Mips/ |
D | Mips16ISelLowering.cpp | 134 setOperationAction(ISD::ATOMIC_LOAD_ADD, MVT::i32, Expand); in Mips16TargetLowering()
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/ |
D | Mips16ISelLowering.cpp | 133 setOperationAction(ISD::ATOMIC_LOAD_ADD, MVT::i32, Expand); in Mips16TargetLowering()
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/ |
D | SelectionDAGDumper.cpp | 87 case ISD::ATOMIC_LOAD_ADD: return "AtomicLoadAdd"; in getOperationName()
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D | LegalizeIntegerTypes.cpp | 171 case ISD::ATOMIC_LOAD_ADD: in PromoteIntegerResult() 1836 case ISD::ATOMIC_LOAD_ADD: in ExpandIntegerResult()
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D | SelectionDAG.cpp | 607 case ISD::ATOMIC_LOAD_ADD: in AddNodeIDCustom() 6619 assert((Opcode == ISD::ATOMIC_LOAD_ADD || in getAtomic()
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D | LegalizeDAG.cpp | 3895 case ISD::ATOMIC_LOAD_ADD: in ConvertNodeToLibcall()
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/ |
D | TargetLoweringBase.cpp | 467 OP_TO_LIBCALL(ISD::ATOMIC_LOAD_ADD, SYNC_FETCH_AND_ADD) in getSYNC()
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/external/llvm/lib/Target/AMDGPU/ |
D | SIISelLowering.cpp | 244 setTargetDAGCombine(ISD::ATOMIC_LOAD_ADD); in SITargetLowering() 3010 case ISD::ATOMIC_LOAD_ADD: in PerformDAGCombine()
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/external/llvm/lib/CodeGen/ |
D | TargetLoweringBase.cpp | 742 OP_TO_LIBCALL(ISD::ATOMIC_LOAD_ADD, SYNC_FETCH_AND_ADD) in getSYNC()
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/external/llvm/include/llvm/Target/ |
D | TargetSelectionDAG.td | 498 def atomic_load_add : SDNode<"ISD::ATOMIC_LOAD_ADD" , SDTAtomic2,
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/external/llvm/lib/Target/SystemZ/ |
D | SystemZISelLowering.cpp | 205 setOperationAction(ISD::ATOMIC_LOAD_ADD, MVT::i32, Custom); in SystemZTargetLowering() 3303 return DAG.getAtomic(ISD::ATOMIC_LOAD_ADD, DL, MemVT, in lowerATOMIC_LOAD_SUB() 4535 case ISD::ATOMIC_LOAD_ADD: in LowerOperation()
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/SystemZ/ |
D | SystemZISelLowering.cpp | 234 setOperationAction(ISD::ATOMIC_LOAD_ADD, MVT::i32, Custom); in SystemZTargetLowering() 3922 return DAG.getAtomic(ISD::ATOMIC_LOAD_ADD, DL, MemVT, in lowerATOMIC_LOAD_SUB() 5155 case ISD::ATOMIC_LOAD_ADD: in LowerOperation()
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/external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/Target/ |
D | TargetSelectionDAG.td | 586 def atomic_load_add : SDNode<"ISD::ATOMIC_LOAD_ADD" , SDTAtomic2,
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/external/llvm/lib/Target/X86/ |
D | X86ISelLowering.cpp | 441 setOperationAction(ISD::ATOMIC_LOAD_ADD, VT, Custom); in X86TargetLowering() 21177 case ISD::ATOMIC_LOAD_ADD: in lowerAtomicArithWithLOCK() 21222 return DAG.getAtomic(ISD::ATOMIC_LOAD_ADD, DL, VT, Chain, LHS, in lowerAtomicArith() 21226 assert(Opc == ISD::ATOMIC_LOAD_ADD && in lowerAtomicArith() 21667 case ISD::ATOMIC_LOAD_ADD: in LowerOperation() 22027 case ISD::ATOMIC_LOAD_ADD: in ReplaceNodeResults() 26971 if (Opc != ISD::ATOMIC_LOAD_ADD && Opc != ISD::ATOMIC_LOAD_SUB) in combineSetCCAtomicArith()
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
D | SIISelLowering.cpp | 753 setTargetDAGCombine(ISD::ATOMIC_LOAD_ADD); in SITargetLowering() 10027 case ISD::ATOMIC_LOAD_ADD: in PerformDAGCombine()
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
D | X86ISelLowering.cpp | 461 setOperationAction(ISD::ATOMIC_LOAD_ADD, VT, Custom); in X86TargetLowering() 27969 case ISD::ATOMIC_LOAD_ADD: in lowerAtomicArithWithLOCK() 28015 return DAG.getAtomic(ISD::ATOMIC_LOAD_ADD, DL, VT, Chain, LHS, in lowerAtomicArith() 28018 assert(Opc == ISD::ATOMIC_LOAD_ADD && in lowerAtomicArith() 28542 case ISD::ATOMIC_LOAD_ADD: in LowerOperation() 29451 case ISD::ATOMIC_LOAD_ADD: in ReplaceNodeResults() 38372 if (Opc != ISD::ATOMIC_LOAD_ADD && Opc != ISD::ATOMIC_LOAD_SUB) in combineSetCCAtomicArith()
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