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/external/llvm/test/CodeGen/X86/
Dpic-load-remat.ll8 …%tmp4403 = tail call <8 x i16> @llvm.x86.sse2.psubs.w( <8 x i16> zeroinitializer, <8 x i16> zeroin…
31 …%tmp4967 = tail call <8 x i16> @llvm.x86.sse2.psubs.w( <8 x i16> %tmp4403, <8 x i16> zeroinitializ…
47 declare <8 x i16> @llvm.x86.sse2.psubs.w(<8 x i16>, <8 x i16>) nounwind readnone
Dx86-64-psub.ll107 %6 = tail call x86_mmx @llvm.x86.mmx.psubs.b(x86_mmx %3, x86_mmx %5) nounwind
135 %6 = tail call x86_mmx @llvm.x86.mmx.psubs.w(x86_mmx %3, x86_mmx %5) nounwind
212 declare x86_mmx @llvm.x86.mmx.psubs.w(x86_mmx, x86_mmx) nounwind readnone
214 declare x86_mmx @llvm.x86.mmx.psubs.b(x86_mmx, x86_mmx) nounwind readnone
Dmmx-arith.ll31 %tmp36 = tail call x86_mmx @llvm.x86.mmx.psubs.b(x86_mmx %tmp28a, x86_mmx %tmp31)
130 %tmp36 = tail call x86_mmx @llvm.x86.mmx.psubs.w(x86_mmx %tmp28a, x86_mmx %tmp31)
306 declare x86_mmx @llvm.x86.mmx.psubs.b(x86_mmx, x86_mmx)
307 declare x86_mmx @llvm.x86.mmx.psubs.w(x86_mmx, x86_mmx)
Dstack-folding-mmx.ll608 %2 = call x86_mmx @llvm.x86.mmx.psubs.b(x86_mmx %a, x86_mmx %b) nounwind readnone
611 declare x86_mmx @llvm.x86.mmx.psubs.b(x86_mmx, x86_mmx) nounwind readnone
617 %2 = call x86_mmx @llvm.x86.mmx.psubs.w(x86_mmx %a, x86_mmx %b) nounwind readnone
620 declare x86_mmx @llvm.x86.mmx.psubs.w(x86_mmx, x86_mmx) nounwind readnone
Dsse2-intrinsics-x86.ll1026 %res = call <16 x i8> @llvm.x86.sse2.psubs.b(<16 x i8> %a0, <16 x i8> %a1) ; <<16 x i8>> [#uses=1]
1029 declare <16 x i8> @llvm.x86.sse2.psubs.b(<16 x i8>, <16 x i8>) nounwind readnone
1042 %res = call <8 x i16> @llvm.x86.sse2.psubs.w(<8 x i16> %a0, <8 x i16> %a1) ; <<8 x i16>> [#uses=1]
1045 declare <8 x i16> @llvm.x86.sse2.psubs.w(<8 x i16>, <8 x i16>) nounwind readnone
Davx512bwvl-intrinsics.ll3396 …%res = call <8 x i16> @llvm.x86.avx512.mask.psubs.w.128(<8 x i16> %a, <8 x i16> %b, <8 x i16> zero…
3407 …%res = call <8 x i16> @llvm.x86.avx512.mask.psubs.w.128(<8 x i16> %a, <8 x i16> %b, <8 x i16> %pas…
3417 …%res = call <8 x i16> @llvm.x86.avx512.mask.psubs.w.128(<8 x i16> %a, <8 x i16> %b, <8 x i16> zero…
3427 …%res = call <8 x i16> @llvm.x86.avx512.mask.psubs.w.128(<8 x i16> %a, <8 x i16> %b, <8 x i16> zero…
3439 …%res = call <8 x i16> @llvm.x86.avx512.mask.psubs.w.128(<8 x i16> %a, <8 x i16> %b, <8 x i16> %pas…
3450 …%res = call <8 x i16> @llvm.x86.avx512.mask.psubs.w.128(<8 x i16> %a, <8 x i16> %b, <8 x i16> zero…
3454 declare <8 x i16> @llvm.x86.avx512.mask.psubs.w.128(<8 x i16>, <8 x i16>, <8 x i16>, i8)
3461 …%res = call <16 x i16> @llvm.x86.avx512.mask.psubs.w.256(<16 x i16> %a, <16 x i16> %b, <16 x i16> …
3472 …%res = call <16 x i16> @llvm.x86.avx512.mask.psubs.w.256(<16 x i16> %a, <16 x i16> %b, <16 x i16> …
3482 …%res = call <16 x i16> @llvm.x86.avx512.mask.psubs.w.256(<16 x i16> %a, <16 x i16> %b, <16 x i16> …
[all …]
Dmmx-intrinsics.ll700 declare x86_mmx @llvm.x86.mmx.psubs.w(x86_mmx, x86_mmx) nounwind readnone
710 %2 = tail call x86_mmx @llvm.x86.mmx.psubs.w(x86_mmx %mmx_var.i, x86_mmx %mmx_var1.i) nounwind
717 declare x86_mmx @llvm.x86.mmx.psubs.b(x86_mmx, x86_mmx) nounwind readnone
727 %2 = tail call x86_mmx @llvm.x86.mmx.psubs.b(x86_mmx %mmx_var.i, x86_mmx %mmx_var1.i) nounwind
Davx2-intrinsics-x86.ll576 %res = call <32 x i8> @llvm.x86.avx2.psubs.b(<32 x i8> %a0, <32 x i8> %a1) ; <<32 x i8>> [#uses=1]
579 declare <32 x i8> @llvm.x86.avx2.psubs.b(<32 x i8>, <32 x i8>) nounwind readnone
592 …%res = call <16 x i16> @llvm.x86.avx2.psubs.w(<16 x i16> %a0, <16 x i16> %a1) ; <<16 x i16>> [#use…
595 declare <16 x i16> @llvm.x86.avx2.psubs.w(<16 x i16>, <16 x i16>) nounwind readnone
Dstack-folding-int-avx1.ll1018 %2 = call <16 x i8> @llvm.x86.sse2.psubs.b(<16 x i8> %a0, <16 x i8> %a1)
1021 declare <16 x i8> @llvm.x86.sse2.psubs.b(<16 x i8>, <16 x i8>) nounwind readnone
1027 %2 = call <8 x i16> @llvm.x86.sse2.psubs.w(<8 x i16> %a0, <8 x i16> %a1)
1030 declare <8 x i16> @llvm.x86.sse2.psubs.w(<8 x i16>, <8 x i16>) nounwind readnone
Dstack-folding-int-sse42.ll1045 %2 = call <16 x i8> @llvm.x86.sse2.psubs.b(<16 x i8> %a0, <16 x i8> %a1)
1048 declare <16 x i8> @llvm.x86.sse2.psubs.b(<16 x i8>, <16 x i8>) nounwind readnone
1054 %2 = call <8 x i16> @llvm.x86.sse2.psubs.w(<8 x i16> %a0, <8 x i16> %a1)
1057 declare <8 x i16> @llvm.x86.sse2.psubs.w(<8 x i16>, <8 x i16>) nounwind readnone
Dstack-folding-int-avx2.ll1093 %2 = call <32 x i8> @llvm.x86.avx2.psubs.b(<32 x i8> %a0, <32 x i8> %a1)
1096 declare <32 x i8> @llvm.x86.avx2.psubs.b(<32 x i8>, <32 x i8>) nounwind readnone
1102 %2 = call <16 x i16> @llvm.x86.avx2.psubs.w(<16 x i16> %a0, <16 x i16> %a1)
1105 declare <16 x i16> @llvm.x86.avx2.psubs.w(<16 x i16>, <16 x i16>) nounwind readnone
Davx512bw-intrinsics.ll1320 …%res = call <32 x i16> @llvm.x86.avx512.mask.psubs.w.512(<32 x i16> %a, <32 x i16> %b, <32 x i16> …
1338 …%res = call <32 x i16> @llvm.x86.avx512.mask.psubs.w.512(<32 x i16> %a, <32 x i16> %b, <32 x i16> …
1354 …%res = call <32 x i16> @llvm.x86.avx512.mask.psubs.w.512(<32 x i16> %a, <32 x i16> %b, <32 x i16> …
1370 …%res = call <32 x i16> @llvm.x86.avx512.mask.psubs.w.512(<32 x i16> %a, <32 x i16> %b, <32 x i16> …
1390 …%res = call <32 x i16> @llvm.x86.avx512.mask.psubs.w.512(<32 x i16> %a, <32 x i16> %b, <32 x i16> …
1408 …%res = call <32 x i16> @llvm.x86.avx512.mask.psubs.w.512(<32 x i16> %a, <32 x i16> %b, <32 x i16> …
1412 declare <32 x i16> @llvm.x86.avx512.mask.psubs.w.512(<32 x i16>, <32 x i16>, <32 x i16>, i32)
Dsse2-intrinsics-fast-isel.ll3455 %res = call <16 x i8> @llvm.x86.sse2.psubs.b(<16 x i8> %arg0, <16 x i8> %arg1)
3459 declare <16 x i8> @llvm.x86.sse2.psubs.b(<16 x i8>, <16 x i8>) nounwind readnone
3473 %res = call <8 x i16> @llvm.x86.sse2.psubs.w(<8 x i16> %arg0, <8 x i16> %arg1)
3477 declare <8 x i16> @llvm.x86.sse2.psubs.w(<8 x i16>, <8 x i16>) nounwind readnone
Davx2-intrinsics-fast-isel.ll3162 %res = call <32 x i8> @llvm.x86.avx2.psubs.b(<32 x i8> %arg0, <32 x i8> %arg1)
3166 declare <32 x i8> @llvm.x86.avx2.psubs.b(<32 x i8>, <32 x i8>) nounwind readnone
3180 %res = call <16 x i16> @llvm.x86.avx2.psubs.w(<16 x i16> %arg0, <16 x i16> %arg1)
3184 declare <16 x i16> @llvm.x86.avx2.psubs.w(<16 x i16>, <16 x i16>) nounwind readnone
Davx-intrinsics-x86.ll1138 %res = call <16 x i8> @llvm.x86.sse2.psubs.b(<16 x i8> %a0, <16 x i8> %a1) ; <<16 x i8>> [#uses=1]
1141 declare <16 x i8> @llvm.x86.sse2.psubs.b(<16 x i8>, <16 x i8>) nounwind readnone
1154 %res = call <8 x i16> @llvm.x86.sse2.psubs.w(<8 x i16> %a0, <8 x i16> %a1) ; <<8 x i16>> [#uses=1]
1157 declare <8 x i16> @llvm.x86.sse2.psubs.w(<8 x i16>, <8 x i16>) nounwind readnone
/external/swiftshader/third_party/subzero/src/
DIceAssemblerX8632.h547 void psubs(Type Ty, XmmRegister dst, XmmRegister src);
548 void psubs(Type Ty, XmmRegister dst, const AsmAddress &src);
DIceAssemblerX8664.h566 void psubs(Type Ty, XmmRegister dst, XmmRegister src);
567 void psubs(Type Ty, XmmRegister dst, const AsmAddress &src);
DIceAssemblerX8632.cpp881 void AssemblerX8632::psubs(Type Ty, XmmRegister dst, XmmRegister src) { in psubs() function in Ice::X8632::AssemblerX8632
895 void AssemblerX8632::psubs(Type Ty, XmmRegister dst, const AsmAddress &src) { in psubs() function in Ice::X8632::AssemblerX8632
DIceAssemblerX8664.cpp939 void AssemblerX8664::psubs(Type Ty, XmmRegister dst, XmmRegister src) { in psubs() function in Ice::X8664::AssemblerX8664
954 void AssemblerX8664::psubs(Type Ty, XmmRegister dst, const AsmAddress &src) { in psubs() function in Ice::X8664::AssemblerX8664
DIceInstX8632.h3546 &Assembler::psubs, &Assembler::psubs};
DIceInstX8664.h3443 &Assembler::psubs, &Assembler::psubs};
/external/swiftshader/third_party/llvm-subzero/build/Windows/include/llvm/IR/
DIntrinsics.gen4604 x86_avx2_psubs_b, // llvm.x86.avx2.psubs.b
4605 x86_avx2_psubs_w, // llvm.x86.avx2.psubs.w
5166 x86_avx512_mask_psubs_b_128, // llvm.x86.avx512.mask.psubs.b.128
5167 x86_avx512_mask_psubs_b_256, // llvm.x86.avx512.mask.psubs.b.256
5168 x86_avx512_mask_psubs_b_512, // llvm.x86.avx512.mask.psubs.b.512
5169 x86_avx512_mask_psubs_w_128, // llvm.x86.avx512.mask.psubs.w.128
5170 x86_avx512_mask_psubs_w_256, // llvm.x86.avx512.mask.psubs.w.256
5171 x86_avx512_mask_psubs_w_512, // llvm.x86.avx512.mask.psubs.w.512
5665 x86_mmx_psubs_b, // llvm.x86.mmx.psubs.b
5666 x86_mmx_psubs_w, // llvm.x86.mmx.psubs.w
[all …]
/external/swiftshader/third_party/llvm-subzero/build/Fuchsia/include/llvm/IR/
DIntrinsics.gen4604 x86_avx2_psubs_b, // llvm.x86.avx2.psubs.b
4605 x86_avx2_psubs_w, // llvm.x86.avx2.psubs.w
5166 x86_avx512_mask_psubs_b_128, // llvm.x86.avx512.mask.psubs.b.128
5167 x86_avx512_mask_psubs_b_256, // llvm.x86.avx512.mask.psubs.b.256
5168 x86_avx512_mask_psubs_b_512, // llvm.x86.avx512.mask.psubs.b.512
5169 x86_avx512_mask_psubs_w_128, // llvm.x86.avx512.mask.psubs.w.128
5170 x86_avx512_mask_psubs_w_256, // llvm.x86.avx512.mask.psubs.w.256
5171 x86_avx512_mask_psubs_w_512, // llvm.x86.avx512.mask.psubs.w.512
5665 x86_mmx_psubs_b, // llvm.x86.mmx.psubs.b
5666 x86_mmx_psubs_w, // llvm.x86.mmx.psubs.w
[all …]
/external/swiftshader/third_party/llvm-subzero/build/Android/include/llvm/IR/
DIntrinsics.gen4604 x86_avx2_psubs_b, // llvm.x86.avx2.psubs.b
4605 x86_avx2_psubs_w, // llvm.x86.avx2.psubs.w
5166 x86_avx512_mask_psubs_b_128, // llvm.x86.avx512.mask.psubs.b.128
5167 x86_avx512_mask_psubs_b_256, // llvm.x86.avx512.mask.psubs.b.256
5168 x86_avx512_mask_psubs_b_512, // llvm.x86.avx512.mask.psubs.b.512
5169 x86_avx512_mask_psubs_w_128, // llvm.x86.avx512.mask.psubs.w.128
5170 x86_avx512_mask_psubs_w_256, // llvm.x86.avx512.mask.psubs.w.256
5171 x86_avx512_mask_psubs_w_512, // llvm.x86.avx512.mask.psubs.w.512
5665 x86_mmx_psubs_b, // llvm.x86.mmx.psubs.b
5666 x86_mmx_psubs_w, // llvm.x86.mmx.psubs.w
[all …]
/external/swiftshader/third_party/llvm-subzero/build/MacOS/include/llvm/IR/
DIntrinsics.gen4598 x86_avx2_psubs_b, // llvm.x86.avx2.psubs.b
4599 x86_avx2_psubs_w, // llvm.x86.avx2.psubs.w
5142 x86_avx512_mask_psubs_b_128, // llvm.x86.avx512.mask.psubs.b.128
5143 x86_avx512_mask_psubs_b_256, // llvm.x86.avx512.mask.psubs.b.256
5144 x86_avx512_mask_psubs_b_512, // llvm.x86.avx512.mask.psubs.b.512
5145 x86_avx512_mask_psubs_w_128, // llvm.x86.avx512.mask.psubs.w.128
5146 x86_avx512_mask_psubs_w_256, // llvm.x86.avx512.mask.psubs.w.256
5147 x86_avx512_mask_psubs_w_512, // llvm.x86.avx512.mask.psubs.w.512
5631 x86_mmx_psubs_b, // llvm.x86.mmx.psubs.b
5632 x86_mmx_psubs_w, // llvm.x86.mmx.psubs.w
[all …]

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