1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -mtriple=i686-apple-darwin -mattr=avx2 | FileCheck %s --check-prefix=AVX2 3; RUN: llc < %s -mtriple=i686-apple-darwin -mattr=avx512vl | FileCheck %s --check-prefix=AVX512VL 4 5define <16 x i16> @test_x86_avx2_packssdw(<8 x i32> %a0, <8 x i32> %a1) { 6; AVX2-LABEL: test_x86_avx2_packssdw: 7; AVX2: ## BB#0: 8; AVX2-NEXT: vpackssdw %ymm1, %ymm0, %ymm0 9; AVX2-NEXT: retl 10; 11; AVX512VL-LABEL: test_x86_avx2_packssdw: 12; AVX512VL: ## BB#0: 13; AVX512VL-NEXT: vpackssdw %ymm1, %ymm0, %ymm0 14; AVX512VL-NEXT: retl 15 %res = call <16 x i16> @llvm.x86.avx2.packssdw(<8 x i32> %a0, <8 x i32> %a1) ; <<16 x i16>> [#uses=1] 16 ret <16 x i16> %res 17} 18declare <16 x i16> @llvm.x86.avx2.packssdw(<8 x i32>, <8 x i32>) nounwind readnone 19 20 21define <32 x i8> @test_x86_avx2_packsswb(<16 x i16> %a0, <16 x i16> %a1) { 22; AVX2-LABEL: test_x86_avx2_packsswb: 23; AVX2: ## BB#0: 24; AVX2-NEXT: vpacksswb %ymm1, %ymm0, %ymm0 25; AVX2-NEXT: retl 26; 27; AVX512VL-LABEL: test_x86_avx2_packsswb: 28; AVX512VL: ## BB#0: 29; AVX512VL-NEXT: vpacksswb %ymm1, %ymm0, %ymm0 30; AVX512VL-NEXT: retl 31 %res = call <32 x i8> @llvm.x86.avx2.packsswb(<16 x i16> %a0, <16 x i16> %a1) ; <<32 x i8>> [#uses=1] 32 ret <32 x i8> %res 33} 34declare <32 x i8> @llvm.x86.avx2.packsswb(<16 x i16>, <16 x i16>) nounwind readnone 35 36 37define <32 x i8> @test_x86_avx2_packuswb(<16 x i16> %a0, <16 x i16> %a1) { 38; AVX2-LABEL: test_x86_avx2_packuswb: 39; AVX2: ## BB#0: 40; AVX2-NEXT: vpackuswb %ymm1, %ymm0, %ymm0 41; AVX2-NEXT: retl 42; 43; AVX512VL-LABEL: test_x86_avx2_packuswb: 44; AVX512VL: ## BB#0: 45; AVX512VL-NEXT: vpackuswb %ymm1, %ymm0, %ymm0 46; AVX512VL-NEXT: retl 47 %res = call <32 x i8> @llvm.x86.avx2.packuswb(<16 x i16> %a0, <16 x i16> %a1) ; <<32 x i8>> [#uses=1] 48 ret <32 x i8> %res 49} 50declare <32 x i8> @llvm.x86.avx2.packuswb(<16 x i16>, <16 x i16>) nounwind readnone 51 52 53define <32 x i8> @test_x86_avx2_padds_b(<32 x i8> %a0, <32 x i8> %a1) { 54; AVX2-LABEL: test_x86_avx2_padds_b: 55; AVX2: ## BB#0: 56; AVX2-NEXT: vpaddsb %ymm1, %ymm0, %ymm0 57; AVX2-NEXT: retl 58; 59; AVX512VL-LABEL: test_x86_avx2_padds_b: 60; AVX512VL: ## BB#0: 61; AVX512VL-NEXT: vpaddsb %ymm1, %ymm0, %ymm0 62; AVX512VL-NEXT: retl 63 %res = call <32 x i8> @llvm.x86.avx2.padds.b(<32 x i8> %a0, <32 x i8> %a1) ; <<32 x i8>> [#uses=1] 64 ret <32 x i8> %res 65} 66declare <32 x i8> @llvm.x86.avx2.padds.b(<32 x i8>, <32 x i8>) nounwind readnone 67 68 69define <16 x i16> @test_x86_avx2_padds_w(<16 x i16> %a0, <16 x i16> %a1) { 70; AVX2-LABEL: test_x86_avx2_padds_w: 71; AVX2: ## BB#0: 72; AVX2-NEXT: vpaddsw %ymm1, %ymm0, %ymm0 73; AVX2-NEXT: retl 74; 75; AVX512VL-LABEL: test_x86_avx2_padds_w: 76; AVX512VL: ## BB#0: 77; AVX512VL-NEXT: vpaddsw %ymm1, %ymm0, %ymm0 78; AVX512VL-NEXT: retl 79 %res = call <16 x i16> @llvm.x86.avx2.padds.w(<16 x i16> %a0, <16 x i16> %a1) ; <<16 x i16>> [#uses=1] 80 ret <16 x i16> %res 81} 82declare <16 x i16> @llvm.x86.avx2.padds.w(<16 x i16>, <16 x i16>) nounwind readnone 83 84 85define <32 x i8> @test_x86_avx2_paddus_b(<32 x i8> %a0, <32 x i8> %a1) { 86; AVX2-LABEL: test_x86_avx2_paddus_b: 87; AVX2: ## BB#0: 88; AVX2-NEXT: vpaddusb %ymm1, %ymm0, %ymm0 89; AVX2-NEXT: retl 90; 91; AVX512VL-LABEL: test_x86_avx2_paddus_b: 92; AVX512VL: ## BB#0: 93; AVX512VL-NEXT: vpaddusb %ymm1, %ymm0, %ymm0 94; AVX512VL-NEXT: retl 95 %res = call <32 x i8> @llvm.x86.avx2.paddus.b(<32 x i8> %a0, <32 x i8> %a1) ; <<32 x i8>> [#uses=1] 96 ret <32 x i8> %res 97} 98declare <32 x i8> @llvm.x86.avx2.paddus.b(<32 x i8>, <32 x i8>) nounwind readnone 99 100 101define <16 x i16> @test_x86_avx2_paddus_w(<16 x i16> %a0, <16 x i16> %a1) { 102; AVX2-LABEL: test_x86_avx2_paddus_w: 103; AVX2: ## BB#0: 104; AVX2-NEXT: vpaddusw %ymm1, %ymm0, %ymm0 105; AVX2-NEXT: retl 106; 107; AVX512VL-LABEL: test_x86_avx2_paddus_w: 108; AVX512VL: ## BB#0: 109; AVX512VL-NEXT: vpaddusw %ymm1, %ymm0, %ymm0 110; AVX512VL-NEXT: retl 111 %res = call <16 x i16> @llvm.x86.avx2.paddus.w(<16 x i16> %a0, <16 x i16> %a1) ; <<16 x i16>> [#uses=1] 112 ret <16 x i16> %res 113} 114declare <16 x i16> @llvm.x86.avx2.paddus.w(<16 x i16>, <16 x i16>) nounwind readnone 115 116 117define <32 x i8> @test_x86_avx2_pavg_b(<32 x i8> %a0, <32 x i8> %a1) { 118; AVX2-LABEL: test_x86_avx2_pavg_b: 119; AVX2: ## BB#0: 120; AVX2-NEXT: vpavgb %ymm1, %ymm0, %ymm0 121; AVX2-NEXT: retl 122; 123; AVX512VL-LABEL: test_x86_avx2_pavg_b: 124; AVX512VL: ## BB#0: 125; AVX512VL-NEXT: vpavgb %ymm1, %ymm0, %ymm0 126; AVX512VL-NEXT: retl 127 %res = call <32 x i8> @llvm.x86.avx2.pavg.b(<32 x i8> %a0, <32 x i8> %a1) ; <<32 x i8>> [#uses=1] 128 ret <32 x i8> %res 129} 130declare <32 x i8> @llvm.x86.avx2.pavg.b(<32 x i8>, <32 x i8>) nounwind readnone 131 132 133define <16 x i16> @test_x86_avx2_pavg_w(<16 x i16> %a0, <16 x i16> %a1) { 134; AVX2-LABEL: test_x86_avx2_pavg_w: 135; AVX2: ## BB#0: 136; AVX2-NEXT: vpavgw %ymm1, %ymm0, %ymm0 137; AVX2-NEXT: retl 138; 139; AVX512VL-LABEL: test_x86_avx2_pavg_w: 140; AVX512VL: ## BB#0: 141; AVX512VL-NEXT: vpavgw %ymm1, %ymm0, %ymm0 142; AVX512VL-NEXT: retl 143 %res = call <16 x i16> @llvm.x86.avx2.pavg.w(<16 x i16> %a0, <16 x i16> %a1) ; <<16 x i16>> [#uses=1] 144 ret <16 x i16> %res 145} 146declare <16 x i16> @llvm.x86.avx2.pavg.w(<16 x i16>, <16 x i16>) nounwind readnone 147 148 149define <8 x i32> @test_x86_avx2_pmadd_wd(<16 x i16> %a0, <16 x i16> %a1) { 150; AVX2-LABEL: test_x86_avx2_pmadd_wd: 151; AVX2: ## BB#0: 152; AVX2-NEXT: vpmaddwd %ymm1, %ymm0, %ymm0 153; AVX2-NEXT: retl 154; 155; AVX512VL-LABEL: test_x86_avx2_pmadd_wd: 156; AVX512VL: ## BB#0: 157; AVX512VL-NEXT: vpmaddwd %ymm1, %ymm0, %ymm0 158; AVX512VL-NEXT: retl 159 %res = call <8 x i32> @llvm.x86.avx2.pmadd.wd(<16 x i16> %a0, <16 x i16> %a1) ; <<8 x i32>> [#uses=1] 160 ret <8 x i32> %res 161} 162declare <8 x i32> @llvm.x86.avx2.pmadd.wd(<16 x i16>, <16 x i16>) nounwind readnone 163 164 165define <16 x i16> @test_x86_avx2_pmaxs_w(<16 x i16> %a0, <16 x i16> %a1) { 166; AVX2-LABEL: test_x86_avx2_pmaxs_w: 167; AVX2: ## BB#0: 168; AVX2-NEXT: vpmaxsw %ymm1, %ymm0, %ymm0 169; AVX2-NEXT: retl 170; 171; AVX512VL-LABEL: test_x86_avx2_pmaxs_w: 172; AVX512VL: ## BB#0: 173; AVX512VL-NEXT: vpmaxsw %ymm1, %ymm0, %ymm0 174; AVX512VL-NEXT: retl 175 %res = call <16 x i16> @llvm.x86.avx2.pmaxs.w(<16 x i16> %a0, <16 x i16> %a1) ; <<16 x i16>> [#uses=1] 176 ret <16 x i16> %res 177} 178declare <16 x i16> @llvm.x86.avx2.pmaxs.w(<16 x i16>, <16 x i16>) nounwind readnone 179 180 181define <32 x i8> @test_x86_avx2_pmaxu_b(<32 x i8> %a0, <32 x i8> %a1) { 182; AVX2-LABEL: test_x86_avx2_pmaxu_b: 183; AVX2: ## BB#0: 184; AVX2-NEXT: vpmaxub %ymm1, %ymm0, %ymm0 185; AVX2-NEXT: retl 186; 187; AVX512VL-LABEL: test_x86_avx2_pmaxu_b: 188; AVX512VL: ## BB#0: 189; AVX512VL-NEXT: vpmaxub %ymm1, %ymm0, %ymm0 190; AVX512VL-NEXT: retl 191 %res = call <32 x i8> @llvm.x86.avx2.pmaxu.b(<32 x i8> %a0, <32 x i8> %a1) ; <<32 x i8>> [#uses=1] 192 ret <32 x i8> %res 193} 194declare <32 x i8> @llvm.x86.avx2.pmaxu.b(<32 x i8>, <32 x i8>) nounwind readnone 195 196 197define <16 x i16> @test_x86_avx2_pmins_w(<16 x i16> %a0, <16 x i16> %a1) { 198; AVX2-LABEL: test_x86_avx2_pmins_w: 199; AVX2: ## BB#0: 200; AVX2-NEXT: vpminsw %ymm1, %ymm0, %ymm0 201; AVX2-NEXT: retl 202; 203; AVX512VL-LABEL: test_x86_avx2_pmins_w: 204; AVX512VL: ## BB#0: 205; AVX512VL-NEXT: vpminsw %ymm1, %ymm0, %ymm0 206; AVX512VL-NEXT: retl 207 %res = call <16 x i16> @llvm.x86.avx2.pmins.w(<16 x i16> %a0, <16 x i16> %a1) ; <<16 x i16>> [#uses=1] 208 ret <16 x i16> %res 209} 210declare <16 x i16> @llvm.x86.avx2.pmins.w(<16 x i16>, <16 x i16>) nounwind readnone 211 212 213define <32 x i8> @test_x86_avx2_pminu_b(<32 x i8> %a0, <32 x i8> %a1) { 214; AVX2-LABEL: test_x86_avx2_pminu_b: 215; AVX2: ## BB#0: 216; AVX2-NEXT: vpminub %ymm1, %ymm0, %ymm0 217; AVX2-NEXT: retl 218; 219; AVX512VL-LABEL: test_x86_avx2_pminu_b: 220; AVX512VL: ## BB#0: 221; AVX512VL-NEXT: vpminub %ymm1, %ymm0, %ymm0 222; AVX512VL-NEXT: retl 223 %res = call <32 x i8> @llvm.x86.avx2.pminu.b(<32 x i8> %a0, <32 x i8> %a1) ; <<32 x i8>> [#uses=1] 224 ret <32 x i8> %res 225} 226declare <32 x i8> @llvm.x86.avx2.pminu.b(<32 x i8>, <32 x i8>) nounwind readnone 227 228 229define i32 @test_x86_avx2_pmovmskb(<32 x i8> %a0) { 230; AVX2-LABEL: test_x86_avx2_pmovmskb: 231; AVX2: ## BB#0: 232; AVX2-NEXT: vpmovmskb %ymm0, %eax 233; AVX2-NEXT: vzeroupper 234; AVX2-NEXT: retl 235; 236; AVX512VL-LABEL: test_x86_avx2_pmovmskb: 237; AVX512VL: ## BB#0: 238; AVX512VL-NEXT: vpmovmskb %ymm0, %eax 239; AVX512VL-NEXT: retl 240 %res = call i32 @llvm.x86.avx2.pmovmskb(<32 x i8> %a0) ; <i32> [#uses=1] 241 ret i32 %res 242} 243declare i32 @llvm.x86.avx2.pmovmskb(<32 x i8>) nounwind readnone 244 245 246define <16 x i16> @test_x86_avx2_pmulh_w(<16 x i16> %a0, <16 x i16> %a1) { 247; AVX2-LABEL: test_x86_avx2_pmulh_w: 248; AVX2: ## BB#0: 249; AVX2-NEXT: vpmulhw %ymm1, %ymm0, %ymm0 250; AVX2-NEXT: retl 251; 252; AVX512VL-LABEL: test_x86_avx2_pmulh_w: 253; AVX512VL: ## BB#0: 254; AVX512VL-NEXT: vpmulhw %ymm1, %ymm0, %ymm0 255; AVX512VL-NEXT: retl 256 %res = call <16 x i16> @llvm.x86.avx2.pmulh.w(<16 x i16> %a0, <16 x i16> %a1) ; <<16 x i16>> [#uses=1] 257 ret <16 x i16> %res 258} 259declare <16 x i16> @llvm.x86.avx2.pmulh.w(<16 x i16>, <16 x i16>) nounwind readnone 260 261 262define <16 x i16> @test_x86_avx2_pmulhu_w(<16 x i16> %a0, <16 x i16> %a1) { 263; AVX2-LABEL: test_x86_avx2_pmulhu_w: 264; AVX2: ## BB#0: 265; AVX2-NEXT: vpmulhuw %ymm1, %ymm0, %ymm0 266; AVX2-NEXT: retl 267; 268; AVX512VL-LABEL: test_x86_avx2_pmulhu_w: 269; AVX512VL: ## BB#0: 270; AVX512VL-NEXT: vpmulhuw %ymm1, %ymm0, %ymm0 271; AVX512VL-NEXT: retl 272 %res = call <16 x i16> @llvm.x86.avx2.pmulhu.w(<16 x i16> %a0, <16 x i16> %a1) ; <<16 x i16>> [#uses=1] 273 ret <16 x i16> %res 274} 275declare <16 x i16> @llvm.x86.avx2.pmulhu.w(<16 x i16>, <16 x i16>) nounwind readnone 276 277 278define <4 x i64> @test_x86_avx2_pmulu_dq(<8 x i32> %a0, <8 x i32> %a1) { 279; AVX2-LABEL: test_x86_avx2_pmulu_dq: 280; AVX2: ## BB#0: 281; AVX2-NEXT: vpmuludq %ymm1, %ymm0, %ymm0 282; AVX2-NEXT: retl 283; 284; AVX512VL-LABEL: test_x86_avx2_pmulu_dq: 285; AVX512VL: ## BB#0: 286; AVX512VL-NEXT: vpmuludq %ymm1, %ymm0, %ymm0 287; AVX512VL-NEXT: retl 288 %res = call <4 x i64> @llvm.x86.avx2.pmulu.dq(<8 x i32> %a0, <8 x i32> %a1) ; <<4 x i64>> [#uses=1] 289 ret <4 x i64> %res 290} 291declare <4 x i64> @llvm.x86.avx2.pmulu.dq(<8 x i32>, <8 x i32>) nounwind readnone 292 293 294define <4 x i64> @test_x86_avx2_psad_bw(<32 x i8> %a0, <32 x i8> %a1) { 295; AVX2-LABEL: test_x86_avx2_psad_bw: 296; AVX2: ## BB#0: 297; AVX2-NEXT: vpsadbw %ymm1, %ymm0, %ymm0 298; AVX2-NEXT: retl 299; 300; AVX512VL-LABEL: test_x86_avx2_psad_bw: 301; AVX512VL: ## BB#0: 302; AVX512VL-NEXT: vpsadbw %ymm1, %ymm0, %ymm0 303; AVX512VL-NEXT: retl 304 %res = call <4 x i64> @llvm.x86.avx2.psad.bw(<32 x i8> %a0, <32 x i8> %a1) ; <<4 x i64>> [#uses=1] 305 ret <4 x i64> %res 306} 307declare <4 x i64> @llvm.x86.avx2.psad.bw(<32 x i8>, <32 x i8>) nounwind readnone 308 309 310define <8 x i32> @test_x86_avx2_psll_d(<8 x i32> %a0, <4 x i32> %a1) { 311; AVX2-LABEL: test_x86_avx2_psll_d: 312; AVX2: ## BB#0: 313; AVX2-NEXT: vpslld %xmm1, %ymm0, %ymm0 314; AVX2-NEXT: retl 315; 316; AVX512VL-LABEL: test_x86_avx2_psll_d: 317; AVX512VL: ## BB#0: 318; AVX512VL-NEXT: vpslld %xmm1, %ymm0, %ymm0 319; AVX512VL-NEXT: retl 320 %res = call <8 x i32> @llvm.x86.avx2.psll.d(<8 x i32> %a0, <4 x i32> %a1) ; <<8 x i32>> [#uses=1] 321 ret <8 x i32> %res 322} 323declare <8 x i32> @llvm.x86.avx2.psll.d(<8 x i32>, <4 x i32>) nounwind readnone 324 325 326define <4 x i64> @test_x86_avx2_psll_q(<4 x i64> %a0, <2 x i64> %a1) { 327; AVX2-LABEL: test_x86_avx2_psll_q: 328; AVX2: ## BB#0: 329; AVX2-NEXT: vpsllq %xmm1, %ymm0, %ymm0 330; AVX2-NEXT: retl 331; 332; AVX512VL-LABEL: test_x86_avx2_psll_q: 333; AVX512VL: ## BB#0: 334; AVX512VL-NEXT: vpsllq %xmm1, %ymm0, %ymm0 335; AVX512VL-NEXT: retl 336 %res = call <4 x i64> @llvm.x86.avx2.psll.q(<4 x i64> %a0, <2 x i64> %a1) ; <<4 x i64>> [#uses=1] 337 ret <4 x i64> %res 338} 339declare <4 x i64> @llvm.x86.avx2.psll.q(<4 x i64>, <2 x i64>) nounwind readnone 340 341 342define <16 x i16> @test_x86_avx2_psll_w(<16 x i16> %a0, <8 x i16> %a1) { 343; AVX2-LABEL: test_x86_avx2_psll_w: 344; AVX2: ## BB#0: 345; AVX2-NEXT: vpsllw %xmm1, %ymm0, %ymm0 346; AVX2-NEXT: retl 347; 348; AVX512VL-LABEL: test_x86_avx2_psll_w: 349; AVX512VL: ## BB#0: 350; AVX512VL-NEXT: vpsllw %xmm1, %ymm0, %ymm0 351; AVX512VL-NEXT: retl 352 %res = call <16 x i16> @llvm.x86.avx2.psll.w(<16 x i16> %a0, <8 x i16> %a1) ; <<16 x i16>> [#uses=1] 353 ret <16 x i16> %res 354} 355declare <16 x i16> @llvm.x86.avx2.psll.w(<16 x i16>, <8 x i16>) nounwind readnone 356 357 358define <8 x i32> @test_x86_avx2_pslli_d(<8 x i32> %a0) { 359; AVX2-LABEL: test_x86_avx2_pslli_d: 360; AVX2: ## BB#0: 361; AVX2-NEXT: vpslld $7, %ymm0, %ymm0 362; AVX2-NEXT: retl 363; 364; AVX512VL-LABEL: test_x86_avx2_pslli_d: 365; AVX512VL: ## BB#0: 366; AVX512VL-NEXT: vpslld $7, %ymm0, %ymm0 367; AVX512VL-NEXT: retl 368 %res = call <8 x i32> @llvm.x86.avx2.pslli.d(<8 x i32> %a0, i32 7) ; <<8 x i32>> [#uses=1] 369 ret <8 x i32> %res 370} 371declare <8 x i32> @llvm.x86.avx2.pslli.d(<8 x i32>, i32) nounwind readnone 372 373 374define <4 x i64> @test_x86_avx2_pslli_q(<4 x i64> %a0) { 375; AVX2-LABEL: test_x86_avx2_pslli_q: 376; AVX2: ## BB#0: 377; AVX2-NEXT: vpsllq $7, %ymm0, %ymm0 378; AVX2-NEXT: retl 379; 380; AVX512VL-LABEL: test_x86_avx2_pslli_q: 381; AVX512VL: ## BB#0: 382; AVX512VL-NEXT: vpsllq $7, %ymm0, %ymm0 383; AVX512VL-NEXT: retl 384 %res = call <4 x i64> @llvm.x86.avx2.pslli.q(<4 x i64> %a0, i32 7) ; <<4 x i64>> [#uses=1] 385 ret <4 x i64> %res 386} 387declare <4 x i64> @llvm.x86.avx2.pslli.q(<4 x i64>, i32) nounwind readnone 388 389 390define <16 x i16> @test_x86_avx2_pslli_w(<16 x i16> %a0) { 391; AVX2-LABEL: test_x86_avx2_pslli_w: 392; AVX2: ## BB#0: 393; AVX2-NEXT: vpsllw $7, %ymm0, %ymm0 394; AVX2-NEXT: retl 395; 396; AVX512VL-LABEL: test_x86_avx2_pslli_w: 397; AVX512VL: ## BB#0: 398; AVX512VL-NEXT: vpsllw $7, %ymm0, %ymm0 399; AVX512VL-NEXT: retl 400 %res = call <16 x i16> @llvm.x86.avx2.pslli.w(<16 x i16> %a0, i32 7) ; <<16 x i16>> [#uses=1] 401 ret <16 x i16> %res 402} 403declare <16 x i16> @llvm.x86.avx2.pslli.w(<16 x i16>, i32) nounwind readnone 404 405 406define <8 x i32> @test_x86_avx2_psra_d(<8 x i32> %a0, <4 x i32> %a1) { 407; AVX2-LABEL: test_x86_avx2_psra_d: 408; AVX2: ## BB#0: 409; AVX2-NEXT: vpsrad %xmm1, %ymm0, %ymm0 410; AVX2-NEXT: retl 411; 412; AVX512VL-LABEL: test_x86_avx2_psra_d: 413; AVX512VL: ## BB#0: 414; AVX512VL-NEXT: vpsrad %xmm1, %ymm0, %ymm0 415; AVX512VL-NEXT: retl 416 %res = call <8 x i32> @llvm.x86.avx2.psra.d(<8 x i32> %a0, <4 x i32> %a1) ; <<8 x i32>> [#uses=1] 417 ret <8 x i32> %res 418} 419declare <8 x i32> @llvm.x86.avx2.psra.d(<8 x i32>, <4 x i32>) nounwind readnone 420 421 422define <16 x i16> @test_x86_avx2_psra_w(<16 x i16> %a0, <8 x i16> %a1) { 423; AVX2-LABEL: test_x86_avx2_psra_w: 424; AVX2: ## BB#0: 425; AVX2-NEXT: vpsraw %xmm1, %ymm0, %ymm0 426; AVX2-NEXT: retl 427; 428; AVX512VL-LABEL: test_x86_avx2_psra_w: 429; AVX512VL: ## BB#0: 430; AVX512VL-NEXT: vpsraw %xmm1, %ymm0, %ymm0 431; AVX512VL-NEXT: retl 432 %res = call <16 x i16> @llvm.x86.avx2.psra.w(<16 x i16> %a0, <8 x i16> %a1) ; <<16 x i16>> [#uses=1] 433 ret <16 x i16> %res 434} 435declare <16 x i16> @llvm.x86.avx2.psra.w(<16 x i16>, <8 x i16>) nounwind readnone 436 437 438define <8 x i32> @test_x86_avx2_psrai_d(<8 x i32> %a0) { 439; AVX2-LABEL: test_x86_avx2_psrai_d: 440; AVX2: ## BB#0: 441; AVX2-NEXT: vpsrad $7, %ymm0, %ymm0 442; AVX2-NEXT: retl 443; 444; AVX512VL-LABEL: test_x86_avx2_psrai_d: 445; AVX512VL: ## BB#0: 446; AVX512VL-NEXT: vpsrad $7, %ymm0, %ymm0 447; AVX512VL-NEXT: retl 448 %res = call <8 x i32> @llvm.x86.avx2.psrai.d(<8 x i32> %a0, i32 7) ; <<8 x i32>> [#uses=1] 449 ret <8 x i32> %res 450} 451declare <8 x i32> @llvm.x86.avx2.psrai.d(<8 x i32>, i32) nounwind readnone 452 453 454define <16 x i16> @test_x86_avx2_psrai_w(<16 x i16> %a0) { 455; AVX2-LABEL: test_x86_avx2_psrai_w: 456; AVX2: ## BB#0: 457; AVX2-NEXT: vpsraw $7, %ymm0, %ymm0 458; AVX2-NEXT: retl 459; 460; AVX512VL-LABEL: test_x86_avx2_psrai_w: 461; AVX512VL: ## BB#0: 462; AVX512VL-NEXT: vpsraw $7, %ymm0, %ymm0 463; AVX512VL-NEXT: retl 464 %res = call <16 x i16> @llvm.x86.avx2.psrai.w(<16 x i16> %a0, i32 7) ; <<16 x i16>> [#uses=1] 465 ret <16 x i16> %res 466} 467declare <16 x i16> @llvm.x86.avx2.psrai.w(<16 x i16>, i32) nounwind readnone 468 469 470define <8 x i32> @test_x86_avx2_psrl_d(<8 x i32> %a0, <4 x i32> %a1) { 471; AVX2-LABEL: test_x86_avx2_psrl_d: 472; AVX2: ## BB#0: 473; AVX2-NEXT: vpsrld %xmm1, %ymm0, %ymm0 474; AVX2-NEXT: retl 475; 476; AVX512VL-LABEL: test_x86_avx2_psrl_d: 477; AVX512VL: ## BB#0: 478; AVX512VL-NEXT: vpsrld %xmm1, %ymm0, %ymm0 479; AVX512VL-NEXT: retl 480 %res = call <8 x i32> @llvm.x86.avx2.psrl.d(<8 x i32> %a0, <4 x i32> %a1) ; <<8 x i32>> [#uses=1] 481 ret <8 x i32> %res 482} 483declare <8 x i32> @llvm.x86.avx2.psrl.d(<8 x i32>, <4 x i32>) nounwind readnone 484 485 486define <4 x i64> @test_x86_avx2_psrl_q(<4 x i64> %a0, <2 x i64> %a1) { 487; AVX2-LABEL: test_x86_avx2_psrl_q: 488; AVX2: ## BB#0: 489; AVX2-NEXT: vpsrlq %xmm1, %ymm0, %ymm0 490; AVX2-NEXT: retl 491; 492; AVX512VL-LABEL: test_x86_avx2_psrl_q: 493; AVX512VL: ## BB#0: 494; AVX512VL-NEXT: vpsrlq %xmm1, %ymm0, %ymm0 495; AVX512VL-NEXT: retl 496 %res = call <4 x i64> @llvm.x86.avx2.psrl.q(<4 x i64> %a0, <2 x i64> %a1) ; <<4 x i64>> [#uses=1] 497 ret <4 x i64> %res 498} 499declare <4 x i64> @llvm.x86.avx2.psrl.q(<4 x i64>, <2 x i64>) nounwind readnone 500 501 502define <16 x i16> @test_x86_avx2_psrl_w(<16 x i16> %a0, <8 x i16> %a1) { 503; AVX2-LABEL: test_x86_avx2_psrl_w: 504; AVX2: ## BB#0: 505; AVX2-NEXT: vpsrlw %xmm1, %ymm0, %ymm0 506; AVX2-NEXT: retl 507; 508; AVX512VL-LABEL: test_x86_avx2_psrl_w: 509; AVX512VL: ## BB#0: 510; AVX512VL-NEXT: vpsrlw %xmm1, %ymm0, %ymm0 511; AVX512VL-NEXT: retl 512 %res = call <16 x i16> @llvm.x86.avx2.psrl.w(<16 x i16> %a0, <8 x i16> %a1) ; <<16 x i16>> [#uses=1] 513 ret <16 x i16> %res 514} 515declare <16 x i16> @llvm.x86.avx2.psrl.w(<16 x i16>, <8 x i16>) nounwind readnone 516 517 518define <8 x i32> @test_x86_avx2_psrli_d(<8 x i32> %a0) { 519; AVX2-LABEL: test_x86_avx2_psrli_d: 520; AVX2: ## BB#0: 521; AVX2-NEXT: vpsrld $7, %ymm0, %ymm0 522; AVX2-NEXT: retl 523; 524; AVX512VL-LABEL: test_x86_avx2_psrli_d: 525; AVX512VL: ## BB#0: 526; AVX512VL-NEXT: vpsrld $7, %ymm0, %ymm0 527; AVX512VL-NEXT: retl 528 %res = call <8 x i32> @llvm.x86.avx2.psrli.d(<8 x i32> %a0, i32 7) ; <<8 x i32>> [#uses=1] 529 ret <8 x i32> %res 530} 531declare <8 x i32> @llvm.x86.avx2.psrli.d(<8 x i32>, i32) nounwind readnone 532 533 534define <4 x i64> @test_x86_avx2_psrli_q(<4 x i64> %a0) { 535; AVX2-LABEL: test_x86_avx2_psrli_q: 536; AVX2: ## BB#0: 537; AVX2-NEXT: vpsrlq $7, %ymm0, %ymm0 538; AVX2-NEXT: retl 539; 540; AVX512VL-LABEL: test_x86_avx2_psrli_q: 541; AVX512VL: ## BB#0: 542; AVX512VL-NEXT: vpsrlq $7, %ymm0, %ymm0 543; AVX512VL-NEXT: retl 544 %res = call <4 x i64> @llvm.x86.avx2.psrli.q(<4 x i64> %a0, i32 7) ; <<4 x i64>> [#uses=1] 545 ret <4 x i64> %res 546} 547declare <4 x i64> @llvm.x86.avx2.psrli.q(<4 x i64>, i32) nounwind readnone 548 549 550define <16 x i16> @test_x86_avx2_psrli_w(<16 x i16> %a0) { 551; AVX2-LABEL: test_x86_avx2_psrli_w: 552; AVX2: ## BB#0: 553; AVX2-NEXT: vpsrlw $7, %ymm0, %ymm0 554; AVX2-NEXT: retl 555; 556; AVX512VL-LABEL: test_x86_avx2_psrli_w: 557; AVX512VL: ## BB#0: 558; AVX512VL-NEXT: vpsrlw $7, %ymm0, %ymm0 559; AVX512VL-NEXT: retl 560 %res = call <16 x i16> @llvm.x86.avx2.psrli.w(<16 x i16> %a0, i32 7) ; <<16 x i16>> [#uses=1] 561 ret <16 x i16> %res 562} 563declare <16 x i16> @llvm.x86.avx2.psrli.w(<16 x i16>, i32) nounwind readnone 564 565 566define <32 x i8> @test_x86_avx2_psubs_b(<32 x i8> %a0, <32 x i8> %a1) { 567; AVX2-LABEL: test_x86_avx2_psubs_b: 568; AVX2: ## BB#0: 569; AVX2-NEXT: vpsubsb %ymm1, %ymm0, %ymm0 570; AVX2-NEXT: retl 571; 572; AVX512VL-LABEL: test_x86_avx2_psubs_b: 573; AVX512VL: ## BB#0: 574; AVX512VL-NEXT: vpsubsb %ymm1, %ymm0, %ymm0 575; AVX512VL-NEXT: retl 576 %res = call <32 x i8> @llvm.x86.avx2.psubs.b(<32 x i8> %a0, <32 x i8> %a1) ; <<32 x i8>> [#uses=1] 577 ret <32 x i8> %res 578} 579declare <32 x i8> @llvm.x86.avx2.psubs.b(<32 x i8>, <32 x i8>) nounwind readnone 580 581 582define <16 x i16> @test_x86_avx2_psubs_w(<16 x i16> %a0, <16 x i16> %a1) { 583; AVX2-LABEL: test_x86_avx2_psubs_w: 584; AVX2: ## BB#0: 585; AVX2-NEXT: vpsubsw %ymm1, %ymm0, %ymm0 586; AVX2-NEXT: retl 587; 588; AVX512VL-LABEL: test_x86_avx2_psubs_w: 589; AVX512VL: ## BB#0: 590; AVX512VL-NEXT: vpsubsw %ymm1, %ymm0, %ymm0 591; AVX512VL-NEXT: retl 592 %res = call <16 x i16> @llvm.x86.avx2.psubs.w(<16 x i16> %a0, <16 x i16> %a1) ; <<16 x i16>> [#uses=1] 593 ret <16 x i16> %res 594} 595declare <16 x i16> @llvm.x86.avx2.psubs.w(<16 x i16>, <16 x i16>) nounwind readnone 596 597 598define <32 x i8> @test_x86_avx2_psubus_b(<32 x i8> %a0, <32 x i8> %a1) { 599; AVX2-LABEL: test_x86_avx2_psubus_b: 600; AVX2: ## BB#0: 601; AVX2-NEXT: vpsubusb %ymm1, %ymm0, %ymm0 602; AVX2-NEXT: retl 603; 604; AVX512VL-LABEL: test_x86_avx2_psubus_b: 605; AVX512VL: ## BB#0: 606; AVX512VL-NEXT: vpsubusb %ymm1, %ymm0, %ymm0 607; AVX512VL-NEXT: retl 608 %res = call <32 x i8> @llvm.x86.avx2.psubus.b(<32 x i8> %a0, <32 x i8> %a1) ; <<32 x i8>> [#uses=1] 609 ret <32 x i8> %res 610} 611declare <32 x i8> @llvm.x86.avx2.psubus.b(<32 x i8>, <32 x i8>) nounwind readnone 612 613 614define <16 x i16> @test_x86_avx2_psubus_w(<16 x i16> %a0, <16 x i16> %a1) { 615; AVX2-LABEL: test_x86_avx2_psubus_w: 616; AVX2: ## BB#0: 617; AVX2-NEXT: vpsubusw %ymm1, %ymm0, %ymm0 618; AVX2-NEXT: retl 619; 620; AVX512VL-LABEL: test_x86_avx2_psubus_w: 621; AVX512VL: ## BB#0: 622; AVX512VL-NEXT: vpsubusw %ymm1, %ymm0, %ymm0 623; AVX512VL-NEXT: retl 624 %res = call <16 x i16> @llvm.x86.avx2.psubus.w(<16 x i16> %a0, <16 x i16> %a1) ; <<16 x i16>> [#uses=1] 625 ret <16 x i16> %res 626} 627declare <16 x i16> @llvm.x86.avx2.psubus.w(<16 x i16>, <16 x i16>) nounwind readnone 628 629 630define <32 x i8> @test_x86_avx2_pabs_b(<32 x i8> %a0) { 631; AVX2-LABEL: test_x86_avx2_pabs_b: 632; AVX2: ## BB#0: 633; AVX2-NEXT: vpabsb %ymm0, %ymm0 634; AVX2-NEXT: retl 635; 636; AVX512VL-LABEL: test_x86_avx2_pabs_b: 637; AVX512VL: ## BB#0: 638; AVX512VL-NEXT: vpabsb %ymm0, %ymm0 639; AVX512VL-NEXT: retl 640 %res = call <32 x i8> @llvm.x86.avx2.pabs.b(<32 x i8> %a0) ; <<32 x i8>> [#uses=1] 641 ret <32 x i8> %res 642} 643declare <32 x i8> @llvm.x86.avx2.pabs.b(<32 x i8>) nounwind readnone 644 645 646define <8 x i32> @test_x86_avx2_pabs_d(<8 x i32> %a0) { 647; AVX2-LABEL: test_x86_avx2_pabs_d: 648; AVX2: ## BB#0: 649; AVX2-NEXT: vpabsd %ymm0, %ymm0 650; AVX2-NEXT: retl 651; 652; AVX512VL-LABEL: test_x86_avx2_pabs_d: 653; AVX512VL: ## BB#0: 654; AVX512VL-NEXT: vpabsd %ymm0, %ymm0 655; AVX512VL-NEXT: retl 656 %res = call <8 x i32> @llvm.x86.avx2.pabs.d(<8 x i32> %a0) ; <<8 x i32>> [#uses=1] 657 ret <8 x i32> %res 658} 659declare <8 x i32> @llvm.x86.avx2.pabs.d(<8 x i32>) nounwind readnone 660 661 662define <16 x i16> @test_x86_avx2_pabs_w(<16 x i16> %a0) { 663; AVX2-LABEL: test_x86_avx2_pabs_w: 664; AVX2: ## BB#0: 665; AVX2-NEXT: vpabsw %ymm0, %ymm0 666; AVX2-NEXT: retl 667; 668; AVX512VL-LABEL: test_x86_avx2_pabs_w: 669; AVX512VL: ## BB#0: 670; AVX512VL-NEXT: vpabsw %ymm0, %ymm0 671; AVX512VL-NEXT: retl 672 %res = call <16 x i16> @llvm.x86.avx2.pabs.w(<16 x i16> %a0) ; <<16 x i16>> [#uses=1] 673 ret <16 x i16> %res 674} 675declare <16 x i16> @llvm.x86.avx2.pabs.w(<16 x i16>) nounwind readnone 676 677 678define <8 x i32> @test_x86_avx2_phadd_d(<8 x i32> %a0, <8 x i32> %a1) { 679; AVX2-LABEL: test_x86_avx2_phadd_d: 680; AVX2: ## BB#0: 681; AVX2-NEXT: vphaddd %ymm1, %ymm0, %ymm0 682; AVX2-NEXT: retl 683; 684; AVX512VL-LABEL: test_x86_avx2_phadd_d: 685; AVX512VL: ## BB#0: 686; AVX512VL-NEXT: vphaddd %ymm1, %ymm0, %ymm0 687; AVX512VL-NEXT: retl 688 %res = call <8 x i32> @llvm.x86.avx2.phadd.d(<8 x i32> %a0, <8 x i32> %a1) ; <<8 x i32>> [#uses=1] 689 ret <8 x i32> %res 690} 691declare <8 x i32> @llvm.x86.avx2.phadd.d(<8 x i32>, <8 x i32>) nounwind readnone 692 693 694define <16 x i16> @test_x86_avx2_phadd_sw(<16 x i16> %a0, <16 x i16> %a1) { 695; AVX2-LABEL: test_x86_avx2_phadd_sw: 696; AVX2: ## BB#0: 697; AVX2-NEXT: vphaddsw %ymm1, %ymm0, %ymm0 698; AVX2-NEXT: retl 699; 700; AVX512VL-LABEL: test_x86_avx2_phadd_sw: 701; AVX512VL: ## BB#0: 702; AVX512VL-NEXT: vphaddsw %ymm1, %ymm0, %ymm0 703; AVX512VL-NEXT: retl 704 %res = call <16 x i16> @llvm.x86.avx2.phadd.sw(<16 x i16> %a0, <16 x i16> %a1) ; <<16 x i16>> [#uses=1] 705 ret <16 x i16> %res 706} 707declare <16 x i16> @llvm.x86.avx2.phadd.sw(<16 x i16>, <16 x i16>) nounwind readnone 708 709 710define <16 x i16> @test_x86_avx2_phadd_w(<16 x i16> %a0, <16 x i16> %a1) { 711; AVX2-LABEL: test_x86_avx2_phadd_w: 712; AVX2: ## BB#0: 713; AVX2-NEXT: vphaddw %ymm1, %ymm0, %ymm0 714; AVX2-NEXT: retl 715; 716; AVX512VL-LABEL: test_x86_avx2_phadd_w: 717; AVX512VL: ## BB#0: 718; AVX512VL-NEXT: vphaddw %ymm1, %ymm0, %ymm0 719; AVX512VL-NEXT: retl 720 %res = call <16 x i16> @llvm.x86.avx2.phadd.w(<16 x i16> %a0, <16 x i16> %a1) ; <<16 x i16>> [#uses=1] 721 ret <16 x i16> %res 722} 723declare <16 x i16> @llvm.x86.avx2.phadd.w(<16 x i16>, <16 x i16>) nounwind readnone 724 725 726define <8 x i32> @test_x86_avx2_phsub_d(<8 x i32> %a0, <8 x i32> %a1) { 727; AVX2-LABEL: test_x86_avx2_phsub_d: 728; AVX2: ## BB#0: 729; AVX2-NEXT: vphsubd %ymm1, %ymm0, %ymm0 730; AVX2-NEXT: retl 731; 732; AVX512VL-LABEL: test_x86_avx2_phsub_d: 733; AVX512VL: ## BB#0: 734; AVX512VL-NEXT: vphsubd %ymm1, %ymm0, %ymm0 735; AVX512VL-NEXT: retl 736 %res = call <8 x i32> @llvm.x86.avx2.phsub.d(<8 x i32> %a0, <8 x i32> %a1) ; <<8 x i32>> [#uses=1] 737 ret <8 x i32> %res 738} 739declare <8 x i32> @llvm.x86.avx2.phsub.d(<8 x i32>, <8 x i32>) nounwind readnone 740 741 742define <16 x i16> @test_x86_avx2_phsub_sw(<16 x i16> %a0, <16 x i16> %a1) { 743; AVX2-LABEL: test_x86_avx2_phsub_sw: 744; AVX2: ## BB#0: 745; AVX2-NEXT: vphsubsw %ymm1, %ymm0, %ymm0 746; AVX2-NEXT: retl 747; 748; AVX512VL-LABEL: test_x86_avx2_phsub_sw: 749; AVX512VL: ## BB#0: 750; AVX512VL-NEXT: vphsubsw %ymm1, %ymm0, %ymm0 751; AVX512VL-NEXT: retl 752 %res = call <16 x i16> @llvm.x86.avx2.phsub.sw(<16 x i16> %a0, <16 x i16> %a1) ; <<16 x i16>> [#uses=1] 753 ret <16 x i16> %res 754} 755declare <16 x i16> @llvm.x86.avx2.phsub.sw(<16 x i16>, <16 x i16>) nounwind readnone 756 757 758define <16 x i16> @test_x86_avx2_phsub_w(<16 x i16> %a0, <16 x i16> %a1) { 759; AVX2-LABEL: test_x86_avx2_phsub_w: 760; AVX2: ## BB#0: 761; AVX2-NEXT: vphsubw %ymm1, %ymm0, %ymm0 762; AVX2-NEXT: retl 763; 764; AVX512VL-LABEL: test_x86_avx2_phsub_w: 765; AVX512VL: ## BB#0: 766; AVX512VL-NEXT: vphsubw %ymm1, %ymm0, %ymm0 767; AVX512VL-NEXT: retl 768 %res = call <16 x i16> @llvm.x86.avx2.phsub.w(<16 x i16> %a0, <16 x i16> %a1) ; <<16 x i16>> [#uses=1] 769 ret <16 x i16> %res 770} 771declare <16 x i16> @llvm.x86.avx2.phsub.w(<16 x i16>, <16 x i16>) nounwind readnone 772 773 774define <16 x i16> @test_x86_avx2_pmadd_ub_sw(<32 x i8> %a0, <32 x i8> %a1) { 775; AVX2-LABEL: test_x86_avx2_pmadd_ub_sw: 776; AVX2: ## BB#0: 777; AVX2-NEXT: vpmaddubsw %ymm1, %ymm0, %ymm0 778; AVX2-NEXT: retl 779; 780; AVX512VL-LABEL: test_x86_avx2_pmadd_ub_sw: 781; AVX512VL: ## BB#0: 782; AVX512VL-NEXT: vpmaddubsw %ymm1, %ymm0, %ymm0 783; AVX512VL-NEXT: retl 784 %res = call <16 x i16> @llvm.x86.avx2.pmadd.ub.sw(<32 x i8> %a0, <32 x i8> %a1) ; <<16 x i16>> [#uses=1] 785 ret <16 x i16> %res 786} 787declare <16 x i16> @llvm.x86.avx2.pmadd.ub.sw(<32 x i8>, <32 x i8>) nounwind readnone 788 789 790define <16 x i16> @test_x86_avx2_pmul_hr_sw(<16 x i16> %a0, <16 x i16> %a1) { 791; AVX2-LABEL: test_x86_avx2_pmul_hr_sw: 792; AVX2: ## BB#0: 793; AVX2-NEXT: vpmulhrsw %ymm1, %ymm0, %ymm0 794; AVX2-NEXT: retl 795; 796; AVX512VL-LABEL: test_x86_avx2_pmul_hr_sw: 797; AVX512VL: ## BB#0: 798; AVX512VL-NEXT: vpmulhrsw %ymm1, %ymm0, %ymm0 799; AVX512VL-NEXT: retl 800 %res = call <16 x i16> @llvm.x86.avx2.pmul.hr.sw(<16 x i16> %a0, <16 x i16> %a1) ; <<16 x i16>> [#uses=1] 801 ret <16 x i16> %res 802} 803declare <16 x i16> @llvm.x86.avx2.pmul.hr.sw(<16 x i16>, <16 x i16>) nounwind readnone 804 805 806define <32 x i8> @test_x86_avx2_pshuf_b(<32 x i8> %a0, <32 x i8> %a1) { 807; AVX2-LABEL: test_x86_avx2_pshuf_b: 808; AVX2: ## BB#0: 809; AVX2-NEXT: vpshufb %ymm1, %ymm0, %ymm0 810; AVX2-NEXT: retl 811; 812; AVX512VL-LABEL: test_x86_avx2_pshuf_b: 813; AVX512VL: ## BB#0: 814; AVX512VL-NEXT: vpshufb %ymm1, %ymm0, %ymm0 815; AVX512VL-NEXT: retl 816 %res = call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %a0, <32 x i8> %a1) ; <<16 x i8>> [#uses=1] 817 ret <32 x i8> %res 818} 819declare <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8>, <32 x i8>) nounwind readnone 820 821 822define <32 x i8> @test_x86_avx2_psign_b(<32 x i8> %a0, <32 x i8> %a1) { 823; AVX2-LABEL: test_x86_avx2_psign_b: 824; AVX2: ## BB#0: 825; AVX2-NEXT: vpsignb %ymm1, %ymm0, %ymm0 826; AVX2-NEXT: retl 827; 828; AVX512VL-LABEL: test_x86_avx2_psign_b: 829; AVX512VL: ## BB#0: 830; AVX512VL-NEXT: vpsignb %ymm1, %ymm0, %ymm0 831; AVX512VL-NEXT: retl 832 %res = call <32 x i8> @llvm.x86.avx2.psign.b(<32 x i8> %a0, <32 x i8> %a1) ; <<32 x i8>> [#uses=1] 833 ret <32 x i8> %res 834} 835declare <32 x i8> @llvm.x86.avx2.psign.b(<32 x i8>, <32 x i8>) nounwind readnone 836 837 838define <8 x i32> @test_x86_avx2_psign_d(<8 x i32> %a0, <8 x i32> %a1) { 839; AVX2-LABEL: test_x86_avx2_psign_d: 840; AVX2: ## BB#0: 841; AVX2-NEXT: vpsignd %ymm1, %ymm0, %ymm0 842; AVX2-NEXT: retl 843; 844; AVX512VL-LABEL: test_x86_avx2_psign_d: 845; AVX512VL: ## BB#0: 846; AVX512VL-NEXT: vpsignd %ymm1, %ymm0, %ymm0 847; AVX512VL-NEXT: retl 848 %res = call <8 x i32> @llvm.x86.avx2.psign.d(<8 x i32> %a0, <8 x i32> %a1) ; <<4 x i32>> [#uses=1] 849 ret <8 x i32> %res 850} 851declare <8 x i32> @llvm.x86.avx2.psign.d(<8 x i32>, <8 x i32>) nounwind readnone 852 853 854define <16 x i16> @test_x86_avx2_psign_w(<16 x i16> %a0, <16 x i16> %a1) { 855; AVX2-LABEL: test_x86_avx2_psign_w: 856; AVX2: ## BB#0: 857; AVX2-NEXT: vpsignw %ymm1, %ymm0, %ymm0 858; AVX2-NEXT: retl 859; 860; AVX512VL-LABEL: test_x86_avx2_psign_w: 861; AVX512VL: ## BB#0: 862; AVX512VL-NEXT: vpsignw %ymm1, %ymm0, %ymm0 863; AVX512VL-NEXT: retl 864 %res = call <16 x i16> @llvm.x86.avx2.psign.w(<16 x i16> %a0, <16 x i16> %a1) ; <<16 x i16>> [#uses=1] 865 ret <16 x i16> %res 866} 867declare <16 x i16> @llvm.x86.avx2.psign.w(<16 x i16>, <16 x i16>) nounwind readnone 868 869 870define <4 x i64> @test_x86_avx2_movntdqa(i8* %a0) { 871; AVX2-LABEL: test_x86_avx2_movntdqa: 872; AVX2: ## BB#0: 873; AVX2-NEXT: movl {{[0-9]+}}(%esp), %eax 874; AVX2-NEXT: vmovntdqa (%eax), %ymm0 875; AVX2-NEXT: retl 876; 877; AVX512VL-LABEL: test_x86_avx2_movntdqa: 878; AVX512VL: ## BB#0: 879; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax 880; AVX512VL-NEXT: vmovntdqa (%eax), %ymm0 881; AVX512VL-NEXT: retl 882 %res = call <4 x i64> @llvm.x86.avx2.movntdqa(i8* %a0) ; <<4 x i64>> [#uses=1] 883 ret <4 x i64> %res 884} 885declare <4 x i64> @llvm.x86.avx2.movntdqa(i8*) nounwind readonly 886 887 888define <16 x i16> @test_x86_avx2_mpsadbw(<32 x i8> %a0, <32 x i8> %a1) { 889; AVX2-LABEL: test_x86_avx2_mpsadbw: 890; AVX2: ## BB#0: 891; AVX2-NEXT: vmpsadbw $7, %ymm1, %ymm0, %ymm0 892; AVX2-NEXT: retl 893; 894; AVX512VL-LABEL: test_x86_avx2_mpsadbw: 895; AVX512VL: ## BB#0: 896; AVX512VL-NEXT: vmpsadbw $7, %ymm1, %ymm0, %ymm0 897; AVX512VL-NEXT: retl 898 %res = call <16 x i16> @llvm.x86.avx2.mpsadbw(<32 x i8> %a0, <32 x i8> %a1, i8 7) ; <<16 x i16>> [#uses=1] 899 ret <16 x i16> %res 900} 901declare <16 x i16> @llvm.x86.avx2.mpsadbw(<32 x i8>, <32 x i8>, i8) nounwind readnone 902 903 904define <16 x i16> @test_x86_avx2_packusdw(<8 x i32> %a0, <8 x i32> %a1) { 905; AVX2-LABEL: test_x86_avx2_packusdw: 906; AVX2: ## BB#0: 907; AVX2-NEXT: vpackusdw %ymm1, %ymm0, %ymm0 908; AVX2-NEXT: retl 909; 910; AVX512VL-LABEL: test_x86_avx2_packusdw: 911; AVX512VL: ## BB#0: 912; AVX512VL-NEXT: vpackusdw %ymm1, %ymm0, %ymm0 913; AVX512VL-NEXT: retl 914 %res = call <16 x i16> @llvm.x86.avx2.packusdw(<8 x i32> %a0, <8 x i32> %a1) ; <<16 x i16>> [#uses=1] 915 ret <16 x i16> %res 916} 917declare <16 x i16> @llvm.x86.avx2.packusdw(<8 x i32>, <8 x i32>) nounwind readnone 918 919 920define <32 x i8> @test_x86_avx2_pblendvb(<32 x i8> %a0, <32 x i8> %a1, <32 x i8> %a2) { 921; AVX2-LABEL: test_x86_avx2_pblendvb: 922; AVX2: ## BB#0: 923; AVX2-NEXT: vpblendvb %ymm2, %ymm1, %ymm0, %ymm0 924; AVX2-NEXT: retl 925; 926; AVX512VL-LABEL: test_x86_avx2_pblendvb: 927; AVX512VL: ## BB#0: 928; AVX512VL-NEXT: vpblendvb %ymm2, %ymm1, %ymm0, %ymm0 929; AVX512VL-NEXT: retl 930 %res = call <32 x i8> @llvm.x86.avx2.pblendvb(<32 x i8> %a0, <32 x i8> %a1, <32 x i8> %a2) ; <<32 x i8>> [#uses=1] 931 ret <32 x i8> %res 932} 933declare <32 x i8> @llvm.x86.avx2.pblendvb(<32 x i8>, <32 x i8>, <32 x i8>) nounwind readnone 934 935 936define <16 x i16> @test_x86_avx2_pblendw(<16 x i16> %a0, <16 x i16> %a1) { 937; AVX2-LABEL: test_x86_avx2_pblendw: 938; AVX2: ## BB#0: 939; AVX2-NEXT: vpblendw {{.*#+}} ymm0 = ymm1[0,1,2],ymm0[3,4,5,6,7],ymm1[8,9,10],ymm0[11,12,13,14,15] 940; AVX2-NEXT: retl 941; 942; AVX512VL-LABEL: test_x86_avx2_pblendw: 943; AVX512VL: ## BB#0: 944; AVX512VL-NEXT: vpblendw {{.*#+}} ymm0 = ymm1[0,1,2],ymm0[3,4,5,6,7],ymm1[8,9,10],ymm0[11,12,13,14,15] 945; AVX512VL-NEXT: retl 946 %res = call <16 x i16> @llvm.x86.avx2.pblendw(<16 x i16> %a0, <16 x i16> %a1, i8 7) ; <<16 x i16>> [#uses=1] 947 ret <16 x i16> %res 948} 949declare <16 x i16> @llvm.x86.avx2.pblendw(<16 x i16>, <16 x i16>, i8) nounwind readnone 950 951 952define <32 x i8> @test_x86_avx2_pmaxsb(<32 x i8> %a0, <32 x i8> %a1) { 953; AVX2-LABEL: test_x86_avx2_pmaxsb: 954; AVX2: ## BB#0: 955; AVX2-NEXT: vpmaxsb %ymm1, %ymm0, %ymm0 956; AVX2-NEXT: retl 957; 958; AVX512VL-LABEL: test_x86_avx2_pmaxsb: 959; AVX512VL: ## BB#0: 960; AVX512VL-NEXT: vpmaxsb %ymm1, %ymm0, %ymm0 961; AVX512VL-NEXT: retl 962 %res = call <32 x i8> @llvm.x86.avx2.pmaxs.b(<32 x i8> %a0, <32 x i8> %a1) ; <<32 x i8>> [#uses=1] 963 ret <32 x i8> %res 964} 965declare <32 x i8> @llvm.x86.avx2.pmaxs.b(<32 x i8>, <32 x i8>) nounwind readnone 966 967 968define <8 x i32> @test_x86_avx2_pmaxsd(<8 x i32> %a0, <8 x i32> %a1) { 969; AVX2-LABEL: test_x86_avx2_pmaxsd: 970; AVX2: ## BB#0: 971; AVX2-NEXT: vpmaxsd %ymm1, %ymm0, %ymm0 972; AVX2-NEXT: retl 973; 974; AVX512VL-LABEL: test_x86_avx2_pmaxsd: 975; AVX512VL: ## BB#0: 976; AVX512VL-NEXT: vpmaxsd %ymm1, %ymm0, %ymm0 977; AVX512VL-NEXT: retl 978 %res = call <8 x i32> @llvm.x86.avx2.pmaxs.d(<8 x i32> %a0, <8 x i32> %a1) ; <<8 x i32>> [#uses=1] 979 ret <8 x i32> %res 980} 981declare <8 x i32> @llvm.x86.avx2.pmaxs.d(<8 x i32>, <8 x i32>) nounwind readnone 982 983 984define <8 x i32> @test_x86_avx2_pmaxud(<8 x i32> %a0, <8 x i32> %a1) { 985; AVX2-LABEL: test_x86_avx2_pmaxud: 986; AVX2: ## BB#0: 987; AVX2-NEXT: vpmaxud %ymm1, %ymm0, %ymm0 988; AVX2-NEXT: retl 989; 990; AVX512VL-LABEL: test_x86_avx2_pmaxud: 991; AVX512VL: ## BB#0: 992; AVX512VL-NEXT: vpmaxud %ymm1, %ymm0, %ymm0 993; AVX512VL-NEXT: retl 994 %res = call <8 x i32> @llvm.x86.avx2.pmaxu.d(<8 x i32> %a0, <8 x i32> %a1) ; <<8 x i32>> [#uses=1] 995 ret <8 x i32> %res 996} 997declare <8 x i32> @llvm.x86.avx2.pmaxu.d(<8 x i32>, <8 x i32>) nounwind readnone 998 999 1000define <16 x i16> @test_x86_avx2_pmaxuw(<16 x i16> %a0, <16 x i16> %a1) { 1001; AVX2-LABEL: test_x86_avx2_pmaxuw: 1002; AVX2: ## BB#0: 1003; AVX2-NEXT: vpmaxuw %ymm1, %ymm0, %ymm0 1004; AVX2-NEXT: retl 1005; 1006; AVX512VL-LABEL: test_x86_avx2_pmaxuw: 1007; AVX512VL: ## BB#0: 1008; AVX512VL-NEXT: vpmaxuw %ymm1, %ymm0, %ymm0 1009; AVX512VL-NEXT: retl 1010 %res = call <16 x i16> @llvm.x86.avx2.pmaxu.w(<16 x i16> %a0, <16 x i16> %a1) ; <<16 x i16>> [#uses=1] 1011 ret <16 x i16> %res 1012} 1013declare <16 x i16> @llvm.x86.avx2.pmaxu.w(<16 x i16>, <16 x i16>) nounwind readnone 1014 1015 1016define <32 x i8> @test_x86_avx2_pminsb(<32 x i8> %a0, <32 x i8> %a1) { 1017; AVX2-LABEL: test_x86_avx2_pminsb: 1018; AVX2: ## BB#0: 1019; AVX2-NEXT: vpminsb %ymm1, %ymm0, %ymm0 1020; AVX2-NEXT: retl 1021; 1022; AVX512VL-LABEL: test_x86_avx2_pminsb: 1023; AVX512VL: ## BB#0: 1024; AVX512VL-NEXT: vpminsb %ymm1, %ymm0, %ymm0 1025; AVX512VL-NEXT: retl 1026 %res = call <32 x i8> @llvm.x86.avx2.pmins.b(<32 x i8> %a0, <32 x i8> %a1) ; <<32 x i8>> [#uses=1] 1027 ret <32 x i8> %res 1028} 1029declare <32 x i8> @llvm.x86.avx2.pmins.b(<32 x i8>, <32 x i8>) nounwind readnone 1030 1031 1032define <8 x i32> @test_x86_avx2_pminsd(<8 x i32> %a0, <8 x i32> %a1) { 1033; AVX2-LABEL: test_x86_avx2_pminsd: 1034; AVX2: ## BB#0: 1035; AVX2-NEXT: vpminsd %ymm1, %ymm0, %ymm0 1036; AVX2-NEXT: retl 1037; 1038; AVX512VL-LABEL: test_x86_avx2_pminsd: 1039; AVX512VL: ## BB#0: 1040; AVX512VL-NEXT: vpminsd %ymm1, %ymm0, %ymm0 1041; AVX512VL-NEXT: retl 1042 %res = call <8 x i32> @llvm.x86.avx2.pmins.d(<8 x i32> %a0, <8 x i32> %a1) ; <<8 x i32>> [#uses=1] 1043 ret <8 x i32> %res 1044} 1045declare <8 x i32> @llvm.x86.avx2.pmins.d(<8 x i32>, <8 x i32>) nounwind readnone 1046 1047 1048define <8 x i32> @test_x86_avx2_pminud(<8 x i32> %a0, <8 x i32> %a1) { 1049; AVX2-LABEL: test_x86_avx2_pminud: 1050; AVX2: ## BB#0: 1051; AVX2-NEXT: vpminud %ymm1, %ymm0, %ymm0 1052; AVX2-NEXT: retl 1053; 1054; AVX512VL-LABEL: test_x86_avx2_pminud: 1055; AVX512VL: ## BB#0: 1056; AVX512VL-NEXT: vpminud %ymm1, %ymm0, %ymm0 1057; AVX512VL-NEXT: retl 1058 %res = call <8 x i32> @llvm.x86.avx2.pminu.d(<8 x i32> %a0, <8 x i32> %a1) ; <<8 x i32>> [#uses=1] 1059 ret <8 x i32> %res 1060} 1061declare <8 x i32> @llvm.x86.avx2.pminu.d(<8 x i32>, <8 x i32>) nounwind readnone 1062 1063 1064define <16 x i16> @test_x86_avx2_pminuw(<16 x i16> %a0, <16 x i16> %a1) { 1065; AVX2-LABEL: test_x86_avx2_pminuw: 1066; AVX2: ## BB#0: 1067; AVX2-NEXT: vpminuw %ymm1, %ymm0, %ymm0 1068; AVX2-NEXT: retl 1069; 1070; AVX512VL-LABEL: test_x86_avx2_pminuw: 1071; AVX512VL: ## BB#0: 1072; AVX512VL-NEXT: vpminuw %ymm1, %ymm0, %ymm0 1073; AVX512VL-NEXT: retl 1074 %res = call <16 x i16> @llvm.x86.avx2.pminu.w(<16 x i16> %a0, <16 x i16> %a1) ; <<16 x i16>> [#uses=1] 1075 ret <16 x i16> %res 1076} 1077declare <16 x i16> @llvm.x86.avx2.pminu.w(<16 x i16>, <16 x i16>) nounwind readnone 1078 1079 1080define <4 x i64> @test_x86_avx2_pmul.dq(<8 x i32> %a0, <8 x i32> %a1) { 1081 %res = call <4 x i64> @llvm.x86.avx2.pmul.dq(<8 x i32> %a0, <8 x i32> %a1) ; <<2 x i64>> [#uses=1] 1082 ret <4 x i64> %res 1083} 1084declare <4 x i64> @llvm.x86.avx2.pmul.dq(<8 x i32>, <8 x i32>) nounwind readnone 1085 1086 1087define <4 x i32> @test_x86_avx2_pblendd_128(<4 x i32> %a0, <4 x i32> %a1) { 1088; AVX2-LABEL: test_x86_avx2_pblendd_128: 1089; AVX2: ## BB#0: 1090; AVX2-NEXT: vpblendd {{.*#+}} xmm0 = xmm1[0,1,2],xmm0[3] 1091; AVX2-NEXT: retl 1092; 1093; AVX512VL-LABEL: test_x86_avx2_pblendd_128: 1094; AVX512VL: ## BB#0: 1095; AVX512VL-NEXT: vpblendd {{.*#+}} xmm0 = xmm1[0,1,2],xmm0[3] 1096; AVX512VL-NEXT: retl 1097 %res = call <4 x i32> @llvm.x86.avx2.pblendd.128(<4 x i32> %a0, <4 x i32> %a1, i8 7) ; <<4 x i32>> [#uses=1] 1098 ret <4 x i32> %res 1099} 1100declare <4 x i32> @llvm.x86.avx2.pblendd.128(<4 x i32>, <4 x i32>, i8) nounwind readnone 1101 1102 1103define <8 x i32> @test_x86_avx2_pblendd_256(<8 x i32> %a0, <8 x i32> %a1) { 1104; AVX2-LABEL: test_x86_avx2_pblendd_256: 1105; AVX2: ## BB#0: 1106; AVX2-NEXT: vpblendd {{.*#+}} ymm0 = ymm1[0,1,2],ymm0[3,4,5,6,7] 1107; AVX2-NEXT: retl 1108; 1109; AVX512VL-LABEL: test_x86_avx2_pblendd_256: 1110; AVX512VL: ## BB#0: 1111; AVX512VL-NEXT: vpblendd {{.*#+}} ymm0 = ymm1[0,1,2],ymm0[3,4,5,6,7] 1112; AVX512VL-NEXT: retl 1113 %res = call <8 x i32> @llvm.x86.avx2.pblendd.256(<8 x i32> %a0, <8 x i32> %a1, i8 7) ; <<8 x i32>> [#uses=1] 1114 ret <8 x i32> %res 1115} 1116declare <8 x i32> @llvm.x86.avx2.pblendd.256(<8 x i32>, <8 x i32>, i8) nounwind readnone 1117 1118 1119; Check that the arguments are swapped between the intrinsic definition 1120; and its lowering. Indeed, the offsets are the first source in 1121; the instruction. 1122define <8 x i32> @test_x86_avx2_permd(<8 x i32> %a0, <8 x i32> %a1) { 1123; AVX2-LABEL: test_x86_avx2_permd: 1124; AVX2: ## BB#0: 1125; AVX2-NEXT: vpermd %ymm0, %ymm1, %ymm0 1126; AVX2-NEXT: retl 1127; 1128; AVX512VL-LABEL: test_x86_avx2_permd: 1129; AVX512VL: ## BB#0: 1130; AVX512VL-NEXT: vpermd %ymm0, %ymm1, %ymm0 1131; AVX512VL-NEXT: retl 1132 %res = call <8 x i32> @llvm.x86.avx2.permd(<8 x i32> %a0, <8 x i32> %a1) ; <<8 x i32>> [#uses=1] 1133 ret <8 x i32> %res 1134} 1135declare <8 x i32> @llvm.x86.avx2.permd(<8 x i32>, <8 x i32>) nounwind readonly 1136 1137 1138; Check that the arguments are swapped between the intrinsic definition 1139; and its lowering. Indeed, the offsets are the first source in 1140; the instruction. 1141define <8 x float> @test_x86_avx2_permps(<8 x float> %a0, <8 x i32> %a1) { 1142; AVX2-LABEL: test_x86_avx2_permps: 1143; AVX2: ## BB#0: 1144; AVX2-NEXT: vpermps %ymm0, %ymm1, %ymm0 1145; AVX2-NEXT: retl 1146; 1147; AVX512VL-LABEL: test_x86_avx2_permps: 1148; AVX512VL: ## BB#0: 1149; AVX512VL-NEXT: vpermps %ymm0, %ymm1, %ymm0 1150; AVX512VL-NEXT: retl 1151 %res = call <8 x float> @llvm.x86.avx2.permps(<8 x float> %a0, <8 x i32> %a1) ; <<8 x float>> [#uses=1] 1152 ret <8 x float> %res 1153} 1154declare <8 x float> @llvm.x86.avx2.permps(<8 x float>, <8 x i32>) nounwind readonly 1155 1156 1157define <4 x i64> @test_x86_avx2_vperm2i128(<4 x i64> %a0, <4 x i64> %a1) { 1158; AVX2-LABEL: test_x86_avx2_vperm2i128: 1159; AVX2: ## BB#0: 1160; AVX2-NEXT: vperm2f128 {{.*#+}} ymm0 = ymm0[2,3,0,1] 1161; AVX2-NEXT: retl 1162; 1163; AVX512VL-LABEL: test_x86_avx2_vperm2i128: 1164; AVX512VL: ## BB#0: 1165; AVX512VL-NEXT: vperm2f128 {{.*#+}} ymm0 = ymm0[2,3,0,1] 1166; AVX512VL-NEXT: retl 1167 %res = call <4 x i64> @llvm.x86.avx2.vperm2i128(<4 x i64> %a0, <4 x i64> %a1, i8 1) ; <<4 x i64>> [#uses=1] 1168 ret <4 x i64> %res 1169} 1170declare <4 x i64> @llvm.x86.avx2.vperm2i128(<4 x i64>, <4 x i64>, i8) nounwind readonly 1171 1172 1173define <2 x i64> @test_x86_avx2_maskload_q(i8* %a0, <2 x i64> %a1) { 1174; AVX2-LABEL: test_x86_avx2_maskload_q: 1175; AVX2: ## BB#0: 1176; AVX2-NEXT: movl {{[0-9]+}}(%esp), %eax 1177; AVX2-NEXT: vpmaskmovq (%eax), %xmm0, %xmm0 1178; AVX2-NEXT: retl 1179; 1180; AVX512VL-LABEL: test_x86_avx2_maskload_q: 1181; AVX512VL: ## BB#0: 1182; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax 1183; AVX512VL-NEXT: vpmaskmovq (%eax), %xmm0, %xmm0 1184; AVX512VL-NEXT: retl 1185 %res = call <2 x i64> @llvm.x86.avx2.maskload.q(i8* %a0, <2 x i64> %a1) ; <<2 x i64>> [#uses=1] 1186 ret <2 x i64> %res 1187} 1188declare <2 x i64> @llvm.x86.avx2.maskload.q(i8*, <2 x i64>) nounwind readonly 1189 1190 1191define <4 x i64> @test_x86_avx2_maskload_q_256(i8* %a0, <4 x i64> %a1) { 1192; AVX2-LABEL: test_x86_avx2_maskload_q_256: 1193; AVX2: ## BB#0: 1194; AVX2-NEXT: movl {{[0-9]+}}(%esp), %eax 1195; AVX2-NEXT: vpmaskmovq (%eax), %ymm0, %ymm0 1196; AVX2-NEXT: retl 1197; 1198; AVX512VL-LABEL: test_x86_avx2_maskload_q_256: 1199; AVX512VL: ## BB#0: 1200; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax 1201; AVX512VL-NEXT: vpmaskmovq (%eax), %ymm0, %ymm0 1202; AVX512VL-NEXT: retl 1203 %res = call <4 x i64> @llvm.x86.avx2.maskload.q.256(i8* %a0, <4 x i64> %a1) ; <<4 x i64>> [#uses=1] 1204 ret <4 x i64> %res 1205} 1206declare <4 x i64> @llvm.x86.avx2.maskload.q.256(i8*, <4 x i64>) nounwind readonly 1207 1208 1209define <4 x i32> @test_x86_avx2_maskload_d(i8* %a0, <4 x i32> %a1) { 1210; AVX2-LABEL: test_x86_avx2_maskload_d: 1211; AVX2: ## BB#0: 1212; AVX2-NEXT: movl {{[0-9]+}}(%esp), %eax 1213; AVX2-NEXT: vpmaskmovd (%eax), %xmm0, %xmm0 1214; AVX2-NEXT: retl 1215; 1216; AVX512VL-LABEL: test_x86_avx2_maskload_d: 1217; AVX512VL: ## BB#0: 1218; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax 1219; AVX512VL-NEXT: vpmaskmovd (%eax), %xmm0, %xmm0 1220; AVX512VL-NEXT: retl 1221 %res = call <4 x i32> @llvm.x86.avx2.maskload.d(i8* %a0, <4 x i32> %a1) ; <<4 x i32>> [#uses=1] 1222 ret <4 x i32> %res 1223} 1224declare <4 x i32> @llvm.x86.avx2.maskload.d(i8*, <4 x i32>) nounwind readonly 1225 1226 1227define <8 x i32> @test_x86_avx2_maskload_d_256(i8* %a0, <8 x i32> %a1) { 1228; AVX2-LABEL: test_x86_avx2_maskload_d_256: 1229; AVX2: ## BB#0: 1230; AVX2-NEXT: movl {{[0-9]+}}(%esp), %eax 1231; AVX2-NEXT: vpmaskmovd (%eax), %ymm0, %ymm0 1232; AVX2-NEXT: retl 1233; 1234; AVX512VL-LABEL: test_x86_avx2_maskload_d_256: 1235; AVX512VL: ## BB#0: 1236; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax 1237; AVX512VL-NEXT: vpmaskmovd (%eax), %ymm0, %ymm0 1238; AVX512VL-NEXT: retl 1239 %res = call <8 x i32> @llvm.x86.avx2.maskload.d.256(i8* %a0, <8 x i32> %a1) ; <<8 x i32>> [#uses=1] 1240 ret <8 x i32> %res 1241} 1242declare <8 x i32> @llvm.x86.avx2.maskload.d.256(i8*, <8 x i32>) nounwind readonly 1243 1244 1245define void @test_x86_avx2_maskstore_q(i8* %a0, <2 x i64> %a1, <2 x i64> %a2) { 1246; AVX2-LABEL: test_x86_avx2_maskstore_q: 1247; AVX2: ## BB#0: 1248; AVX2-NEXT: movl {{[0-9]+}}(%esp), %eax 1249; AVX2-NEXT: vpmaskmovq %xmm1, %xmm0, (%eax) 1250; AVX2-NEXT: retl 1251; 1252; AVX512VL-LABEL: test_x86_avx2_maskstore_q: 1253; AVX512VL: ## BB#0: 1254; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax 1255; AVX512VL-NEXT: vpmaskmovq %xmm1, %xmm0, (%eax) 1256; AVX512VL-NEXT: retl 1257 call void @llvm.x86.avx2.maskstore.q(i8* %a0, <2 x i64> %a1, <2 x i64> %a2) 1258 ret void 1259} 1260declare void @llvm.x86.avx2.maskstore.q(i8*, <2 x i64>, <2 x i64>) nounwind 1261 1262 1263define void @test_x86_avx2_maskstore_q_256(i8* %a0, <4 x i64> %a1, <4 x i64> %a2) { 1264; AVX2-LABEL: test_x86_avx2_maskstore_q_256: 1265; AVX2: ## BB#0: 1266; AVX2-NEXT: movl {{[0-9]+}}(%esp), %eax 1267; AVX2-NEXT: vpmaskmovq %ymm1, %ymm0, (%eax) 1268; AVX2-NEXT: vzeroupper 1269; AVX2-NEXT: retl 1270; 1271; AVX512VL-LABEL: test_x86_avx2_maskstore_q_256: 1272; AVX512VL: ## BB#0: 1273; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax 1274; AVX512VL-NEXT: vpmaskmovq %ymm1, %ymm0, (%eax) 1275; AVX512VL-NEXT: retl 1276 call void @llvm.x86.avx2.maskstore.q.256(i8* %a0, <4 x i64> %a1, <4 x i64> %a2) 1277 ret void 1278} 1279declare void @llvm.x86.avx2.maskstore.q.256(i8*, <4 x i64>, <4 x i64>) nounwind 1280 1281 1282define void @test_x86_avx2_maskstore_d(i8* %a0, <4 x i32> %a1, <4 x i32> %a2) { 1283; AVX2-LABEL: test_x86_avx2_maskstore_d: 1284; AVX2: ## BB#0: 1285; AVX2-NEXT: movl {{[0-9]+}}(%esp), %eax 1286; AVX2-NEXT: vpmaskmovd %xmm1, %xmm0, (%eax) 1287; AVX2-NEXT: retl 1288; 1289; AVX512VL-LABEL: test_x86_avx2_maskstore_d: 1290; AVX512VL: ## BB#0: 1291; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax 1292; AVX512VL-NEXT: vpmaskmovd %xmm1, %xmm0, (%eax) 1293; AVX512VL-NEXT: retl 1294 call void @llvm.x86.avx2.maskstore.d(i8* %a0, <4 x i32> %a1, <4 x i32> %a2) 1295 ret void 1296} 1297declare void @llvm.x86.avx2.maskstore.d(i8*, <4 x i32>, <4 x i32>) nounwind 1298 1299 1300define void @test_x86_avx2_maskstore_d_256(i8* %a0, <8 x i32> %a1, <8 x i32> %a2) { 1301; AVX2-LABEL: test_x86_avx2_maskstore_d_256: 1302; AVX2: ## BB#0: 1303; AVX2-NEXT: movl {{[0-9]+}}(%esp), %eax 1304; AVX2-NEXT: vpmaskmovd %ymm1, %ymm0, (%eax) 1305; AVX2-NEXT: vzeroupper 1306; AVX2-NEXT: retl 1307; 1308; AVX512VL-LABEL: test_x86_avx2_maskstore_d_256: 1309; AVX512VL: ## BB#0: 1310; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax 1311; AVX512VL-NEXT: vpmaskmovd %ymm1, %ymm0, (%eax) 1312; AVX512VL-NEXT: retl 1313 call void @llvm.x86.avx2.maskstore.d.256(i8* %a0, <8 x i32> %a1, <8 x i32> %a2) 1314 ret void 1315} 1316declare void @llvm.x86.avx2.maskstore.d.256(i8*, <8 x i32>, <8 x i32>) nounwind 1317 1318 1319define <4 x i32> @test_x86_avx2_psllv_d(<4 x i32> %a0, <4 x i32> %a1) { 1320; AVX2-LABEL: test_x86_avx2_psllv_d: 1321; AVX2: ## BB#0: 1322; AVX2-NEXT: vpsllvd %xmm1, %xmm0, %xmm0 1323; AVX2-NEXT: retl 1324; 1325; AVX512VL-LABEL: test_x86_avx2_psllv_d: 1326; AVX512VL: ## BB#0: 1327; AVX512VL-NEXT: vpsllvd %xmm1, %xmm0, %xmm0 1328; AVX512VL-NEXT: retl 1329 %res = call <4 x i32> @llvm.x86.avx2.psllv.d(<4 x i32> %a0, <4 x i32> %a1) ; <<4 x i32>> [#uses=1] 1330 ret <4 x i32> %res 1331} 1332declare <4 x i32> @llvm.x86.avx2.psllv.d(<4 x i32>, <4 x i32>) nounwind readnone 1333 1334 1335define <8 x i32> @test_x86_avx2_psllv_d_256(<8 x i32> %a0, <8 x i32> %a1) { 1336; AVX2-LABEL: test_x86_avx2_psllv_d_256: 1337; AVX2: ## BB#0: 1338; AVX2-NEXT: vpsllvd %ymm1, %ymm0, %ymm0 1339; AVX2-NEXT: retl 1340; 1341; AVX512VL-LABEL: test_x86_avx2_psllv_d_256: 1342; AVX512VL: ## BB#0: 1343; AVX512VL-NEXT: vpsllvd %ymm1, %ymm0, %ymm0 1344; AVX512VL-NEXT: retl 1345 %res = call <8 x i32> @llvm.x86.avx2.psllv.d.256(<8 x i32> %a0, <8 x i32> %a1) ; <<8 x i32>> [#uses=1] 1346 ret <8 x i32> %res 1347} 1348declare <8 x i32> @llvm.x86.avx2.psllv.d.256(<8 x i32>, <8 x i32>) nounwind readnone 1349 1350 1351define <2 x i64> @test_x86_avx2_psllv_q(<2 x i64> %a0, <2 x i64> %a1) { 1352; AVX2-LABEL: test_x86_avx2_psllv_q: 1353; AVX2: ## BB#0: 1354; AVX2-NEXT: vpsllvq %xmm1, %xmm0, %xmm0 1355; AVX2-NEXT: retl 1356; 1357; AVX512VL-LABEL: test_x86_avx2_psllv_q: 1358; AVX512VL: ## BB#0: 1359; AVX512VL-NEXT: vpsllvq %xmm1, %xmm0, %xmm0 1360; AVX512VL-NEXT: retl 1361 %res = call <2 x i64> @llvm.x86.avx2.psllv.q(<2 x i64> %a0, <2 x i64> %a1) ; <<2 x i64>> [#uses=1] 1362 ret <2 x i64> %res 1363} 1364declare <2 x i64> @llvm.x86.avx2.psllv.q(<2 x i64>, <2 x i64>) nounwind readnone 1365 1366 1367define <4 x i64> @test_x86_avx2_psllv_q_256(<4 x i64> %a0, <4 x i64> %a1) { 1368; AVX2-LABEL: test_x86_avx2_psllv_q_256: 1369; AVX2: ## BB#0: 1370; AVX2-NEXT: vpsllvq %ymm1, %ymm0, %ymm0 1371; AVX2-NEXT: retl 1372; 1373; AVX512VL-LABEL: test_x86_avx2_psllv_q_256: 1374; AVX512VL: ## BB#0: 1375; AVX512VL-NEXT: vpsllvq %ymm1, %ymm0, %ymm0 1376; AVX512VL-NEXT: retl 1377 %res = call <4 x i64> @llvm.x86.avx2.psllv.q.256(<4 x i64> %a0, <4 x i64> %a1) ; <<4 x i64>> [#uses=1] 1378 ret <4 x i64> %res 1379} 1380declare <4 x i64> @llvm.x86.avx2.psllv.q.256(<4 x i64>, <4 x i64>) nounwind readnone 1381 1382 1383define <4 x i32> @test_x86_avx2_psrlv_d(<4 x i32> %a0, <4 x i32> %a1) { 1384; AVX2-LABEL: test_x86_avx2_psrlv_d: 1385; AVX2: ## BB#0: 1386; AVX2-NEXT: vpsrlvd %xmm1, %xmm0, %xmm0 1387; AVX2-NEXT: retl 1388; 1389; AVX512VL-LABEL: test_x86_avx2_psrlv_d: 1390; AVX512VL: ## BB#0: 1391; AVX512VL-NEXT: vpsrlvd %xmm1, %xmm0, %xmm0 1392; AVX512VL-NEXT: retl 1393 %res = call <4 x i32> @llvm.x86.avx2.psrlv.d(<4 x i32> %a0, <4 x i32> %a1) ; <<4 x i32>> [#uses=1] 1394 ret <4 x i32> %res 1395} 1396declare <4 x i32> @llvm.x86.avx2.psrlv.d(<4 x i32>, <4 x i32>) nounwind readnone 1397 1398 1399define <8 x i32> @test_x86_avx2_psrlv_d_256(<8 x i32> %a0, <8 x i32> %a1) { 1400; AVX2-LABEL: test_x86_avx2_psrlv_d_256: 1401; AVX2: ## BB#0: 1402; AVX2-NEXT: vpsrlvd %ymm1, %ymm0, %ymm0 1403; AVX2-NEXT: retl 1404; 1405; AVX512VL-LABEL: test_x86_avx2_psrlv_d_256: 1406; AVX512VL: ## BB#0: 1407; AVX512VL-NEXT: vpsrlvd %ymm1, %ymm0, %ymm0 1408; AVX512VL-NEXT: retl 1409 %res = call <8 x i32> @llvm.x86.avx2.psrlv.d.256(<8 x i32> %a0, <8 x i32> %a1) ; <<8 x i32>> [#uses=1] 1410 ret <8 x i32> %res 1411} 1412declare <8 x i32> @llvm.x86.avx2.psrlv.d.256(<8 x i32>, <8 x i32>) nounwind readnone 1413 1414 1415define <2 x i64> @test_x86_avx2_psrlv_q(<2 x i64> %a0, <2 x i64> %a1) { 1416; AVX2-LABEL: test_x86_avx2_psrlv_q: 1417; AVX2: ## BB#0: 1418; AVX2-NEXT: vpsrlvq %xmm1, %xmm0, %xmm0 1419; AVX2-NEXT: retl 1420; 1421; AVX512VL-LABEL: test_x86_avx2_psrlv_q: 1422; AVX512VL: ## BB#0: 1423; AVX512VL-NEXT: vpsrlvq %xmm1, %xmm0, %xmm0 1424; AVX512VL-NEXT: retl 1425 %res = call <2 x i64> @llvm.x86.avx2.psrlv.q(<2 x i64> %a0, <2 x i64> %a1) ; <<2 x i64>> [#uses=1] 1426 ret <2 x i64> %res 1427} 1428declare <2 x i64> @llvm.x86.avx2.psrlv.q(<2 x i64>, <2 x i64>) nounwind readnone 1429 1430 1431define <4 x i64> @test_x86_avx2_psrlv_q_256(<4 x i64> %a0, <4 x i64> %a1) { 1432; AVX2-LABEL: test_x86_avx2_psrlv_q_256: 1433; AVX2: ## BB#0: 1434; AVX2-NEXT: vpsrlvq %ymm1, %ymm0, %ymm0 1435; AVX2-NEXT: retl 1436; 1437; AVX512VL-LABEL: test_x86_avx2_psrlv_q_256: 1438; AVX512VL: ## BB#0: 1439; AVX512VL-NEXT: vpsrlvq %ymm1, %ymm0, %ymm0 1440; AVX512VL-NEXT: retl 1441 %res = call <4 x i64> @llvm.x86.avx2.psrlv.q.256(<4 x i64> %a0, <4 x i64> %a1) ; <<4 x i64>> [#uses=1] 1442 ret <4 x i64> %res 1443} 1444declare <4 x i64> @llvm.x86.avx2.psrlv.q.256(<4 x i64>, <4 x i64>) nounwind readnone 1445 1446 1447define <4 x i32> @test_x86_avx2_psrav_d(<4 x i32> %a0, <4 x i32> %a1) { 1448; AVX2-LABEL: test_x86_avx2_psrav_d: 1449; AVX2: ## BB#0: 1450; AVX2-NEXT: vpsravd %xmm1, %xmm0, %xmm0 1451; AVX2-NEXT: retl 1452; 1453; AVX512VL-LABEL: test_x86_avx2_psrav_d: 1454; AVX512VL: ## BB#0: 1455; AVX512VL-NEXT: vpsravd %xmm1, %xmm0, %xmm0 1456; AVX512VL-NEXT: retl 1457 %res = call <4 x i32> @llvm.x86.avx2.psrav.d(<4 x i32> %a0, <4 x i32> %a1) ; <<4 x i32>> [#uses=1] 1458 ret <4 x i32> %res 1459} 1460 1461define <4 x i32> @test_x86_avx2_psrav_d_const(<4 x i32> %a0, <4 x i32> %a1) { 1462; AVX2-LABEL: test_x86_avx2_psrav_d_const: 1463; AVX2: ## BB#0: 1464; AVX2-NEXT: vmovdqa {{.*#+}} xmm0 = [2,9,4294967284,23] 1465; AVX2-NEXT: vpsravd LCPI90_1, %xmm0, %xmm0 1466; AVX2-NEXT: retl 1467; 1468; AVX512VL-LABEL: test_x86_avx2_psrav_d_const: 1469; AVX512VL: ## BB#0: 1470; AVX512VL-NEXT: vmovdqa32 {{.*#+}} xmm0 = [2,9,4294967284,23] 1471; AVX512VL-NEXT: vpsravd LCPI90_1, %xmm0, %xmm0 1472; AVX512VL-NEXT: retl 1473 %res = call <4 x i32> @llvm.x86.avx2.psrav.d(<4 x i32> <i32 2, i32 9, i32 -12, i32 23>, <4 x i32> <i32 1, i32 18, i32 35, i32 52>) 1474 ret <4 x i32> %res 1475} 1476declare <4 x i32> @llvm.x86.avx2.psrav.d(<4 x i32>, <4 x i32>) nounwind readnone 1477 1478define <8 x i32> @test_x86_avx2_psrav_d_256(<8 x i32> %a0, <8 x i32> %a1) { 1479; AVX2-LABEL: test_x86_avx2_psrav_d_256: 1480; AVX2: ## BB#0: 1481; AVX2-NEXT: vpsravd %ymm1, %ymm0, %ymm0 1482; AVX2-NEXT: retl 1483; 1484; AVX512VL-LABEL: test_x86_avx2_psrav_d_256: 1485; AVX512VL: ## BB#0: 1486; AVX512VL-NEXT: vpsravd %ymm1, %ymm0, %ymm0 1487; AVX512VL-NEXT: retl 1488 %res = call <8 x i32> @llvm.x86.avx2.psrav.d.256(<8 x i32> %a0, <8 x i32> %a1) ; <<8 x i32>> [#uses=1] 1489 ret <8 x i32> %res 1490} 1491 1492define <8 x i32> @test_x86_avx2_psrav_d_256_const(<8 x i32> %a0, <8 x i32> %a1) { 1493; AVX2-LABEL: test_x86_avx2_psrav_d_256_const: 1494; AVX2: ## BB#0: 1495; AVX2-NEXT: vmovdqa {{.*#+}} ymm0 = [2,9,4294967284,23,4294967270,37,4294967256,51] 1496; AVX2-NEXT: vpsravd LCPI92_1, %ymm0, %ymm0 1497; AVX2-NEXT: retl 1498; 1499; AVX512VL-LABEL: test_x86_avx2_psrav_d_256_const: 1500; AVX512VL: ## BB#0: 1501; AVX512VL-NEXT: vmovdqa32 {{.*#+}} ymm0 = [2,9,4294967284,23,4294967270,37,4294967256,51] 1502; AVX512VL-NEXT: vpsravd LCPI92_1, %ymm0, %ymm0 1503; AVX512VL-NEXT: retl 1504 %res = call <8 x i32> @llvm.x86.avx2.psrav.d.256(<8 x i32> <i32 2, i32 9, i32 -12, i32 23, i32 -26, i32 37, i32 -40, i32 51>, <8 x i32> <i32 1, i32 18, i32 35, i32 52, i32 69, i32 15, i32 32, i32 49>) 1505 ret <8 x i32> %res 1506} 1507declare <8 x i32> @llvm.x86.avx2.psrav.d.256(<8 x i32>, <8 x i32>) nounwind readnone 1508 1509define <2 x double> @test_x86_avx2_gather_d_pd(<2 x double> %a0, i8* %a1, <4 x i32> %idx, <2 x double> %mask) { 1510; AVX2-LABEL: test_x86_avx2_gather_d_pd: 1511; AVX2: ## BB#0: 1512; AVX2-NEXT: movl {{[0-9]+}}(%esp), %eax 1513; AVX2-NEXT: vgatherdpd %xmm2, (%eax,%xmm1,2), %xmm0 1514; AVX2-NEXT: retl 1515; 1516; AVX512VL-LABEL: test_x86_avx2_gather_d_pd: 1517; AVX512VL: ## BB#0: 1518; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax 1519; AVX512VL-NEXT: vgatherdpd %xmm2, (%eax,%xmm1,2), %xmm0 1520; AVX512VL-NEXT: retl 1521 %res = call <2 x double> @llvm.x86.avx2.gather.d.pd(<2 x double> %a0, 1522 i8* %a1, <4 x i32> %idx, <2 x double> %mask, i8 2) ; 1523 ret <2 x double> %res 1524} 1525declare <2 x double> @llvm.x86.avx2.gather.d.pd(<2 x double>, i8*, 1526 <4 x i32>, <2 x double>, i8) nounwind readonly 1527 1528define <4 x double> @test_x86_avx2_gather_d_pd_256(<4 x double> %a0, i8* %a1, <4 x i32> %idx, <4 x double> %mask) { 1529; AVX2-LABEL: test_x86_avx2_gather_d_pd_256: 1530; AVX2: ## BB#0: 1531; AVX2-NEXT: movl {{[0-9]+}}(%esp), %eax 1532; AVX2-NEXT: vgatherdpd %ymm2, (%eax,%xmm1,2), %ymm0 1533; AVX2-NEXT: retl 1534; 1535; AVX512VL-LABEL: test_x86_avx2_gather_d_pd_256: 1536; AVX512VL: ## BB#0: 1537; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax 1538; AVX512VL-NEXT: vgatherdpd %ymm2, (%eax,%xmm1,2), %ymm0 1539; AVX512VL-NEXT: retl 1540 %res = call <4 x double> @llvm.x86.avx2.gather.d.pd.256(<4 x double> %a0, 1541 i8* %a1, <4 x i32> %idx, <4 x double> %mask, i8 2) ; 1542 ret <4 x double> %res 1543} 1544declare <4 x double> @llvm.x86.avx2.gather.d.pd.256(<4 x double>, i8*, 1545 <4 x i32>, <4 x double>, i8) nounwind readonly 1546 1547define <2 x double> @test_x86_avx2_gather_q_pd(<2 x double> %a0, i8* %a1, <2 x i64> %idx, <2 x double> %mask) { 1548; AVX2-LABEL: test_x86_avx2_gather_q_pd: 1549; AVX2: ## BB#0: 1550; AVX2-NEXT: movl {{[0-9]+}}(%esp), %eax 1551; AVX2-NEXT: vgatherqpd %xmm2, (%eax,%xmm1,2), %xmm0 1552; AVX2-NEXT: retl 1553; 1554; AVX512VL-LABEL: test_x86_avx2_gather_q_pd: 1555; AVX512VL: ## BB#0: 1556; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax 1557; AVX512VL-NEXT: vgatherqpd %xmm2, (%eax,%xmm1,2), %xmm0 1558; AVX512VL-NEXT: retl 1559 %res = call <2 x double> @llvm.x86.avx2.gather.q.pd(<2 x double> %a0, 1560 i8* %a1, <2 x i64> %idx, <2 x double> %mask, i8 2) ; 1561 ret <2 x double> %res 1562} 1563declare <2 x double> @llvm.x86.avx2.gather.q.pd(<2 x double>, i8*, 1564 <2 x i64>, <2 x double>, i8) nounwind readonly 1565 1566define <4 x double> @test_x86_avx2_gather_q_pd_256(<4 x double> %a0, i8* %a1, <4 x i64> %idx, <4 x double> %mask) { 1567; AVX2-LABEL: test_x86_avx2_gather_q_pd_256: 1568; AVX2: ## BB#0: 1569; AVX2-NEXT: movl {{[0-9]+}}(%esp), %eax 1570; AVX2-NEXT: vgatherqpd %ymm2, (%eax,%ymm1,2), %ymm0 1571; AVX2-NEXT: retl 1572; 1573; AVX512VL-LABEL: test_x86_avx2_gather_q_pd_256: 1574; AVX512VL: ## BB#0: 1575; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax 1576; AVX512VL-NEXT: vgatherqpd %ymm2, (%eax,%ymm1,2), %ymm0 1577; AVX512VL-NEXT: retl 1578 %res = call <4 x double> @llvm.x86.avx2.gather.q.pd.256(<4 x double> %a0, 1579 i8* %a1, <4 x i64> %idx, <4 x double> %mask, i8 2) ; 1580 ret <4 x double> %res 1581} 1582declare <4 x double> @llvm.x86.avx2.gather.q.pd.256(<4 x double>, i8*, 1583 <4 x i64>, <4 x double>, i8) nounwind readonly 1584 1585define <4 x float> @test_x86_avx2_gather_d_ps(<4 x float> %a0, i8* %a1, <4 x i32> %idx, <4 x float> %mask) { 1586; AVX2-LABEL: test_x86_avx2_gather_d_ps: 1587; AVX2: ## BB#0: 1588; AVX2-NEXT: movl {{[0-9]+}}(%esp), %eax 1589; AVX2-NEXT: vgatherdps %xmm2, (%eax,%xmm1,2), %xmm0 1590; AVX2-NEXT: retl 1591; 1592; AVX512VL-LABEL: test_x86_avx2_gather_d_ps: 1593; AVX512VL: ## BB#0: 1594; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax 1595; AVX512VL-NEXT: vgatherdps %xmm2, (%eax,%xmm1,2), %xmm0 1596; AVX512VL-NEXT: retl 1597 %res = call <4 x float> @llvm.x86.avx2.gather.d.ps(<4 x float> %a0, 1598 i8* %a1, <4 x i32> %idx, <4 x float> %mask, i8 2) ; 1599 ret <4 x float> %res 1600} 1601declare <4 x float> @llvm.x86.avx2.gather.d.ps(<4 x float>, i8*, 1602 <4 x i32>, <4 x float>, i8) nounwind readonly 1603 1604define <8 x float> @test_x86_avx2_gather_d_ps_256(<8 x float> %a0, i8* %a1, <8 x i32> %idx, <8 x float> %mask) { 1605; AVX2-LABEL: test_x86_avx2_gather_d_ps_256: 1606; AVX2: ## BB#0: 1607; AVX2-NEXT: movl {{[0-9]+}}(%esp), %eax 1608; AVX2-NEXT: vgatherdps %ymm2, (%eax,%ymm1,2), %ymm0 1609; AVX2-NEXT: retl 1610; 1611; AVX512VL-LABEL: test_x86_avx2_gather_d_ps_256: 1612; AVX512VL: ## BB#0: 1613; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax 1614; AVX512VL-NEXT: vgatherdps %ymm2, (%eax,%ymm1,2), %ymm0 1615; AVX512VL-NEXT: retl 1616 %res = call <8 x float> @llvm.x86.avx2.gather.d.ps.256(<8 x float> %a0, 1617 i8* %a1, <8 x i32> %idx, <8 x float> %mask, i8 2) ; 1618 ret <8 x float> %res 1619} 1620declare <8 x float> @llvm.x86.avx2.gather.d.ps.256(<8 x float>, i8*, 1621 <8 x i32>, <8 x float>, i8) nounwind readonly 1622 1623define <4 x float> @test_x86_avx2_gather_q_ps(<4 x float> %a0, i8* %a1, <2 x i64> %idx, <4 x float> %mask) { 1624; AVX2-LABEL: test_x86_avx2_gather_q_ps: 1625; AVX2: ## BB#0: 1626; AVX2-NEXT: movl {{[0-9]+}}(%esp), %eax 1627; AVX2-NEXT: vgatherqps %xmm2, (%eax,%xmm1,2), %xmm0 1628; AVX2-NEXT: retl 1629; 1630; AVX512VL-LABEL: test_x86_avx2_gather_q_ps: 1631; AVX512VL: ## BB#0: 1632; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax 1633; AVX512VL-NEXT: vgatherqps %xmm2, (%eax,%xmm1,2), %xmm0 1634; AVX512VL-NEXT: retl 1635 %res = call <4 x float> @llvm.x86.avx2.gather.q.ps(<4 x float> %a0, 1636 i8* %a1, <2 x i64> %idx, <4 x float> %mask, i8 2) ; 1637 ret <4 x float> %res 1638} 1639declare <4 x float> @llvm.x86.avx2.gather.q.ps(<4 x float>, i8*, 1640 <2 x i64>, <4 x float>, i8) nounwind readonly 1641 1642define <4 x float> @test_x86_avx2_gather_q_ps_256(<4 x float> %a0, i8* %a1, <4 x i64> %idx, <4 x float> %mask) { 1643; AVX2-LABEL: test_x86_avx2_gather_q_ps_256: 1644; AVX2: ## BB#0: 1645; AVX2-NEXT: movl {{[0-9]+}}(%esp), %eax 1646; AVX2-NEXT: vgatherqps %xmm2, (%eax,%ymm1,2), %xmm0 1647; AVX2-NEXT: vzeroupper 1648; AVX2-NEXT: retl 1649; 1650; AVX512VL-LABEL: test_x86_avx2_gather_q_ps_256: 1651; AVX512VL: ## BB#0: 1652; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax 1653; AVX512VL-NEXT: vgatherqps %xmm2, (%eax,%ymm1,2), %xmm0 1654; AVX512VL-NEXT: retl 1655 %res = call <4 x float> @llvm.x86.avx2.gather.q.ps.256(<4 x float> %a0, 1656 i8* %a1, <4 x i64> %idx, <4 x float> %mask, i8 2) ; 1657 ret <4 x float> %res 1658} 1659declare <4 x float> @llvm.x86.avx2.gather.q.ps.256(<4 x float>, i8*, 1660 <4 x i64>, <4 x float>, i8) nounwind readonly 1661 1662define <2 x i64> @test_x86_avx2_gather_d_q(<2 x i64> %a0, i8* %a1, <4 x i32> %idx, <2 x i64> %mask) { 1663; AVX2-LABEL: test_x86_avx2_gather_d_q: 1664; AVX2: ## BB#0: 1665; AVX2-NEXT: movl {{[0-9]+}}(%esp), %eax 1666; AVX2-NEXT: vpgatherdq %xmm2, (%eax,%xmm1,2), %xmm0 1667; AVX2-NEXT: retl 1668; 1669; AVX512VL-LABEL: test_x86_avx2_gather_d_q: 1670; AVX512VL: ## BB#0: 1671; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax 1672; AVX512VL-NEXT: vpgatherdq %xmm2, (%eax,%xmm1,2), %xmm0 1673; AVX512VL-NEXT: retl 1674 %res = call <2 x i64> @llvm.x86.avx2.gather.d.q(<2 x i64> %a0, 1675 i8* %a1, <4 x i32> %idx, <2 x i64> %mask, i8 2) ; 1676 ret <2 x i64> %res 1677} 1678declare <2 x i64> @llvm.x86.avx2.gather.d.q(<2 x i64>, i8*, 1679 <4 x i32>, <2 x i64>, i8) nounwind readonly 1680 1681define <4 x i64> @test_x86_avx2_gather_d_q_256(<4 x i64> %a0, i8* %a1, <4 x i32> %idx, <4 x i64> %mask) { 1682; AVX2-LABEL: test_x86_avx2_gather_d_q_256: 1683; AVX2: ## BB#0: 1684; AVX2-NEXT: movl {{[0-9]+}}(%esp), %eax 1685; AVX2-NEXT: vpgatherdq %ymm2, (%eax,%xmm1,2), %ymm0 1686; AVX2-NEXT: retl 1687; 1688; AVX512VL-LABEL: test_x86_avx2_gather_d_q_256: 1689; AVX512VL: ## BB#0: 1690; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax 1691; AVX512VL-NEXT: vpgatherdq %ymm2, (%eax,%xmm1,2), %ymm0 1692; AVX512VL-NEXT: retl 1693 %res = call <4 x i64> @llvm.x86.avx2.gather.d.q.256(<4 x i64> %a0, 1694 i8* %a1, <4 x i32> %idx, <4 x i64> %mask, i8 2) ; 1695 ret <4 x i64> %res 1696} 1697declare <4 x i64> @llvm.x86.avx2.gather.d.q.256(<4 x i64>, i8*, 1698 <4 x i32>, <4 x i64>, i8) nounwind readonly 1699 1700define <2 x i64> @test_x86_avx2_gather_q_q(<2 x i64> %a0, i8* %a1, <2 x i64> %idx, <2 x i64> %mask) { 1701; AVX2-LABEL: test_x86_avx2_gather_q_q: 1702; AVX2: ## BB#0: 1703; AVX2-NEXT: movl {{[0-9]+}}(%esp), %eax 1704; AVX2-NEXT: vpgatherqq %xmm2, (%eax,%xmm1,2), %xmm0 1705; AVX2-NEXT: retl 1706; 1707; AVX512VL-LABEL: test_x86_avx2_gather_q_q: 1708; AVX512VL: ## BB#0: 1709; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax 1710; AVX512VL-NEXT: vpgatherqq %xmm2, (%eax,%xmm1,2), %xmm0 1711; AVX512VL-NEXT: retl 1712 %res = call <2 x i64> @llvm.x86.avx2.gather.q.q(<2 x i64> %a0, 1713 i8* %a1, <2 x i64> %idx, <2 x i64> %mask, i8 2) ; 1714 ret <2 x i64> %res 1715} 1716declare <2 x i64> @llvm.x86.avx2.gather.q.q(<2 x i64>, i8*, 1717 <2 x i64>, <2 x i64>, i8) nounwind readonly 1718 1719define <4 x i64> @test_x86_avx2_gather_q_q_256(<4 x i64> %a0, i8* %a1, <4 x i64> %idx, <4 x i64> %mask) { 1720; AVX2-LABEL: test_x86_avx2_gather_q_q_256: 1721; AVX2: ## BB#0: 1722; AVX2-NEXT: movl {{[0-9]+}}(%esp), %eax 1723; AVX2-NEXT: vpgatherqq %ymm2, (%eax,%ymm1,2), %ymm0 1724; AVX2-NEXT: retl 1725; 1726; AVX512VL-LABEL: test_x86_avx2_gather_q_q_256: 1727; AVX512VL: ## BB#0: 1728; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax 1729; AVX512VL-NEXT: vpgatherqq %ymm2, (%eax,%ymm1,2), %ymm0 1730; AVX512VL-NEXT: retl 1731 %res = call <4 x i64> @llvm.x86.avx2.gather.q.q.256(<4 x i64> %a0, 1732 i8* %a1, <4 x i64> %idx, <4 x i64> %mask, i8 2) ; 1733 ret <4 x i64> %res 1734} 1735declare <4 x i64> @llvm.x86.avx2.gather.q.q.256(<4 x i64>, i8*, 1736 <4 x i64>, <4 x i64>, i8) nounwind readonly 1737 1738define <4 x i32> @test_x86_avx2_gather_d_d(<4 x i32> %a0, i8* %a1, <4 x i32> %idx, <4 x i32> %mask) { 1739; AVX2-LABEL: test_x86_avx2_gather_d_d: 1740; AVX2: ## BB#0: 1741; AVX2-NEXT: movl {{[0-9]+}}(%esp), %eax 1742; AVX2-NEXT: vpgatherdd %xmm2, (%eax,%xmm1,2), %xmm0 1743; AVX2-NEXT: retl 1744; 1745; AVX512VL-LABEL: test_x86_avx2_gather_d_d: 1746; AVX512VL: ## BB#0: 1747; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax 1748; AVX512VL-NEXT: vpgatherdd %xmm2, (%eax,%xmm1,2), %xmm0 1749; AVX512VL-NEXT: retl 1750 %res = call <4 x i32> @llvm.x86.avx2.gather.d.d(<4 x i32> %a0, 1751 i8* %a1, <4 x i32> %idx, <4 x i32> %mask, i8 2) ; 1752 ret <4 x i32> %res 1753} 1754declare <4 x i32> @llvm.x86.avx2.gather.d.d(<4 x i32>, i8*, 1755 <4 x i32>, <4 x i32>, i8) nounwind readonly 1756 1757define <8 x i32> @test_x86_avx2_gather_d_d_256(<8 x i32> %a0, i8* %a1, <8 x i32> %idx, <8 x i32> %mask) { 1758; AVX2-LABEL: test_x86_avx2_gather_d_d_256: 1759; AVX2: ## BB#0: 1760; AVX2-NEXT: movl {{[0-9]+}}(%esp), %eax 1761; AVX2-NEXT: vpgatherdd %ymm2, (%eax,%ymm1,2), %ymm0 1762; AVX2-NEXT: retl 1763; 1764; AVX512VL-LABEL: test_x86_avx2_gather_d_d_256: 1765; AVX512VL: ## BB#0: 1766; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax 1767; AVX512VL-NEXT: vpgatherdd %ymm2, (%eax,%ymm1,2), %ymm0 1768; AVX512VL-NEXT: retl 1769 %res = call <8 x i32> @llvm.x86.avx2.gather.d.d.256(<8 x i32> %a0, 1770 i8* %a1, <8 x i32> %idx, <8 x i32> %mask, i8 2) ; 1771 ret <8 x i32> %res 1772} 1773declare <8 x i32> @llvm.x86.avx2.gather.d.d.256(<8 x i32>, i8*, 1774 <8 x i32>, <8 x i32>, i8) nounwind readonly 1775 1776define <4 x i32> @test_x86_avx2_gather_q_d(<4 x i32> %a0, i8* %a1, <2 x i64> %idx, <4 x i32> %mask) { 1777; AVX2-LABEL: test_x86_avx2_gather_q_d: 1778; AVX2: ## BB#0: 1779; AVX2-NEXT: movl {{[0-9]+}}(%esp), %eax 1780; AVX2-NEXT: vpgatherqd %xmm2, (%eax,%xmm1,2), %xmm0 1781; AVX2-NEXT: retl 1782; 1783; AVX512VL-LABEL: test_x86_avx2_gather_q_d: 1784; AVX512VL: ## BB#0: 1785; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax 1786; AVX512VL-NEXT: vpgatherqd %xmm2, (%eax,%xmm1,2), %xmm0 1787; AVX512VL-NEXT: retl 1788 %res = call <4 x i32> @llvm.x86.avx2.gather.q.d(<4 x i32> %a0, 1789 i8* %a1, <2 x i64> %idx, <4 x i32> %mask, i8 2) ; 1790 ret <4 x i32> %res 1791} 1792declare <4 x i32> @llvm.x86.avx2.gather.q.d(<4 x i32>, i8*, 1793 <2 x i64>, <4 x i32>, i8) nounwind readonly 1794 1795define <4 x i32> @test_x86_avx2_gather_q_d_256(<4 x i32> %a0, i8* %a1, <4 x i64> %idx, <4 x i32> %mask) { 1796; AVX2-LABEL: test_x86_avx2_gather_q_d_256: 1797; AVX2: ## BB#0: 1798; AVX2-NEXT: movl {{[0-9]+}}(%esp), %eax 1799; AVX2-NEXT: vpgatherqd %xmm2, (%eax,%ymm1,2), %xmm0 1800; AVX2-NEXT: vzeroupper 1801; AVX2-NEXT: retl 1802; 1803; AVX512VL-LABEL: test_x86_avx2_gather_q_d_256: 1804; AVX512VL: ## BB#0: 1805; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax 1806; AVX512VL-NEXT: vpgatherqd %xmm2, (%eax,%ymm1,2), %xmm0 1807; AVX512VL-NEXT: retl 1808 %res = call <4 x i32> @llvm.x86.avx2.gather.q.d.256(<4 x i32> %a0, 1809 i8* %a1, <4 x i64> %idx, <4 x i32> %mask, i8 2) ; 1810 ret <4 x i32> %res 1811} 1812declare <4 x i32> @llvm.x86.avx2.gather.q.d.256(<4 x i32>, i8*, 1813 <4 x i64>, <4 x i32>, i8) nounwind readonly 1814 1815; PR13298 1816define <8 x float> @test_gather_mask(<8 x float> %a0, float* %a, <8 x i32> %idx, <8 x float> %mask, float* nocapture %out) { 1817;; gather with mask 1818; AVX2-LABEL: test_gather_mask: 1819; AVX2: ## BB#0: 1820; AVX2-NEXT: movl {{[0-9]+}}(%esp), %eax 1821; AVX2-NEXT: movl {{[0-9]+}}(%esp), %ecx 1822; AVX2-NEXT: vmovaps %ymm2, %ymm3 1823; AVX2-NEXT: vgatherdps %ymm3, (%ecx,%ymm1,4), %ymm0 1824; AVX2-NEXT: vmovups %ymm2, (%eax) 1825; AVX2-NEXT: retl 1826; 1827; AVX512VL-LABEL: test_gather_mask: 1828; AVX512VL: ## BB#0: 1829; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax 1830; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %ecx 1831; AVX512VL-NEXT: vmovaps %zmm2, %zmm3 1832; AVX512VL-NEXT: vgatherdps %ymm3, (%ecx,%ymm1,4), %ymm0 1833; AVX512VL-NEXT: vmovups %ymm2, (%eax) 1834; AVX512VL-NEXT: retl 1835 %a_i8 = bitcast float* %a to i8* 1836 %res = call <8 x float> @llvm.x86.avx2.gather.d.ps.256(<8 x float> %a0, 1837 i8* %a_i8, <8 x i32> %idx, <8 x float> %mask, i8 4) ; 1838 1839;; for debugging, we'll just dump out the mask 1840 %out_ptr = bitcast float * %out to <8 x float> * 1841 store <8 x float> %mask, <8 x float> * %out_ptr, align 4 1842 1843 ret <8 x float> %res 1844} 1845