1 /**************************************************************************** 2 **************************************************************************** 3 *** 4 *** This header was automatically generated from a Linux kernel header 5 *** of the same name, to make information necessary for userspace to 6 *** call into the kernel available to libc. It contains only constants, 7 *** structures, and macros generated from the original header, and thus, 8 *** contains no copyrightable information. 9 *** 10 *** To edit the content of this header, modify the corresponding 11 *** source file (e.g. under external/kernel-headers/original/) then 12 *** run bionic/libc/kernel/tools/update_all.py 13 *** 14 *** Any manual change here will be lost the next time this script will 15 *** be run. You've been warned! 16 *** 17 **************************************************************************** 18 ****************************************************************************/ 19 #ifndef __VMWGFX_DRM_H__ 20 #define __VMWGFX_DRM_H__ 21 #include "drm.h" 22 #ifdef __cplusplus 23 extern "C" { 24 #endif 25 #define DRM_VMW_MAX_SURFACE_FACES 6 26 #define DRM_VMW_MAX_MIP_LEVELS 24 27 #define DRM_VMW_GET_PARAM 0 28 #define DRM_VMW_ALLOC_DMABUF 1 29 #define DRM_VMW_ALLOC_BO 1 30 #define DRM_VMW_UNREF_DMABUF 2 31 #define DRM_VMW_HANDLE_CLOSE 2 32 #define DRM_VMW_CURSOR_BYPASS 3 33 #define DRM_VMW_CONTROL_STREAM 4 34 #define DRM_VMW_CLAIM_STREAM 5 35 #define DRM_VMW_UNREF_STREAM 6 36 #define DRM_VMW_CREATE_CONTEXT 7 37 #define DRM_VMW_UNREF_CONTEXT 8 38 #define DRM_VMW_CREATE_SURFACE 9 39 #define DRM_VMW_UNREF_SURFACE 10 40 #define DRM_VMW_REF_SURFACE 11 41 #define DRM_VMW_EXECBUF 12 42 #define DRM_VMW_GET_3D_CAP 13 43 #define DRM_VMW_FENCE_WAIT 14 44 #define DRM_VMW_FENCE_SIGNALED 15 45 #define DRM_VMW_FENCE_UNREF 16 46 #define DRM_VMW_FENCE_EVENT 17 47 #define DRM_VMW_PRESENT 18 48 #define DRM_VMW_PRESENT_READBACK 19 49 #define DRM_VMW_UPDATE_LAYOUT 20 50 #define DRM_VMW_CREATE_SHADER 21 51 #define DRM_VMW_UNREF_SHADER 22 52 #define DRM_VMW_GB_SURFACE_CREATE 23 53 #define DRM_VMW_GB_SURFACE_REF 24 54 #define DRM_VMW_SYNCCPU 25 55 #define DRM_VMW_CREATE_EXTENDED_CONTEXT 26 56 #define DRM_VMW_GB_SURFACE_CREATE_EXT 27 57 #define DRM_VMW_GB_SURFACE_REF_EXT 28 58 #define DRM_VMW_MSG 29 59 #define DRM_VMW_MKSSTAT_RESET 30 60 #define DRM_VMW_MKSSTAT_ADD 31 61 #define DRM_VMW_MKSSTAT_REMOVE 32 62 #define DRM_VMW_PARAM_NUM_STREAMS 0 63 #define DRM_VMW_PARAM_NUM_FREE_STREAMS 1 64 #define DRM_VMW_PARAM_3D 2 65 #define DRM_VMW_PARAM_HW_CAPS 3 66 #define DRM_VMW_PARAM_FIFO_CAPS 4 67 #define DRM_VMW_PARAM_MAX_FB_SIZE 5 68 #define DRM_VMW_PARAM_FIFO_HW_VERSION 6 69 #define DRM_VMW_PARAM_MAX_SURF_MEMORY 7 70 #define DRM_VMW_PARAM_3D_CAPS_SIZE 8 71 #define DRM_VMW_PARAM_MAX_MOB_MEMORY 9 72 #define DRM_VMW_PARAM_MAX_MOB_SIZE 10 73 #define DRM_VMW_PARAM_SCREEN_TARGET 11 74 #define DRM_VMW_PARAM_DX 12 75 #define DRM_VMW_PARAM_HW_CAPS2 13 76 #define DRM_VMW_PARAM_SM4_1 14 77 #define DRM_VMW_PARAM_SM5 15 78 #define DRM_VMW_PARAM_GL43 16 79 #define DRM_VMW_PARAM_DEVICE_ID 17 80 enum drm_vmw_handle_type { 81 DRM_VMW_HANDLE_LEGACY = 0, 82 DRM_VMW_HANDLE_PRIME = 1 83 }; 84 struct drm_vmw_getparam_arg { 85 __u64 value; 86 __u32 param; 87 __u32 pad64; 88 }; 89 struct drm_vmw_context_arg { 90 __s32 cid; 91 __u32 pad64; 92 }; 93 struct drm_vmw_surface_create_req { 94 __u32 flags; 95 __u32 format; 96 __u32 mip_levels[DRM_VMW_MAX_SURFACE_FACES]; 97 __u64 size_addr; 98 __s32 shareable; 99 __s32 scanout; 100 }; 101 struct drm_vmw_surface_arg { 102 __s32 sid; 103 enum drm_vmw_handle_type handle_type; 104 }; 105 struct drm_vmw_size { 106 __u32 width; 107 __u32 height; 108 __u32 depth; 109 __u32 pad64; 110 }; 111 union drm_vmw_surface_create_arg { 112 struct drm_vmw_surface_arg rep; 113 struct drm_vmw_surface_create_req req; 114 }; 115 union drm_vmw_surface_reference_arg { 116 struct drm_vmw_surface_create_req rep; 117 struct drm_vmw_surface_arg req; 118 }; 119 #define DRM_VMW_EXECBUF_VERSION 2 120 #define DRM_VMW_EXECBUF_FLAG_IMPORT_FENCE_FD (1 << 0) 121 #define DRM_VMW_EXECBUF_FLAG_EXPORT_FENCE_FD (1 << 1) 122 struct drm_vmw_execbuf_arg { 123 __u64 commands; 124 __u32 command_size; 125 __u32 throttle_us; 126 __u64 fence_rep; 127 __u32 version; 128 __u32 flags; 129 __u32 context_handle; 130 __s32 imported_fence_fd; 131 }; 132 struct drm_vmw_fence_rep { 133 __u32 handle; 134 __u32 mask; 135 __u32 seqno; 136 __u32 passed_seqno; 137 __s32 fd; 138 __s32 error; 139 }; 140 struct drm_vmw_alloc_bo_req { 141 __u32 size; 142 __u32 pad64; 143 }; 144 #define drm_vmw_alloc_dmabuf_req drm_vmw_alloc_bo_req 145 struct drm_vmw_bo_rep { 146 __u64 map_handle; 147 __u32 handle; 148 __u32 cur_gmr_id; 149 __u32 cur_gmr_offset; 150 __u32 pad64; 151 }; 152 #define drm_vmw_dmabuf_rep drm_vmw_bo_rep 153 union drm_vmw_alloc_bo_arg { 154 struct drm_vmw_alloc_bo_req req; 155 struct drm_vmw_bo_rep rep; 156 }; 157 #define drm_vmw_alloc_dmabuf_arg drm_vmw_alloc_bo_arg 158 struct drm_vmw_rect { 159 __s32 x; 160 __s32 y; 161 __u32 w; 162 __u32 h; 163 }; 164 struct drm_vmw_control_stream_arg { 165 __u32 stream_id; 166 __u32 enabled; 167 __u32 flags; 168 __u32 color_key; 169 __u32 handle; 170 __u32 offset; 171 __s32 format; 172 __u32 size; 173 __u32 width; 174 __u32 height; 175 __u32 pitch[3]; 176 __u32 pad64; 177 struct drm_vmw_rect src; 178 struct drm_vmw_rect dst; 179 }; 180 #define DRM_VMW_CURSOR_BYPASS_ALL (1 << 0) 181 #define DRM_VMW_CURSOR_BYPASS_FLAGS (1) 182 struct drm_vmw_cursor_bypass_arg { 183 __u32 flags; 184 __u32 crtc_id; 185 __s32 xpos; 186 __s32 ypos; 187 __s32 xhot; 188 __s32 yhot; 189 }; 190 struct drm_vmw_stream_arg { 191 __u32 stream_id; 192 __u32 pad64; 193 }; 194 struct drm_vmw_get_3d_cap_arg { 195 __u64 buffer; 196 __u32 max_size; 197 __u32 pad64; 198 }; 199 #define DRM_VMW_FENCE_FLAG_EXEC (1 << 0) 200 #define DRM_VMW_FENCE_FLAG_QUERY (1 << 1) 201 #define DRM_VMW_WAIT_OPTION_UNREF (1 << 0) 202 struct drm_vmw_fence_wait_arg { 203 __u32 handle; 204 __s32 cookie_valid; 205 __u64 kernel_cookie; 206 __u64 timeout_us; 207 __s32 lazy; 208 __s32 flags; 209 __s32 wait_options; 210 __s32 pad64; 211 }; 212 struct drm_vmw_fence_signaled_arg { 213 __u32 handle; 214 __u32 flags; 215 __s32 signaled; 216 __u32 passed_seqno; 217 __u32 signaled_flags; 218 __u32 pad64; 219 }; 220 struct drm_vmw_fence_arg { 221 __u32 handle; 222 __u32 pad64; 223 }; 224 #define DRM_VMW_EVENT_FENCE_SIGNALED 0x80000000 225 struct drm_vmw_event_fence { 226 struct drm_event base; 227 __u64 user_data; 228 __u32 tv_sec; 229 __u32 tv_usec; 230 }; 231 #define DRM_VMW_FE_FLAG_REQ_TIME (1 << 0) 232 struct drm_vmw_fence_event_arg { 233 __u64 fence_rep; 234 __u64 user_data; 235 __u32 handle; 236 __u32 flags; 237 }; 238 struct drm_vmw_present_arg { 239 __u32 fb_id; 240 __u32 sid; 241 __s32 dest_x; 242 __s32 dest_y; 243 __u64 clips_ptr; 244 __u32 num_clips; 245 __u32 pad64; 246 }; 247 struct drm_vmw_present_readback_arg { 248 __u32 fb_id; 249 __u32 num_clips; 250 __u64 clips_ptr; 251 __u64 fence_rep; 252 }; 253 struct drm_vmw_update_layout_arg { 254 __u32 num_outputs; 255 __u32 pad64; 256 __u64 rects; 257 }; 258 enum drm_vmw_shader_type { 259 drm_vmw_shader_type_vs = 0, 260 drm_vmw_shader_type_ps, 261 }; 262 struct drm_vmw_shader_create_arg { 263 enum drm_vmw_shader_type shader_type; 264 __u32 size; 265 __u32 buffer_handle; 266 __u32 shader_handle; 267 __u64 offset; 268 }; 269 struct drm_vmw_shader_arg { 270 __u32 handle; 271 __u32 pad64; 272 }; 273 enum drm_vmw_surface_flags { 274 drm_vmw_surface_flag_shareable = (1 << 0), 275 drm_vmw_surface_flag_scanout = (1 << 1), 276 drm_vmw_surface_flag_create_buffer = (1 << 2), 277 drm_vmw_surface_flag_coherent = (1 << 3), 278 }; 279 struct drm_vmw_gb_surface_create_req { 280 __u32 svga3d_flags; 281 __u32 format; 282 __u32 mip_levels; 283 enum drm_vmw_surface_flags drm_surface_flags; 284 __u32 multisample_count; 285 __u32 autogen_filter; 286 __u32 buffer_handle; 287 __u32 array_size; 288 struct drm_vmw_size base_size; 289 }; 290 struct drm_vmw_gb_surface_create_rep { 291 __u32 handle; 292 __u32 backup_size; 293 __u32 buffer_handle; 294 __u32 buffer_size; 295 __u64 buffer_map_handle; 296 }; 297 union drm_vmw_gb_surface_create_arg { 298 struct drm_vmw_gb_surface_create_rep rep; 299 struct drm_vmw_gb_surface_create_req req; 300 }; 301 struct drm_vmw_gb_surface_ref_rep { 302 struct drm_vmw_gb_surface_create_req creq; 303 struct drm_vmw_gb_surface_create_rep crep; 304 }; 305 union drm_vmw_gb_surface_reference_arg { 306 struct drm_vmw_gb_surface_ref_rep rep; 307 struct drm_vmw_surface_arg req; 308 }; 309 enum drm_vmw_synccpu_flags { 310 drm_vmw_synccpu_read = (1 << 0), 311 drm_vmw_synccpu_write = (1 << 1), 312 drm_vmw_synccpu_dontblock = (1 << 2), 313 drm_vmw_synccpu_allow_cs = (1 << 3) 314 }; 315 enum drm_vmw_synccpu_op { 316 drm_vmw_synccpu_grab, 317 drm_vmw_synccpu_release 318 }; 319 struct drm_vmw_synccpu_arg { 320 enum drm_vmw_synccpu_op op; 321 enum drm_vmw_synccpu_flags flags; 322 __u32 handle; 323 __u32 pad64; 324 }; 325 enum drm_vmw_extended_context { 326 drm_vmw_context_legacy, 327 drm_vmw_context_dx 328 }; 329 union drm_vmw_extended_context_arg { 330 enum drm_vmw_extended_context req; 331 struct drm_vmw_context_arg rep; 332 }; 333 struct drm_vmw_handle_close_arg { 334 __u32 handle; 335 __u32 pad64; 336 }; 337 #define drm_vmw_unref_dmabuf_arg drm_vmw_handle_close_arg 338 enum drm_vmw_surface_version { 339 drm_vmw_gb_surface_v1, 340 }; 341 struct drm_vmw_gb_surface_create_ext_req { 342 struct drm_vmw_gb_surface_create_req base; 343 enum drm_vmw_surface_version version; 344 __u32 svga3d_flags_upper_32_bits; 345 __u32 multisample_pattern; 346 __u32 quality_level; 347 __u32 buffer_byte_stride; 348 __u32 must_be_zero; 349 }; 350 union drm_vmw_gb_surface_create_ext_arg { 351 struct drm_vmw_gb_surface_create_rep rep; 352 struct drm_vmw_gb_surface_create_ext_req req; 353 }; 354 struct drm_vmw_gb_surface_ref_ext_rep { 355 struct drm_vmw_gb_surface_create_ext_req creq; 356 struct drm_vmw_gb_surface_create_rep crep; 357 }; 358 union drm_vmw_gb_surface_reference_ext_arg { 359 struct drm_vmw_gb_surface_ref_ext_rep rep; 360 struct drm_vmw_surface_arg req; 361 }; 362 struct drm_vmw_msg_arg { 363 __u64 send; 364 __u64 receive; 365 __s32 send_only; 366 __u32 receive_len; 367 }; 368 struct drm_vmw_mksstat_add_arg { 369 __u64 stat; 370 __u64 info; 371 __u64 strs; 372 __u64 stat_len; 373 __u64 info_len; 374 __u64 strs_len; 375 __u64 description; 376 __u64 id; 377 }; 378 struct drm_vmw_mksstat_remove_arg { 379 __u64 id; 380 }; 381 #ifdef __cplusplus 382 } 383 #endif 384 #endif 385