1 /**************************************************************************** 2 **************************************************************************** 3 *** 4 *** This header was automatically generated from a Linux kernel header 5 *** of the same name, to make information necessary for userspace to 6 *** call into the kernel available to libc. It contains only constants, 7 *** structures, and macros generated from the original header, and thus, 8 *** contains no copyrightable information. 9 *** 10 *** To edit the content of this header, modify the corresponding 11 *** source file (e.g. under external/kernel-headers/original/) then 12 *** run bionic/libc/kernel/tools/update_all.py 13 *** 14 *** Any manual change here will be lost the next time this script will 15 *** be run. You've been warned! 16 *** 17 **************************************************************************** 18 ****************************************************************************/ 19 #ifndef _DVBFRONTEND_H_ 20 #define _DVBFRONTEND_H_ 21 #include <linux/types.h> 22 enum fe_caps { 23 FE_IS_STUPID = 0, 24 FE_CAN_INVERSION_AUTO = 0x1, 25 FE_CAN_FEC_1_2 = 0x2, 26 FE_CAN_FEC_2_3 = 0x4, 27 FE_CAN_FEC_3_4 = 0x8, 28 FE_CAN_FEC_4_5 = 0x10, 29 FE_CAN_FEC_5_6 = 0x20, 30 FE_CAN_FEC_6_7 = 0x40, 31 FE_CAN_FEC_7_8 = 0x80, 32 FE_CAN_FEC_8_9 = 0x100, 33 FE_CAN_FEC_AUTO = 0x200, 34 FE_CAN_QPSK = 0x400, 35 FE_CAN_QAM_16 = 0x800, 36 FE_CAN_QAM_32 = 0x1000, 37 FE_CAN_QAM_64 = 0x2000, 38 FE_CAN_QAM_128 = 0x4000, 39 FE_CAN_QAM_256 = 0x8000, 40 FE_CAN_QAM_AUTO = 0x10000, 41 FE_CAN_TRANSMISSION_MODE_AUTO = 0x20000, 42 FE_CAN_BANDWIDTH_AUTO = 0x40000, 43 FE_CAN_GUARD_INTERVAL_AUTO = 0x80000, 44 FE_CAN_HIERARCHY_AUTO = 0x100000, 45 FE_CAN_8VSB = 0x200000, 46 FE_CAN_16VSB = 0x400000, 47 FE_HAS_EXTENDED_CAPS = 0x800000, 48 FE_CAN_MULTISTREAM = 0x4000000, 49 FE_CAN_TURBO_FEC = 0x8000000, 50 FE_CAN_2G_MODULATION = 0x10000000, 51 FE_NEEDS_BENDING = 0x20000000, 52 FE_CAN_RECOVER = 0x40000000, 53 FE_CAN_MUTE_TS = 0x80000000 54 }; 55 enum fe_type { 56 FE_QPSK, 57 FE_QAM, 58 FE_OFDM, 59 FE_ATSC 60 }; 61 struct dvb_frontend_info { 62 char name[128]; 63 enum fe_type type; 64 __u32 frequency_min; 65 __u32 frequency_max; 66 __u32 frequency_stepsize; 67 __u32 frequency_tolerance; 68 __u32 symbol_rate_min; 69 __u32 symbol_rate_max; 70 __u32 symbol_rate_tolerance; 71 __u32 notifier_delay; 72 enum fe_caps caps; 73 }; 74 struct dvb_diseqc_master_cmd { 75 __u8 msg[6]; 76 __u8 msg_len; 77 }; 78 struct dvb_diseqc_slave_reply { 79 __u8 msg[4]; 80 __u8 msg_len; 81 int timeout; 82 }; 83 enum fe_sec_voltage { 84 SEC_VOLTAGE_13, 85 SEC_VOLTAGE_18, 86 SEC_VOLTAGE_OFF 87 }; 88 enum fe_sec_tone_mode { 89 SEC_TONE_ON, 90 SEC_TONE_OFF 91 }; 92 enum fe_sec_mini_cmd { 93 SEC_MINI_A, 94 SEC_MINI_B 95 }; 96 enum fe_status { 97 FE_NONE = 0x00, 98 FE_HAS_SIGNAL = 0x01, 99 FE_HAS_CARRIER = 0x02, 100 FE_HAS_VITERBI = 0x04, 101 FE_HAS_SYNC = 0x08, 102 FE_HAS_LOCK = 0x10, 103 FE_TIMEDOUT = 0x20, 104 FE_REINIT = 0x40, 105 }; 106 enum fe_spectral_inversion { 107 INVERSION_OFF, 108 INVERSION_ON, 109 INVERSION_AUTO 110 }; 111 enum fe_code_rate { 112 FEC_NONE = 0, 113 FEC_1_2, 114 FEC_2_3, 115 FEC_3_4, 116 FEC_4_5, 117 FEC_5_6, 118 FEC_6_7, 119 FEC_7_8, 120 FEC_8_9, 121 FEC_AUTO, 122 FEC_3_5, 123 FEC_9_10, 124 FEC_2_5, 125 FEC_1_3, 126 FEC_1_4, 127 FEC_5_9, 128 FEC_7_9, 129 FEC_8_15, 130 FEC_11_15, 131 FEC_13_18, 132 FEC_9_20, 133 FEC_11_20, 134 FEC_23_36, 135 FEC_25_36, 136 FEC_13_45, 137 FEC_26_45, 138 FEC_28_45, 139 FEC_32_45, 140 FEC_77_90, 141 }; 142 enum fe_modulation { 143 QPSK, 144 QAM_16, 145 QAM_32, 146 QAM_64, 147 QAM_128, 148 QAM_256, 149 QAM_AUTO, 150 VSB_8, 151 VSB_16, 152 PSK_8, 153 APSK_16, 154 APSK_32, 155 DQPSK, 156 QAM_4_NR, 157 QAM_1024, 158 QAM_4096, 159 APSK_8_L, 160 APSK_16_L, 161 APSK_32_L, 162 APSK_64, 163 APSK_64_L, 164 }; 165 enum fe_transmit_mode { 166 TRANSMISSION_MODE_2K, 167 TRANSMISSION_MODE_8K, 168 TRANSMISSION_MODE_AUTO, 169 TRANSMISSION_MODE_4K, 170 TRANSMISSION_MODE_1K, 171 TRANSMISSION_MODE_16K, 172 TRANSMISSION_MODE_32K, 173 TRANSMISSION_MODE_C1, 174 TRANSMISSION_MODE_C3780, 175 }; 176 enum fe_guard_interval { 177 GUARD_INTERVAL_1_32, 178 GUARD_INTERVAL_1_16, 179 GUARD_INTERVAL_1_8, 180 GUARD_INTERVAL_1_4, 181 GUARD_INTERVAL_AUTO, 182 GUARD_INTERVAL_1_128, 183 GUARD_INTERVAL_19_128, 184 GUARD_INTERVAL_19_256, 185 GUARD_INTERVAL_PN420, 186 GUARD_INTERVAL_PN595, 187 GUARD_INTERVAL_PN945, 188 GUARD_INTERVAL_1_64, 189 }; 190 enum fe_hierarchy { 191 HIERARCHY_NONE, 192 HIERARCHY_1, 193 HIERARCHY_2, 194 HIERARCHY_4, 195 HIERARCHY_AUTO 196 }; 197 enum fe_interleaving { 198 INTERLEAVING_NONE, 199 INTERLEAVING_AUTO, 200 INTERLEAVING_240, 201 INTERLEAVING_720, 202 }; 203 #define DTV_UNDEFINED 0 204 #define DTV_TUNE 1 205 #define DTV_CLEAR 2 206 #define DTV_FREQUENCY 3 207 #define DTV_MODULATION 4 208 #define DTV_BANDWIDTH_HZ 5 209 #define DTV_INVERSION 6 210 #define DTV_DISEQC_MASTER 7 211 #define DTV_SYMBOL_RATE 8 212 #define DTV_INNER_FEC 9 213 #define DTV_VOLTAGE 10 214 #define DTV_TONE 11 215 #define DTV_PILOT 12 216 #define DTV_ROLLOFF 13 217 #define DTV_DISEQC_SLAVE_REPLY 14 218 #define DTV_FE_CAPABILITY_COUNT 15 219 #define DTV_FE_CAPABILITY 16 220 #define DTV_DELIVERY_SYSTEM 17 221 #define DTV_ISDBT_PARTIAL_RECEPTION 18 222 #define DTV_ISDBT_SOUND_BROADCASTING 19 223 #define DTV_ISDBT_SB_SUBCHANNEL_ID 20 224 #define DTV_ISDBT_SB_SEGMENT_IDX 21 225 #define DTV_ISDBT_SB_SEGMENT_COUNT 22 226 #define DTV_ISDBT_LAYERA_FEC 23 227 #define DTV_ISDBT_LAYERA_MODULATION 24 228 #define DTV_ISDBT_LAYERA_SEGMENT_COUNT 25 229 #define DTV_ISDBT_LAYERA_TIME_INTERLEAVING 26 230 #define DTV_ISDBT_LAYERB_FEC 27 231 #define DTV_ISDBT_LAYERB_MODULATION 28 232 #define DTV_ISDBT_LAYERB_SEGMENT_COUNT 29 233 #define DTV_ISDBT_LAYERB_TIME_INTERLEAVING 30 234 #define DTV_ISDBT_LAYERC_FEC 31 235 #define DTV_ISDBT_LAYERC_MODULATION 32 236 #define DTV_ISDBT_LAYERC_SEGMENT_COUNT 33 237 #define DTV_ISDBT_LAYERC_TIME_INTERLEAVING 34 238 #define DTV_API_VERSION 35 239 #define DTV_CODE_RATE_HP 36 240 #define DTV_CODE_RATE_LP 37 241 #define DTV_GUARD_INTERVAL 38 242 #define DTV_TRANSMISSION_MODE 39 243 #define DTV_HIERARCHY 40 244 #define DTV_ISDBT_LAYER_ENABLED 41 245 #define DTV_STREAM_ID 42 246 #define DTV_ISDBS_TS_ID_LEGACY DTV_STREAM_ID 247 #define DTV_DVBT2_PLP_ID_LEGACY 43 248 #define DTV_ENUM_DELSYS 44 249 #define DTV_ATSCMH_FIC_VER 45 250 #define DTV_ATSCMH_PARADE_ID 46 251 #define DTV_ATSCMH_NOG 47 252 #define DTV_ATSCMH_TNOG 48 253 #define DTV_ATSCMH_SGN 49 254 #define DTV_ATSCMH_PRC 50 255 #define DTV_ATSCMH_RS_FRAME_MODE 51 256 #define DTV_ATSCMH_RS_FRAME_ENSEMBLE 52 257 #define DTV_ATSCMH_RS_CODE_MODE_PRI 53 258 #define DTV_ATSCMH_RS_CODE_MODE_SEC 54 259 #define DTV_ATSCMH_SCCC_BLOCK_MODE 55 260 #define DTV_ATSCMH_SCCC_CODE_MODE_A 56 261 #define DTV_ATSCMH_SCCC_CODE_MODE_B 57 262 #define DTV_ATSCMH_SCCC_CODE_MODE_C 58 263 #define DTV_ATSCMH_SCCC_CODE_MODE_D 59 264 #define DTV_INTERLEAVING 60 265 #define DTV_LNA 61 266 #define DTV_STAT_SIGNAL_STRENGTH 62 267 #define DTV_STAT_CNR 63 268 #define DTV_STAT_PRE_ERROR_BIT_COUNT 64 269 #define DTV_STAT_PRE_TOTAL_BIT_COUNT 65 270 #define DTV_STAT_POST_ERROR_BIT_COUNT 66 271 #define DTV_STAT_POST_TOTAL_BIT_COUNT 67 272 #define DTV_STAT_ERROR_BLOCK_COUNT 68 273 #define DTV_STAT_TOTAL_BLOCK_COUNT 69 274 #define DTV_SCRAMBLING_SEQUENCE_INDEX 70 275 #define DTV_MAX_COMMAND DTV_SCRAMBLING_SEQUENCE_INDEX 276 enum fe_pilot { 277 PILOT_ON, 278 PILOT_OFF, 279 PILOT_AUTO, 280 }; 281 enum fe_rolloff { 282 ROLLOFF_35, 283 ROLLOFF_20, 284 ROLLOFF_25, 285 ROLLOFF_AUTO, 286 ROLLOFF_15, 287 ROLLOFF_10, 288 ROLLOFF_5, 289 }; 290 enum fe_delivery_system { 291 SYS_UNDEFINED, 292 SYS_DVBC_ANNEX_A, 293 SYS_DVBC_ANNEX_B, 294 SYS_DVBT, 295 SYS_DSS, 296 SYS_DVBS, 297 SYS_DVBS2, 298 SYS_DVBH, 299 SYS_ISDBT, 300 SYS_ISDBS, 301 SYS_ISDBC, 302 SYS_ATSC, 303 SYS_ATSCMH, 304 SYS_DTMB, 305 SYS_CMMB, 306 SYS_DAB, 307 SYS_DVBT2, 308 SYS_TURBO, 309 SYS_DVBC_ANNEX_C, 310 SYS_DVBC2, 311 }; 312 #define SYS_DVBC_ANNEX_AC SYS_DVBC_ANNEX_A 313 #define SYS_DMBTH SYS_DTMB 314 enum atscmh_sccc_block_mode { 315 ATSCMH_SCCC_BLK_SEP = 0, 316 ATSCMH_SCCC_BLK_COMB = 1, 317 ATSCMH_SCCC_BLK_RES = 2, 318 }; 319 enum atscmh_sccc_code_mode { 320 ATSCMH_SCCC_CODE_HLF = 0, 321 ATSCMH_SCCC_CODE_QTR = 1, 322 ATSCMH_SCCC_CODE_RES = 2, 323 }; 324 enum atscmh_rs_frame_ensemble { 325 ATSCMH_RSFRAME_ENS_PRI = 0, 326 ATSCMH_RSFRAME_ENS_SEC = 1, 327 }; 328 enum atscmh_rs_frame_mode { 329 ATSCMH_RSFRAME_PRI_ONLY = 0, 330 ATSCMH_RSFRAME_PRI_SEC = 1, 331 ATSCMH_RSFRAME_RES = 2, 332 }; 333 enum atscmh_rs_code_mode { 334 ATSCMH_RSCODE_211_187 = 0, 335 ATSCMH_RSCODE_223_187 = 1, 336 ATSCMH_RSCODE_235_187 = 2, 337 ATSCMH_RSCODE_RES = 3, 338 }; 339 #define NO_STREAM_ID_FILTER (~0U) 340 #define LNA_AUTO (~0U) 341 enum fecap_scale_params { 342 FE_SCALE_NOT_AVAILABLE = 0, 343 FE_SCALE_DECIBEL, 344 FE_SCALE_RELATIVE, 345 FE_SCALE_COUNTER 346 }; 347 struct dtv_stats { 348 __u8 scale; 349 union { 350 __u64 uvalue; 351 __s64 svalue; 352 }; 353 } __attribute__((packed)); 354 #define MAX_DTV_STATS 4 355 struct dtv_fe_stats { 356 __u8 len; 357 struct dtv_stats stat[MAX_DTV_STATS]; 358 } __attribute__((packed)); 359 struct dtv_property { 360 __u32 cmd; 361 __u32 reserved[3]; 362 union { 363 __u32 data; 364 struct dtv_fe_stats st; 365 struct { 366 __u8 data[32]; 367 __u32 len; 368 __u32 reserved1[3]; 369 void * reserved2; 370 } buffer; 371 } u; 372 int result; 373 } __attribute__((packed)); 374 #define DTV_IOCTL_MAX_MSGS 64 375 struct dtv_properties { 376 __u32 num; 377 struct dtv_property * props; 378 }; 379 #define FE_TUNE_MODE_ONESHOT 0x01 380 #define FE_GET_INFO _IOR('o', 61, struct dvb_frontend_info) 381 #define FE_DISEQC_RESET_OVERLOAD _IO('o', 62) 382 #define FE_DISEQC_SEND_MASTER_CMD _IOW('o', 63, struct dvb_diseqc_master_cmd) 383 #define FE_DISEQC_RECV_SLAVE_REPLY _IOR('o', 64, struct dvb_diseqc_slave_reply) 384 #define FE_DISEQC_SEND_BURST _IO('o', 65) 385 #define FE_SET_TONE _IO('o', 66) 386 #define FE_SET_VOLTAGE _IO('o', 67) 387 #define FE_ENABLE_HIGH_LNB_VOLTAGE _IO('o', 68) 388 #define FE_READ_STATUS _IOR('o', 69, fe_status_t) 389 #define FE_READ_BER _IOR('o', 70, __u32) 390 #define FE_READ_SIGNAL_STRENGTH _IOR('o', 71, __u16) 391 #define FE_READ_SNR _IOR('o', 72, __u16) 392 #define FE_READ_UNCORRECTED_BLOCKS _IOR('o', 73, __u32) 393 #define FE_SET_FRONTEND_TUNE_MODE _IO('o', 81) 394 #define FE_GET_EVENT _IOR('o', 78, struct dvb_frontend_event) 395 #define FE_DISHNETWORK_SEND_LEGACY_CMD _IO('o', 80) 396 #define FE_SET_PROPERTY _IOW('o', 82, struct dtv_properties) 397 #define FE_GET_PROPERTY _IOR('o', 83, struct dtv_properties) 398 enum fe_bandwidth { 399 BANDWIDTH_8_MHZ, 400 BANDWIDTH_7_MHZ, 401 BANDWIDTH_6_MHZ, 402 BANDWIDTH_AUTO, 403 BANDWIDTH_5_MHZ, 404 BANDWIDTH_10_MHZ, 405 BANDWIDTH_1_712_MHZ, 406 }; 407 typedef enum fe_sec_voltage fe_sec_voltage_t; 408 typedef enum fe_caps fe_caps_t; 409 typedef enum fe_type fe_type_t; 410 typedef enum fe_sec_tone_mode fe_sec_tone_mode_t; 411 typedef enum fe_sec_mini_cmd fe_sec_mini_cmd_t; 412 typedef enum fe_status fe_status_t; 413 typedef enum fe_spectral_inversion fe_spectral_inversion_t; 414 typedef enum fe_code_rate fe_code_rate_t; 415 typedef enum fe_modulation fe_modulation_t; 416 typedef enum fe_transmit_mode fe_transmit_mode_t; 417 typedef enum fe_bandwidth fe_bandwidth_t; 418 typedef enum fe_guard_interval fe_guard_interval_t; 419 typedef enum fe_hierarchy fe_hierarchy_t; 420 typedef enum fe_pilot fe_pilot_t; 421 typedef enum fe_rolloff fe_rolloff_t; 422 typedef enum fe_delivery_system fe_delivery_system_t; 423 struct dvb_qpsk_parameters { 424 __u32 symbol_rate; 425 fe_code_rate_t fec_inner; 426 }; 427 struct dvb_qam_parameters { 428 __u32 symbol_rate; 429 fe_code_rate_t fec_inner; 430 fe_modulation_t modulation; 431 }; 432 struct dvb_vsb_parameters { 433 fe_modulation_t modulation; 434 }; 435 struct dvb_ofdm_parameters { 436 fe_bandwidth_t bandwidth; 437 fe_code_rate_t code_rate_HP; 438 fe_code_rate_t code_rate_LP; 439 fe_modulation_t constellation; 440 fe_transmit_mode_t transmission_mode; 441 fe_guard_interval_t guard_interval; 442 fe_hierarchy_t hierarchy_information; 443 }; 444 struct dvb_frontend_parameters { 445 __u32 frequency; 446 fe_spectral_inversion_t inversion; 447 union { 448 struct dvb_qpsk_parameters qpsk; 449 struct dvb_qam_parameters qam; 450 struct dvb_ofdm_parameters ofdm; 451 struct dvb_vsb_parameters vsb; 452 } u; 453 }; 454 struct dvb_frontend_event { 455 fe_status_t status; 456 struct dvb_frontend_parameters parameters; 457 }; 458 #define FE_SET_FRONTEND _IOW('o', 76, struct dvb_frontend_parameters) 459 #define FE_GET_FRONTEND _IOR('o', 77, struct dvb_frontend_parameters) 460 #endif 461