1 /**************************************************************************** 2 **************************************************************************** 3 *** 4 *** This header was automatically generated from a Linux kernel header 5 *** of the same name, to make information necessary for userspace to 6 *** call into the kernel available to libc. It contains only constants, 7 *** structures, and macros generated from the original header, and thus, 8 *** contains no copyrightable information. 9 *** 10 *** To edit the content of this header, modify the corresponding 11 *** source file (e.g. under external/kernel-headers/original/) then 12 *** run bionic/libc/kernel/tools/update_all.py 13 *** 14 *** Any manual change here will be lost the next time this script will 15 *** be run. You've been warned! 16 *** 17 **************************************************************************** 18 ****************************************************************************/ 19 #ifndef __SND_AR_TOKENS_H__ 20 #define __SND_AR_TOKENS_H__ 21 #define APM_SUB_GRAPH_PERF_MODE_LOW_POWER 0x1 22 #define APM_SUB_GRAPH_PERF_MODE_LOW_LATENCY 0x2 23 #define APM_SUB_GRAPH_DIRECTION_TX 0x1 24 #define APM_SUB_GRAPH_DIRECTION_RX 0x2 25 #define APM_SUB_GRAPH_SID_AUDIO_PLAYBACK 0x1 26 #define APM_SUB_GRAPH_SID_AUDIO_RECORD 0x2 27 #define APM_SUB_GRAPH_SID_VOICE_CALL 0x3 28 #define APM_CONTAINER_CAP_ID_PP 0x1 29 #define APM_CONTAINER_CAP_ID_CD 0x2 30 #define APM_CONTAINER_CAP_ID_EP 0x3 31 #define APM_CONTAINER_CAP_ID_OLC 0x4 32 #define APM_CONT_GRAPH_POS_STREAM 0x1 33 #define APM_CONT_GRAPH_POS_PER_STR_PER_DEV 0x2 34 #define APM_CONT_GRAPH_POS_STR_DEV 0x3 35 #define APM_CONT_GRAPH_POS_GLOBAL_DEV 0x4 36 #define APM_PROC_DOMAIN_ID_MDSP 0x1 37 #define APM_PROC_DOMAIN_ID_ADSP 0x2 38 #define APM_PROC_DOMAIN_ID_SDSP 0x4 39 #define APM_PROC_DOMAIN_ID_CDSP 0x5 40 #define PCM_INTERLEAVED 1 41 #define PCM_DEINTERLEAVED_PACKED 2 42 #define PCM_DEINTERLEAVED_UNPACKED 3 43 #define AR_I2S_WS_SRC_EXTERNAL 0 44 #define AR_I2S_WS_SRC_INTERNAL 1 45 enum ar_event_types { 46 AR_EVENT_NONE = 0, 47 AR_PGA_DAPM_EVENT 48 }; 49 #define SND_SOC_AR_TPLG_FE_BE_GRAPH_CTL_MIX 256 50 #define SND_SOC_AR_TPLG_VOL_CTL 257 51 #define AR_TKN_DAI_INDEX 1 52 #define AR_TKN_U32_SUB_GRAPH_INSTANCE_ID 2 53 #define AR_TKN_U32_SUB_GRAPH_PERF_MODE 3 54 #define AR_TKN_U32_SUB_GRAPH_DIRECTION 4 55 #define AR_TKN_U32_SUB_GRAPH_SCENARIO_ID 5 56 #define AR_TKN_U32_CONTAINER_INSTANCE_ID 100 57 #define AR_TKN_U32_CONTAINER_CAPABILITY_ID 101 58 #define AR_TKN_U32_CONTAINER_STACK_SIZE 102 59 #define AR_TKN_U32_CONTAINER_GRAPH_POS 103 60 #define AR_TKN_U32_CONTAINER_PROC_DOMAIN 104 61 #define AR_TKN_U32_MODULE_ID 200 62 #define AR_TKN_U32_MODULE_INSTANCE_ID 201 63 #define AR_TKN_U32_MODULE_MAX_IP_PORTS 202 64 #define AR_TKN_U32_MODULE_MAX_OP_PORTS 203 65 #define AR_TKN_U32_MODULE_IN_PORTS 204 66 #define AR_TKN_U32_MODULE_OUT_PORTS 205 67 #define AR_TKN_U32_MODULE_SRC_OP_PORT_ID 206 68 #define AR_TKN_U32_MODULE_DST_IN_PORT_ID 207 69 #define AR_TKN_U32_MODULE_SRC_INSTANCE_ID 208 70 #define AR_TKN_U32_MODULE_DST_INSTANCE_ID 209 71 #define AR_TKN_U32_MODULE_SRC_OP_PORT_ID1 210 72 #define AR_TKN_U32_MODULE_DST_IN_PORT_ID1 211 73 #define AR_TKN_U32_MODULE_DST_INSTANCE_ID1 212 74 #define AR_TKN_U32_MODULE_SRC_OP_PORT_ID2 213 75 #define AR_TKN_U32_MODULE_DST_IN_PORT_ID2 214 76 #define AR_TKN_U32_MODULE_DST_INSTANCE_ID2 215 77 #define AR_TKN_U32_MODULE_SRC_OP_PORT_ID3 216 78 #define AR_TKN_U32_MODULE_DST_IN_PORT_ID3 217 79 #define AR_TKN_U32_MODULE_DST_INSTANCE_ID3 218 80 #define AR_TKN_U32_MODULE_SRC_OP_PORT_ID4 219 81 #define AR_TKN_U32_MODULE_DST_IN_PORT_ID4 220 82 #define AR_TKN_U32_MODULE_DST_INSTANCE_ID4 221 83 #define AR_TKN_U32_MODULE_SRC_OP_PORT_ID5 222 84 #define AR_TKN_U32_MODULE_DST_IN_PORT_ID5 223 85 #define AR_TKN_U32_MODULE_DST_INSTANCE_ID5 224 86 #define AR_TKN_U32_MODULE_SRC_OP_PORT_ID6 225 87 #define AR_TKN_U32_MODULE_DST_IN_PORT_ID6 226 88 #define AR_TKN_U32_MODULE_DST_INSTANCE_ID6 227 89 #define AR_TKN_U32_MODULE_SRC_OP_PORT_ID7 228 90 #define AR_TKN_U32_MODULE_DST_IN_PORT_ID7 229 91 #define AR_TKN_U32_MODULE_DST_INSTANCE_ID7 230 92 #define AR_TKN_U32_MODULE_HW_IF_IDX 250 93 #define AR_TKN_U32_MODULE_HW_IF_TYPE 251 94 #define AR_TKN_U32_MODULE_FMT_INTERLEAVE 252 95 #define AR_TKN_U32_MODULE_FMT_DATA 253 96 #define AR_TKN_U32_MODULE_FMT_SAMPLE_RATE 254 97 #define AR_TKN_U32_MODULE_FMT_BIT_DEPTH 255 98 #define AR_TKN_U32_MODULE_SD_LINE_IDX 256 99 #define AR_TKN_U32_MODULE_WS_SRC 257 100 #define AR_TKN_U32_MODULE_FRAME_SZ_FACTOR 258 101 #define AR_TKN_U32_MODULE_LOG_CODE 259 102 #define AR_TKN_U32_MODULE_LOG_TAP_POINT_ID 260 103 #define AR_TKN_U32_MODULE_LOG_MODE 261 104 #endif 105