1 /**************************************************************************** 2 **************************************************************************** 3 *** 4 *** This header was automatically generated from a Linux kernel header 5 *** of the same name, to make information necessary for userspace to 6 *** call into the kernel available to libc. It contains only constants, 7 *** structures, and macros generated from the original header, and thus, 8 *** contains no copyrightable information. 9 *** 10 *** To edit the content of this header, modify the corresponding 11 *** source file (e.g. under external/kernel-headers/original/) then 12 *** run bionic/libc/kernel/tools/update_all.py 13 *** 14 *** Any manual change here will be lost the next time this script will 15 *** be run. You've been warned! 16 *** 17 **************************************************************************** 18 ****************************************************************************/ 19 #ifndef __LINUX_KVM_RISCV_H 20 #define __LINUX_KVM_RISCV_H 21 #ifndef __ASSEMBLY__ 22 #include <linux/types.h> 23 #include <asm/ptrace.h> 24 #define __KVM_HAVE_READONLY_MEM 25 #define KVM_COALESCED_MMIO_PAGE_OFFSET 1 26 #define KVM_INTERRUPT_SET - 1U 27 #define KVM_INTERRUPT_UNSET - 2U 28 struct kvm_regs { 29 }; 30 struct kvm_fpu { 31 }; 32 struct kvm_debug_exit_arch { 33 }; 34 struct kvm_guest_debug_arch { 35 }; 36 struct kvm_sync_regs { 37 }; 38 struct kvm_sregs { 39 }; 40 struct kvm_riscv_config { 41 unsigned long isa; 42 unsigned long zicbom_block_size; 43 unsigned long mvendorid; 44 unsigned long marchid; 45 unsigned long mimpid; 46 }; 47 struct kvm_riscv_core { 48 struct user_regs_struct regs; 49 unsigned long mode; 50 }; 51 #define KVM_RISCV_MODE_S 1 52 #define KVM_RISCV_MODE_U 0 53 struct kvm_riscv_csr { 54 unsigned long sstatus; 55 unsigned long sie; 56 unsigned long stvec; 57 unsigned long sscratch; 58 unsigned long sepc; 59 unsigned long scause; 60 unsigned long stval; 61 unsigned long sip; 62 unsigned long satp; 63 unsigned long scounteren; 64 }; 65 struct kvm_riscv_timer { 66 __u64 frequency; 67 __u64 time; 68 __u64 compare; 69 __u64 state; 70 }; 71 enum KVM_RISCV_ISA_EXT_ID { 72 KVM_RISCV_ISA_EXT_A = 0, 73 KVM_RISCV_ISA_EXT_C, 74 KVM_RISCV_ISA_EXT_D, 75 KVM_RISCV_ISA_EXT_F, 76 KVM_RISCV_ISA_EXT_H, 77 KVM_RISCV_ISA_EXT_I, 78 KVM_RISCV_ISA_EXT_M, 79 KVM_RISCV_ISA_EXT_SVPBMT, 80 KVM_RISCV_ISA_EXT_SSTC, 81 KVM_RISCV_ISA_EXT_SVINVAL, 82 KVM_RISCV_ISA_EXT_ZIHINTPAUSE, 83 KVM_RISCV_ISA_EXT_ZICBOM, 84 KVM_RISCV_ISA_EXT_MAX, 85 }; 86 #define KVM_RISCV_TIMER_STATE_OFF 0 87 #define KVM_RISCV_TIMER_STATE_ON 1 88 #define KVM_REG_SIZE(id) (1U << (((id) & KVM_REG_SIZE_MASK) >> KVM_REG_SIZE_SHIFT)) 89 #define KVM_REG_RISCV_TYPE_MASK 0x00000000FF000000 90 #define KVM_REG_RISCV_TYPE_SHIFT 24 91 #define KVM_REG_RISCV_CONFIG (0x01 << KVM_REG_RISCV_TYPE_SHIFT) 92 #define KVM_REG_RISCV_CONFIG_REG(name) (offsetof(struct kvm_riscv_config, name) / sizeof(unsigned long)) 93 #define KVM_REG_RISCV_CORE (0x02 << KVM_REG_RISCV_TYPE_SHIFT) 94 #define KVM_REG_RISCV_CORE_REG(name) (offsetof(struct kvm_riscv_core, name) / sizeof(unsigned long)) 95 #define KVM_REG_RISCV_CSR (0x03 << KVM_REG_RISCV_TYPE_SHIFT) 96 #define KVM_REG_RISCV_CSR_REG(name) (offsetof(struct kvm_riscv_csr, name) / sizeof(unsigned long)) 97 #define KVM_REG_RISCV_TIMER (0x04 << KVM_REG_RISCV_TYPE_SHIFT) 98 #define KVM_REG_RISCV_TIMER_REG(name) (offsetof(struct kvm_riscv_timer, name) / sizeof(__u64)) 99 #define KVM_REG_RISCV_FP_F (0x05 << KVM_REG_RISCV_TYPE_SHIFT) 100 #define KVM_REG_RISCV_FP_F_REG(name) (offsetof(struct __riscv_f_ext_state, name) / sizeof(__u32)) 101 #define KVM_REG_RISCV_FP_D (0x06 << KVM_REG_RISCV_TYPE_SHIFT) 102 #define KVM_REG_RISCV_FP_D_REG(name) (offsetof(struct __riscv_d_ext_state, name) / sizeof(__u64)) 103 #define KVM_REG_RISCV_ISA_EXT (0x07 << KVM_REG_RISCV_TYPE_SHIFT) 104 #endif 105 #endif 106