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1// Auto-generated file. Do not edit!
2//   Template: src/f32-igemm/4x2-aarch64-neonfma-cortex-a75.S.in
3//   Generator: tools/xngen
4//
5// Copyright 2019 Google LLC
6//
7// This source code is licensed under the BSD-style license found in the
8// LICENSE file in the root directory of this source tree.
9
10#include <xnnpack/assembly.h>
11
12# void xnn_f32_igemm_minmax_ukernel_4x2__aarch64_neonfma_cortex_a75(
13#     size_t mr,                         x0
14#     size_t nc,                         x1
15#     size_t kc,                         x2 / x0
16#     size_t ks,                         x3 / x9
17#     const float**restrict a,           x4
18#     const float*restrict w,            x5
19#     float*restrict c,                  x6
20#     size_t cm_stride,                  x7
21#     size_t cn_stride,                  [sp] -> x10
22#     size_t a_offset,                   [sp + 8] -> x11
23#     const float* zero,                 [sp + 16] -> x12
24#     const xnn_f32_minmax_params params [sp + 24] -> x8
25
26# d8-d15, x19-x30 need to be preserved if used. x18 is reserved by the OS.
27
28# Register usage
29# A0 x20 v0  v4
30# A1 x13 v1  v5
31# A2 x14 v2  v6
32# A3 x15 v3  v7
33
34# B   x5 v16 v17 v18 v19 v20 v21 v22 v23
35
36# C0  x6 v24 v25
37# C1 x16 v26 v27
38# C2 x17 v28 v29
39# C3  x7 v30 v31
40
41# Clamp v4 v5
42
43
44BEGIN_FUNCTION xnn_f32_igemm_minmax_ukernel_4x2__aarch64_neonfma_cortex_a75
45
46        # Load cn_stride, a_offset
47        LDP     x10, x11, [sp]
48
49        # Load zero, params pointer
50        LDP     x12, x8, [sp, 16]
51
52        # Load min/max values
53        LD2R    {v4.2s, v5.2s}, [x8]
54
55        # Save x20 on stack
56        STR     x20, [sp, -16]!
57
58        # Clamp C pointers
59        CMP     x0, 2                   // if mr < 2
60        ADD     x16, x6, x7             // c1 = c0 + cm_stride
61        CSEL    x16, x6, x16, LO        //   c1 = c0
62
63        ADD     x17, x16, x7            // c2 = c1 + cm_stride
64                                        // if mr <= 2
65        CSEL    x17, x16, x17, LS       //   c2 = c1
66
67        CMP     x0, 4                   // if mr < 4
68        ADD     x7, x17, x7             // c3 = c2 + cm_stride
69        CSEL    x7, x17, x7, LO         //   c3 = c2
70
710:
72        # Load initial bias from w into accumulators
73        LDR     d24, [x5], 8
74        MOV     v26.8b, v24.8b
75        MOV     v28.8b, v24.8b
76        MOV     v30.8b, v24.8b
77        MOVI    v25.2s, 0
78        MOVI    v27.2s, 0
79        MOVI    v29.2s, 0
80        MOVI    v31.2s, 0
81
82        MOV     x9, x3                  // p = ks
83
841:
85        # Load next 4 A pointers
86        LDP     x20, x13, [x4], 16
87        LDP     x14, x15, [x4], 16
88
89        CMP     x20, x12                // if a0 == zero
90        ADD     x20, x20, x11           // a0 += a_offset
91        CSEL    x20, x12, x20, EQ       //   a0 = zero, else += a0 + a_offset
92        CMP     x13, x12                // if a1 == zero
93        ADD     x13, x13, x11           // a1 += a_offset
94        CSEL    x13, x12, x13, EQ       //   a1 = zero, else += a1 + a_offset
95        CMP     x14, x12                // if a2 == zero
96        ADD     x14, x14, x11           // a2 += a_offset
97        CSEL    x14, x12, x14, EQ       //   a2 = zero, else += a2 + a_offset
98        CMP     x15, x12                // if a3 == zero
99        ADD     x15, x15, x11           // a3 += a_offset
100        CSEL    x15, x12, x15, EQ       //   a3 = zero, else += a3 + a_offset
101
102        # Is there at least 8 floats (32 bytes) for prologue + epilogue?
103        SUBS    x0, x2, 32              // k = kc - 32
104        B.LO    5f
105
106        # Prologue
107        # Read first block of 4 A and B.
108        LDR     q0, [x20], 16
109        LDP     d20, d21, [x5], 16
110        LDR     q1, [x13], 16
111        LDR     q2, [x14], 16
112        LDR     q3, [x15], 16
113        LDP     d22, d23, [x5], 16
114
115        # Is there at least 32.  yes do main loop
116        SUBS    x0, x0, 32
117        B.LO    3f
118
119        # Main loop - 8 floats of A (32 bytes)
1202:
121        # First block of 4.  FMA for first 4, loads for 2nd block of 4.
122        FMLA    v24.2s, v20.2s, v0.s[0]
123        LDR     q4, [x20], 16
124        FMLA    v26.2s, v20.2s, v1.s[0]
125        FMLA    v28.2s, v20.2s, v2.s[0]
126        LDR     d16, [x5, 0]
127        FMLA    v30.2s, v20.2s, v3.s[0]
128        FMLA    v25.2s, v21.2s, v0.s[1]
129        LDR     q5, [x13], 16
130        FMLA    v27.2s, v21.2s, v1.s[1]
131        FMLA    v29.2s, v21.2s, v2.s[1]
132        LDR     q6, [x14], 16
133        FMLA    v31.2s, v21.2s, v3.s[1]
134        FMLA    v24.2s, v22.2s, v0.s[2]
135        LDR     q7, [x15], 16
136        FMLA    v26.2s, v22.2s, v1.s[2]
137        FMLA    v28.2s, v22.2s, v2.s[2]
138        LDR     d17, [x5, 8]
139        FMLA    v30.2s, v22.2s, v3.s[2]
140        FMLA    v25.2s, v23.2s, v0.s[3]
141        LDR     d18, [x5, 16]
142        FMLA    v27.2s, v23.2s, v1.s[3]
143        FMLA    v29.2s, v23.2s, v2.s[3]
144        LDR     d19, [x5, 24]
145        FMLA    v31.2s, v23.2s, v3.s[3]
146
147        # Second block of 4.  FMA for second 4, loads for 1st block of 4.
148        FMLA    v24.2s, v16.2s, v4.s[0]
149        LDR     q0, [x20], 16
150        FMLA    v26.2s, v16.2s, v5.s[0]
151        FMLA    v28.2s, v16.2s, v6.s[0]
152        LDR     d20, [x5, 32]
153        FMLA    v30.2s, v16.2s, v7.s[0]
154        FMLA    v25.2s, v17.2s, v4.s[1]
155        LDR     q1, [x13], 16
156        FMLA    v27.2s, v17.2s, v5.s[1]
157        FMLA    v29.2s, v17.2s, v6.s[1]
158        LDR     q2, [x14], 16
159        FMLA    v31.2s, v17.2s, v7.s[1]
160        FMLA    v24.2s, v18.2s, v4.s[2]
161        LDR     q3, [x15], 16
162        FMLA    v26.2s, v18.2s, v5.s[2]
163        FMLA    v28.2s, v18.2s, v6.s[2]
164        LDR     d21, [x5, 40]
165        FMLA    v30.2s, v18.2s, v7.s[2]
166        SUBS    x0, x0, 32
167        FMLA    v25.2s, v19.2s, v4.s[3]
168        LDR     d22, [x5, 48]
169        FMLA    v27.2s, v19.2s, v5.s[3]
170        LDR     d23, [x5, 56]
171        FMLA    v29.2s, v19.2s, v6.s[3]
172        ADD     x5, x5, 64
173        FMLA    v31.2s, v19.2s, v7.s[3]
174        B.HS    2b
175
1763:
177        # Epilogue
178        # First block of 4.  FMA for first 4, loads for 2nd block of 4.
179        FMLA    v24.2s, v20.2s, v0.s[0]
180        LDR     q4, [x20], 16
181        FMLA    v26.2s, v20.2s, v1.s[0]
182        FMLA    v28.2s, v20.2s, v2.s[0]
183        LDR     d16, [x5, 0]
184        FMLA    v30.2s, v20.2s, v3.s[0]
185        FMLA    v25.2s, v21.2s, v0.s[1]
186        LDR     q5, [x13], 16
187        FMLA    v27.2s, v21.2s, v1.s[1]
188        FMLA    v29.2s, v21.2s, v2.s[1]
189        LDR     q6, [x14], 16
190        FMLA    v31.2s, v21.2s, v3.s[1]
191        FMLA    v24.2s, v22.2s, v0.s[2]
192        LDR     q7, [x15], 16
193        FMLA    v26.2s, v22.2s, v1.s[2]
194        FMLA    v28.2s, v22.2s, v2.s[2]
195        LDR     d17, [x5, 8]
196        FMLA    v30.2s, v22.2s, v3.s[2]
197        FMLA    v25.2s, v23.2s, v0.s[3]
198        LDR     d18, [x5, 16]
199        FMLA    v27.2s, v23.2s, v1.s[3]
200        FMLA    v29.2s, v23.2s, v2.s[3]
201        LDR     d19, [x5, 24]
202        FMLA    v31.2s, v23.2s, v3.s[3]
203
204        # Second block of 4.  FMA for second 4, no loads
205        FMLA    v24.2s, v16.2s, v4.s[0]
206        FMLA    v26.2s, v16.2s, v5.s[0]
207        FMLA    v28.2s, v16.2s, v6.s[0]
208        FMLA    v30.2s, v16.2s, v7.s[0]
209        FMLA    v25.2s, v17.2s, v4.s[1]
210        FMLA    v27.2s, v17.2s, v5.s[1]
211        FMLA    v29.2s, v17.2s, v6.s[1]
212        FMLA    v31.2s, v17.2s, v7.s[1]
213        FMLA    v24.2s, v18.2s, v4.s[2]
214        FMLA    v26.2s, v18.2s, v5.s[2]
215        FMLA    v28.2s, v18.2s, v6.s[2]
216        ADDS    x0, x0, 32
217        FMLA    v30.2s, v18.2s, v7.s[2]
218        FMLA    v25.2s, v19.2s, v4.s[3]
219        ADD     x5, x5, 32
220        FMLA    v27.2s, v19.2s, v5.s[3]
221        FMLA    v29.2s, v19.2s, v6.s[3]
222        LD2R    {v4.2s, v5.2s}, [x8]     // Load min/max values
223        FMLA    v31.2s, v19.2s, v7.s[3]
224
225        # Is there a remainder? up to 8 floats (32 bytes)
226        B.NE    5f
227
2284:
229        # ks loop
230        SUBS    x9, x9, 32              // ks -= MR * sizeof(void*)
231        B.HI    1b
232
233        FADD    v24.2s, v24.2s, v25.2s
234        FADD    v26.2s, v26.2s, v27.2s
235        FADD    v28.2s, v28.2s, v29.2s
236        FADD    v30.2s, v30.2s, v31.2s
237
238        # Clamp
239        FMAX    v24.2s, v24.2s, v4.2s
240        FMAX    v26.2s, v26.2s, v4.2s
241        FMAX    v28.2s, v28.2s, v4.2s
242        FMAX    v30.2s, v30.2s, v4.2s
243        SUBS    x1, x1, 2
244        FMIN    v24.2s, v24.2s, v5.2s
245        FMIN    v26.2s, v26.2s, v5.2s
246        FMIN    v28.2s, v28.2s, v5.2s
247        FMIN    v30.2s, v30.2s, v5.2s
248
249        # Store full 4 x 2
250        B.LO    8f
251
252        STR     d30, [x7]
253        ADD     x7,  x7, x10
254        STR     d28, [x17]
255        ADD     x17, x17, x10
256        STR     d26, [x16]
257        ADD     x16,  x16, x10
258        STR     d24, [x6]
259        ADD     x6,  x6, x10
260        SUB     x4, x4, x3              // a -= ks
261
262        # nc loop
263        B.HI    0b
264
265        # Restore x20 from stack
266        LDR     x20, [sp], 16
267        RET
268
2695:
270        # Remainder- 4 floats of A (16 bytes)
271        TBZ     x0, 4, 6f
272
273        LDR     q0, [x20], 16
274        LDP     d20, d21, [x5], 16
275        LDR     q1, [x13], 16
276        LDR     q2, [x14], 16
277        LDR     q3, [x15], 16
278        LDP     d22, d23, [x5], 16
279        FMLA    v24.2s, v20.2s, v0.s[0]
280        FMLA    v26.2s, v20.2s, v1.s[0]
281        FMLA    v28.2s, v20.2s, v2.s[0]
282        FMLA    v30.2s, v20.2s, v3.s[0]
283        FMLA    v25.2s, v21.2s, v0.s[1]
284        FMLA    v27.2s, v21.2s, v1.s[1]
285        FMLA    v29.2s, v21.2s, v2.s[1]
286        FMLA    v31.2s, v21.2s, v3.s[1]
287        FMLA    v24.2s, v22.2s, v0.s[2]
288        FMLA    v26.2s, v22.2s, v1.s[2]
289        FMLA    v28.2s, v22.2s, v2.s[2]
290        FMLA    v30.2s, v22.2s, v3.s[2]
291        FMLA    v25.2s, v23.2s, v0.s[3]
292        FMLA    v27.2s, v23.2s, v1.s[3]
293        FMLA    v29.2s, v23.2s, v2.s[3]
294        FMLA    v31.2s, v23.2s, v3.s[3]
295
2966:
297        # Remainder- 2 floats of A (8 bytes)
298        TBZ     x0, 3, 7f
299
300        LDR     d0, [x20], 8
301        LDP     d20, d21, [x5], 16
302        LDR     d1, [x13], 8
303        LDR     d2, [x14], 8
304        LDR     d3, [x15], 8
305        FMLA    v24.2s, v20.2s, v0.s[0]
306        FMLA    v26.2s, v20.2s, v1.s[0]
307        FMLA    v28.2s, v20.2s, v2.s[0]
308        FMLA    v30.2s, v20.2s, v3.s[0]
309        FMLA    v25.2s, v21.2s, v0.s[1]
310        FMLA    v27.2s, v21.2s, v1.s[1]
311        FMLA    v29.2s, v21.2s, v2.s[1]
312        FMLA    v31.2s, v21.2s, v3.s[1]
313
3147:
315        # Remainder- 1 float of A (4 bytes)
316        TBZ     x0, 2, 4b
317
318        LDR     s0, [x20], 4
319        LDR     d20, [x5], 8
320        LDR     s1, [x13], 4
321        LDR     s2, [x14], 4
322        LDR     s3, [x15], 4
323        FMLA    v24.2s, v20.2s, v0.s[0]
324        FMLA    v26.2s, v20.2s, v1.s[0]
325        FMLA    v28.2s, v20.2s, v2.s[0]
326        FMLA    v30.2s, v20.2s, v3.s[0]
327        B       4b
328
329        # Store odd width
3308:
331        STR     s30,  [x7]
332        STR     s28, [x17]
333        STR     s26, [x16]
334        STR     s24,  [x6]
335
336        # Restore x20 from stack
337        LDR     x20, [sp], 16
338        RET
339
340END_FUNCTION xnn_f32_igemm_minmax_ukernel_4x2__aarch64_neonfma_cortex_a75
341
342#ifdef __ELF__
343.section ".note.GNU-stack","",%progbits
344#endif
345