1 // Auto-generated file. Do not edit!
2 // Template: src/f32-raddstoreexpminusmax/neon-p5.c.in
3 // Generator: tools/xngen
4 //
5 // Copyright 2020 Google LLC
6 //
7 // This source code is licensed under the BSD-style license found in the
8 // LICENSE file in the root directory of this source tree.
9
10 #include <assert.h>
11
12 #include <arm_neon.h>
13
14 #include <xnnpack/common.h>
15 #include <xnnpack/raddstoreexpminusmax.h>
16
17
xnn_f32_raddstoreexpminusmax_ukernel__neon_rr2_p5_x8(size_t elements,const float * input,const float * max,float * output,float * sum,const union xnn_f32_expminus_params params[restrict XNN_MIN_ELEMENTS (1)])18 void xnn_f32_raddstoreexpminusmax_ukernel__neon_rr2_p5_x8(
19 size_t elements,
20 const float* input,
21 const float* max,
22 float* output,
23 float* sum,
24 const union xnn_f32_expminus_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_OOB_READS
25 {
26 assert(elements % sizeof(float) == 0);
27
28 const float32x4_t vi_max = vld1q_dup_f32(max);
29 const float32x4_t vlog2e = vld1q_dup_f32(¶ms->neon_rr2_p5.log2e);
30 const float32x4_t vmagic_bias = vld1q_dup_f32(¶ms->neon_rr2_p5.magic_bias);
31 const float32x4_t vminus_ln2_hi = vld1q_dup_f32(¶ms->neon_rr2_p5.minus_ln2_hi);
32 const float32x4_t vminus_ln2_lo = vld1q_dup_f32(¶ms->neon_rr2_p5.minus_ln2_lo);
33 const float32x4_t vc5 = vld1q_dup_f32(¶ms->neon_rr2_p5.c5);
34 const float32x4_t vc4 = vld1q_dup_f32(¶ms->neon_rr2_p5.c4);
35 const float32x4_t vc3 = vld1q_dup_f32(¶ms->neon_rr2_p5.c3);
36 const float32x4_t vc2 = vld1q_dup_f32(¶ms->neon_rr2_p5.c2);
37 const float32x4_t vc1 = vld1q_dup_f32(¶ms->neon_rr2_p5.c1);
38 const float32x4_t vdenorm_cutoff = vld1q_dup_f32(¶ms->neon_rr2_p5.denorm_cutoff);
39
40 float32x4_t vacc0 = vmovq_n_f32(0.0f);
41 for (; elements >= 8 * sizeof(float); elements -= 8 * sizeof(float)) {
42 const float32x4_t vi0123 = vld1q_f32(input); input += 4;
43 const float32x4_t vi4567 = vld1q_f32(input); input += 4;
44
45 const float32x4_t vx0123 = vsubq_f32(vi0123, vi_max);
46 const float32x4_t vx4567 = vsubq_f32(vi4567, vi_max);
47
48 float32x4_t vn0123 = vmlaq_f32(vmagic_bias, vx0123, vlog2e);
49 float32x4_t vn4567 = vmlaq_f32(vmagic_bias, vx4567, vlog2e);
50
51 const float32x4_t vs0123 = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vn0123), 23));
52 const float32x4_t vs4567 = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vn4567), 23));
53
54 vn0123 = vsubq_f32(vn0123, vmagic_bias);
55 vn4567 = vsubq_f32(vn4567, vmagic_bias);
56
57 float32x4_t vt0123 = vmlaq_f32(vx0123, vn0123, vminus_ln2_hi);
58 float32x4_t vt4567 = vmlaq_f32(vx4567, vn4567, vminus_ln2_hi);
59
60 vt0123 = vmlaq_f32(vt0123, vn0123, vminus_ln2_lo);
61 vt4567 = vmlaq_f32(vt4567, vn4567, vminus_ln2_lo);
62
63 float32x4_t vp0123 = vmlaq_f32(vc4, vc5, vt0123);
64 float32x4_t vp4567 = vmlaq_f32(vc4, vc5, vt4567);
65
66 vp0123 = vmlaq_f32(vc3, vp0123, vt0123);
67 vp4567 = vmlaq_f32(vc3, vp4567, vt4567);
68
69 vp0123 = vmlaq_f32(vc2, vp0123, vt0123);
70 vp4567 = vmlaq_f32(vc2, vp4567, vt4567);
71
72 vp0123 = vmlaq_f32(vc1, vp0123, vt0123);
73 vp4567 = vmlaq_f32(vc1, vp4567, vt4567);
74
75 vt0123 = vmulq_f32(vt0123, vs0123);
76 vt4567 = vmulq_f32(vt4567, vs4567);
77
78 float32x4_t vf0123 = vmlaq_f32(vs0123, vp0123, vt0123);
79 float32x4_t vf4567 = vmlaq_f32(vs4567, vp4567, vt4567);
80
81 vf0123 = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf0123), vcltq_f32(vx0123, vdenorm_cutoff)));
82 vf4567 = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf4567), vcltq_f32(vx4567, vdenorm_cutoff)));
83
84 vst1q_f32(output, vf0123); output += 4;
85 vst1q_f32(output, vf4567); output += 4;
86
87 vacc0 = vaddq_f32(vacc0, vf0123);
88 vacc0 = vaddq_f32(vacc0, vf4567);
89 }
90
91 float32x4_t vacc = vacc0;
92 for (; elements >= 4 * sizeof(float); elements -= 4 * sizeof(float)) {
93 const float32x4_t vi = vld1q_f32(input); input += 4;
94
95 const float32x4_t vx = vsubq_f32(vi, vi_max);
96
97 float32x4_t vn = vmlaq_f32(vmagic_bias, vx, vlog2e);
98
99 const float32x4_t vs = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vn), 23));
100
101 vn = vsubq_f32(vn, vmagic_bias);
102
103 float32x4_t vt = vmlaq_f32(vx, vn, vminus_ln2_hi);
104 vt = vmlaq_f32(vt, vn, vminus_ln2_lo);
105
106 float32x4_t vp = vmlaq_f32(vc4, vc5, vt);
107 vp = vmlaq_f32(vc3, vp, vt);
108 vp = vmlaq_f32(vc2, vp, vt);
109 vp = vmlaq_f32(vc1, vp, vt);
110
111 vt = vmulq_f32(vt, vs);
112 float32x4_t vf = vmlaq_f32(vs, vp, vt);
113
114 vf = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf), vcltq_f32(vx, vdenorm_cutoff)));
115
116 vst1q_f32(output, vf); output += 4;
117
118 vacc = vaddq_f32(vacc, vf);
119 }
120 #if XNN_ARCH_ARM64
121 float vacc_lo = vaddvq_f32(vacc);
122 #else
123 float32x2_t vacc_lo = vadd_f32(vget_high_f32(vacc), vget_low_f32(vacc));
124 #endif
125 if (elements != 0) {
126 assert(elements >= 1 * sizeof(float));
127 assert(elements <= 3 * sizeof(float));
128 const float32x4_t vi = vld1q_f32(input); input += 4;
129
130 const float32x4_t vx = vsubq_f32(vi, vi_max);
131
132 float32x4_t vn = vmlaq_f32(vmagic_bias, vx, vlog2e);
133
134 const float32x4_t vs = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vn), 23));
135
136 vn = vsubq_f32(vn, vmagic_bias);
137
138 float32x4_t vt = vmlaq_f32(vx, vn, vminus_ln2_hi);
139 vt = vmlaq_f32(vt, vn, vminus_ln2_lo);
140
141 float32x4_t vp = vmlaq_f32(vc4, vc5, vt);
142 vp = vmlaq_f32(vc3, vp, vt);
143 vp = vmlaq_f32(vc2, vp, vt);
144 vp = vmlaq_f32(vc1, vp, vt);
145
146 vt = vmulq_f32(vt, vs);
147 float32x4_t vf = vmlaq_f32(vs, vp, vt);
148
149 vf = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf), vcltq_f32(vx, vdenorm_cutoff)));
150
151 float32x2_t vf_lo = vget_low_f32(vf);
152 if (elements & (2 * sizeof(float))) {
153 vst1_f32(output, vf_lo); output += 2;
154
155 #if XNN_ARCH_ARM64
156 vacc_lo += vaddv_f32(vf_lo);
157 #else
158 vacc_lo = vadd_f32(vacc_lo, vf_lo);
159 #endif
160
161 vf_lo = vget_high_f32(vf);
162 }
163 if (elements & (1 * sizeof(float))) {
164 vst1_lane_f32(output, vf_lo, 0);
165
166 #if XNN_ARCH_ARM64
167 vacc_lo += vget_lane_f32(vf_lo, 0);
168 #else
169 vacc_lo = vadd_f32(vacc_lo, vreinterpret_f32_u64(vshl_n_u64(vreinterpret_u64_f32(vf_lo), 32)));
170 #endif
171 }
172 }
173 #if XNN_ARCH_ARM64
174 *sum = vacc_lo;
175 #else
176 vst1_lane_f32(sum, vpadd_f32(vacc_lo, vacc_lo), 0);
177 #endif
178 }
179