1 // Auto-generated file. Do not edit!
2 // Template: src/qs8-gemm/c4-neon-mull-shuffle.c.in
3 // Generator: tools/xngen
4 //
5 // Copyright 2021 Google LLC
6 //
7 // This source code is licensed under the BSD-style license found in the
8 // LICENSE file in the root directory of this source tree.
9
10 #include <assert.h>
11
12 #include <arm_neon.h>
13
14 #include <xnnpack/gemm.h>
15 #include <xnnpack/math.h>
16
17
xnn_qs8_gemm_minmax_rndnu_ukernel_1x16c4s2__neon_mull(size_t mr,size_t nc,size_t kc,const int8_t * restrict a,size_t a_stride,const void * restrict w,int8_t * restrict c,size_t cm_stride,size_t cn_stride,const union xnn_qs8_conv_minmax_params params[restrict XNN_MIN_ELEMENTS (1)])18 void xnn_qs8_gemm_minmax_rndnu_ukernel_1x16c4s2__neon_mull(
19 size_t mr,
20 size_t nc,
21 size_t kc,
22 const int8_t* restrict a,
23 size_t a_stride,
24 const void* restrict w,
25 int8_t* restrict c,
26 size_t cm_stride,
27 size_t cn_stride,
28 const union xnn_qs8_conv_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_OOB_READS
29 {
30 assert(mr != 0);
31 assert(mr <= 1);
32 assert(nc != 0);
33 assert(kc != 0);
34 assert(kc % sizeof(int8_t) == 0);
35 assert(a != NULL);
36 assert(w != NULL);
37 assert(c != NULL);
38
39 const int8_t* a0 = a;
40 int8_t* c0 = c;
41
42 kc = round_up_po2(kc, 8 * sizeof(int8_t));
43 do {
44 int32x4_t vacc0x01 = vreinterpretq_s32_u64(vmovl_u32(vld1_u32(w))); w = (const int32_t*) w + 2;
45 int32x4_t vacc0x23 = vreinterpretq_s32_u64(vmovl_u32(vld1_u32(w))); w = (const int32_t*) w + 2;
46 int32x4_t vacc0x45 = vreinterpretq_s32_u64(vmovl_u32(vld1_u32(w))); w = (const int32_t*) w + 2;
47 int32x4_t vacc0x67 = vreinterpretq_s32_u64(vmovl_u32(vld1_u32(w))); w = (const int32_t*) w + 2;
48 int32x4_t vacc0x89 = vreinterpretq_s32_u64(vmovl_u32(vld1_u32(w))); w = (const int32_t*) w + 2;
49 int32x4_t vacc0xAB = vreinterpretq_s32_u64(vmovl_u32(vld1_u32(w))); w = (const int32_t*) w + 2;
50 int32x4_t vacc0xCD = vreinterpretq_s32_u64(vmovl_u32(vld1_u32(w))); w = (const int32_t*) w + 2;
51 int32x4_t vacc0xEF = vreinterpretq_s32_u64(vmovl_u32(vld1_u32(w))); w = (const int32_t*) w + 2;
52
53 size_t k = kc;
54 do {
55 int8x8_t va0x0 = vld1_s8(a0); a0 += 8;
56
57 const int8x8_t vb01c0x0 = vld1_s8(w); w = (const int8_t*) w + 8;
58 const int8x8_t vb23c0x0 = vld1_s8(w); w = (const int8_t*) w + 8;
59 const int8x8_t vb45c0x0 = vld1_s8(w); w = (const int8_t*) w + 8;
60 const int8x8_t vb67c0x0 = vld1_s8(w); w = (const int8_t*) w + 8;
61 const int8x8_t vb89c0x0 = vld1_s8(w); w = (const int8_t*) w + 8;
62 const int8x8_t vbABc0x0 = vld1_s8(w); w = (const int8_t*) w + 8;
63 const int8x8_t vbCDc0x0 = vld1_s8(w); w = (const int8_t*) w + 8;
64 const int8x8_t vbEFc0x0 = vld1_s8(w); w = (const int8_t*) w + 8;
65 const int8x8_t vb01c1x0 = vld1_s8(w); w = (const int8_t*) w + 8;
66 const int8x8_t vb23c1x0 = vld1_s8(w); w = (const int8_t*) w + 8;
67 const int8x8_t vb45c1x0 = vld1_s8(w); w = (const int8_t*) w + 8;
68 const int8x8_t vb67c1x0 = vld1_s8(w); w = (const int8_t*) w + 8;
69 const int8x8_t vb89c1x0 = vld1_s8(w); w = (const int8_t*) w + 8;
70 const int8x8_t vbABc1x0 = vld1_s8(w); w = (const int8_t*) w + 8;
71 const int8x8_t vbCDc1x0 = vld1_s8(w); w = (const int8_t*) w + 8;
72 const int8x8_t vbEFc1x0 = vld1_s8(w); w = (const int8_t*) w + 8;
73
74 int16x8_t vprod0x01c0 = vmull_s8(vb01c0x0, va0x0);
75 vacc0x01 = vpadalq_s16(vacc0x01, vprod0x01c0);
76 int16x8_t vprod0x23c0 = vmull_s8(vb23c0x0, va0x0);
77 vacc0x23 = vpadalq_s16(vacc0x23, vprod0x23c0);
78 int16x8_t vprod0x45c0 = vmull_s8(vb45c0x0, va0x0);
79 vacc0x45 = vpadalq_s16(vacc0x45, vprod0x45c0);
80 int16x8_t vprod0x67c0 = vmull_s8(vb67c0x0, va0x0);
81 vacc0x67 = vpadalq_s16(vacc0x67, vprod0x67c0);
82 int16x8_t vprod0x89c0 = vmull_s8(vb89c0x0, va0x0);
83 vacc0x89 = vpadalq_s16(vacc0x89, vprod0x89c0);
84 int16x8_t vprod0xABc0 = vmull_s8(vbABc0x0, va0x0);
85 vacc0xAB = vpadalq_s16(vacc0xAB, vprod0xABc0);
86 int16x8_t vprod0xCDc0 = vmull_s8(vbCDc0x0, va0x0);
87 vacc0xCD = vpadalq_s16(vacc0xCD, vprod0xCDc0);
88 int16x8_t vprod0xEFc0 = vmull_s8(vbEFc0x0, va0x0);
89 vacc0xEF = vpadalq_s16(vacc0xEF, vprod0xEFc0);
90 va0x0 = vext_s8(va0x0, va0x0, 4);
91 int16x8_t vprod0x01c1 = vmull_s8(vb01c1x0, va0x0);
92 vacc0x01 = vpadalq_s16(vacc0x01, vprod0x01c1);
93 int16x8_t vprod0x23c1 = vmull_s8(vb23c1x0, va0x0);
94 vacc0x23 = vpadalq_s16(vacc0x23, vprod0x23c1);
95 int16x8_t vprod0x45c1 = vmull_s8(vb45c1x0, va0x0);
96 vacc0x45 = vpadalq_s16(vacc0x45, vprod0x45c1);
97 int16x8_t vprod0x67c1 = vmull_s8(vb67c1x0, va0x0);
98 vacc0x67 = vpadalq_s16(vacc0x67, vprod0x67c1);
99 int16x8_t vprod0x89c1 = vmull_s8(vb89c1x0, va0x0);
100 vacc0x89 = vpadalq_s16(vacc0x89, vprod0x89c1);
101 int16x8_t vprod0xABc1 = vmull_s8(vbABc1x0, va0x0);
102 vacc0xAB = vpadalq_s16(vacc0xAB, vprod0xABc1);
103 int16x8_t vprod0xCDc1 = vmull_s8(vbCDc1x0, va0x0);
104 vacc0xCD = vpadalq_s16(vacc0xCD, vprod0xCDc1);
105 int16x8_t vprod0xEFc1 = vmull_s8(vbEFc1x0, va0x0);
106 vacc0xEF = vpadalq_s16(vacc0xEF, vprod0xEFc1);
107
108 k -= 8 * sizeof(int8_t);
109 } while (k != 0);
110
111 #if XNN_ARCH_ARM64
112 int32x4_t vacc0x0123 = vpaddq_s32(vacc0x01, vacc0x23);
113 int32x4_t vacc0x4567 = vpaddq_s32(vacc0x45, vacc0x67);
114 int32x4_t vacc0x89AB = vpaddq_s32(vacc0x89, vacc0xAB);
115 int32x4_t vacc0xCDEF = vpaddq_s32(vacc0xCD, vacc0xEF);
116 #else
117 const int32x2_t vsum0x01 = vpadd_s32(vget_low_s32(vacc0x01), vget_high_s32(vacc0x01));
118 const int32x2_t vsum0x23 = vpadd_s32(vget_low_s32(vacc0x23), vget_high_s32(vacc0x23));
119 int32x4_t vacc0x0123 = vcombine_s32(vsum0x01, vsum0x23);
120 const int32x2_t vsum0x45 = vpadd_s32(vget_low_s32(vacc0x45), vget_high_s32(vacc0x45));
121 const int32x2_t vsum0x67 = vpadd_s32(vget_low_s32(vacc0x67), vget_high_s32(vacc0x67));
122 int32x4_t vacc0x4567 = vcombine_s32(vsum0x45, vsum0x67);
123 const int32x2_t vsum0x89 = vpadd_s32(vget_low_s32(vacc0x89), vget_high_s32(vacc0x89));
124 const int32x2_t vsum0xAB = vpadd_s32(vget_low_s32(vacc0xAB), vget_high_s32(vacc0xAB));
125 int32x4_t vacc0x89AB = vcombine_s32(vsum0x89, vsum0xAB);
126 const int32x2_t vsum0xCD = vpadd_s32(vget_low_s32(vacc0xCD), vget_high_s32(vacc0xCD));
127 const int32x2_t vsum0xEF = vpadd_s32(vget_low_s32(vacc0xEF), vget_high_s32(vacc0xEF));
128 int32x4_t vacc0xCDEF = vcombine_s32(vsum0xCD, vsum0xEF);
129 #endif
130
131 const int32x4_t vright_pre_shift = vld1q_dup_s32(¶ms->rndnu_neon.right_pre_shift);
132 const int32x4_t vmultiplier = vld1q_dup_s32(¶ms->rndnu_neon.multiplier);
133 const int32x4_t vright_post_shift = vld1q_dup_s32(¶ms->rndnu_neon.right_post_shift);
134
135 vacc0x0123 = vqshlq_s32(vacc0x0123, vright_pre_shift);
136 vacc0x4567 = vqshlq_s32(vacc0x4567, vright_pre_shift);
137 vacc0x89AB = vqshlq_s32(vacc0x89AB, vright_pre_shift);
138 vacc0xCDEF = vqshlq_s32(vacc0xCDEF, vright_pre_shift);
139
140 vacc0x0123 = vqdmulhq_s32(vacc0x0123, vmultiplier);
141 vacc0x4567 = vqdmulhq_s32(vacc0x4567, vmultiplier);
142 vacc0x89AB = vqdmulhq_s32(vacc0x89AB, vmultiplier);
143 vacc0xCDEF = vqdmulhq_s32(vacc0xCDEF, vmultiplier);
144
145 vacc0x0123 = vrshlq_s32(vacc0x0123, vright_post_shift);
146 vacc0x4567 = vrshlq_s32(vacc0x4567, vright_post_shift);
147 vacc0x89AB = vrshlq_s32(vacc0x89AB, vright_post_shift);
148 vacc0xCDEF = vrshlq_s32(vacc0xCDEF, vright_post_shift);
149
150 const int16x8_t voutput_zero_point = vld1q_dup_s16(¶ms->rndnu_neon.output_zero_point);
151 #if XNN_ARCH_ARM64
152 int16x8_t vacc0x01234567 = vqmovn_high_s32(vqmovn_s32(vacc0x0123), vacc0x4567);
153 int16x8_t vacc0x89ABCDEF = vqmovn_high_s32(vqmovn_s32(vacc0x89AB), vacc0xCDEF);
154
155 vacc0x01234567 = vqaddq_s16(vacc0x01234567, voutput_zero_point);
156 vacc0x89ABCDEF = vqaddq_s16(vacc0x89ABCDEF, voutput_zero_point);
157
158 int8x16_t vout0x0123456789ABCDEF = vqmovn_high_s16(vqmovn_s16(vacc0x01234567), vacc0x89ABCDEF);
159 #else
160 int16x8_t vacc0x01234567 = vcombine_s16(vqmovn_s32(vacc0x0123), vqmovn_s32(vacc0x4567));
161 int16x8_t vacc0x89ABCDEF = vcombine_s16(vqmovn_s32(vacc0x89AB), vqmovn_s32(vacc0xCDEF));
162
163 vacc0x01234567 = vqaddq_s16(vacc0x01234567, voutput_zero_point);
164 vacc0x89ABCDEF = vqaddq_s16(vacc0x89ABCDEF, voutput_zero_point);
165
166 int8x16_t vout0x0123456789ABCDEF = vcombine_s8(vqmovn_s16(vacc0x01234567), vqmovn_s16(vacc0x89ABCDEF));
167 #endif
168
169 const int8x16_t voutput_min = vld1q_dup_s8(¶ms->rndnu_neon.output_min);
170 vout0x0123456789ABCDEF = vmaxq_s8(vout0x0123456789ABCDEF, voutput_min);
171
172 const int8x16_t voutput_max = vld1q_dup_s8(¶ms->rndnu_neon.output_max);
173 vout0x0123456789ABCDEF = vminq_s8(vout0x0123456789ABCDEF, voutput_max);
174
175 if (nc >= 16) {
176 vst1q_s8(c0 + 0, vout0x0123456789ABCDEF);
177
178 c0 = (int8_t*) ((uintptr_t) c0 + cn_stride);
179
180 a0 = (const int8_t*) ((uintptr_t) a0 - kc);
181
182 nc -= 16;
183 } else {
184 // Final case where not all of the 16 columns fit in the destination.
185 int8x8_t vout0x01234567 = vget_low_s8(vout0x0123456789ABCDEF);
186 if (nc & 8) {
187 vst1_s8(c0, vout0x01234567); c0 += 8;
188 vout0x01234567 = vget_high_s8(vout0x0123456789ABCDEF);
189 }
190 if (nc & 4) {
191 vst1_lane_u32((void*) c0, vreinterpret_u32_s8(vout0x01234567), 0); c0 += 4;
192 vout0x01234567 = vext_s8(vout0x01234567, vout0x01234567, 4);
193 }
194 if (nc & 2) {
195 vst1_lane_u16((void*) c0, vreinterpret_u16_s8(vout0x01234567), 0); c0 += 2;
196 vout0x01234567 = vext_s8(vout0x01234567, vout0x01234567, 2);
197 }
198 if (nc & 1) {
199 vst1_lane_s8(c0, vout0x01234567, 0);
200 }
201
202 nc = 0;
203 }
204 } while (nc != 0);
205 }
206