1 // Auto-generated file. Do not edit!
2 // Template: src/qs8-gemm/c4-neon-mull-shuffle.c.in
3 // Generator: tools/xngen
4 //
5 // Copyright 2021 Google LLC
6 //
7 // This source code is licensed under the BSD-style license found in the
8 // LICENSE file in the root directory of this source tree.
9
10 #include <assert.h>
11
12 #include <arm_neon.h>
13
14 #include <xnnpack/gemm.h>
15 #include <xnnpack/math.h>
16
17
xnn_qs8_gemm_minmax_rndnu_ukernel_1x8c4s2__neon_mull(size_t mr,size_t nc,size_t kc,const int8_t * restrict a,size_t a_stride,const void * restrict w,int8_t * restrict c,size_t cm_stride,size_t cn_stride,const union xnn_qs8_conv_minmax_params params[restrict XNN_MIN_ELEMENTS (1)])18 void xnn_qs8_gemm_minmax_rndnu_ukernel_1x8c4s2__neon_mull(
19 size_t mr,
20 size_t nc,
21 size_t kc,
22 const int8_t* restrict a,
23 size_t a_stride,
24 const void* restrict w,
25 int8_t* restrict c,
26 size_t cm_stride,
27 size_t cn_stride,
28 const union xnn_qs8_conv_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_OOB_READS
29 {
30 assert(mr != 0);
31 assert(mr <= 1);
32 assert(nc != 0);
33 assert(kc != 0);
34 assert(kc % sizeof(int8_t) == 0);
35 assert(a != NULL);
36 assert(w != NULL);
37 assert(c != NULL);
38
39 const int8_t* a0 = a;
40 int8_t* c0 = c;
41
42 kc = round_up_po2(kc, 8 * sizeof(int8_t));
43 do {
44 int32x4_t vacc0x01 = vreinterpretq_s32_u64(vmovl_u32(vld1_u32(w))); w = (const int32_t*) w + 2;
45 int32x4_t vacc0x23 = vreinterpretq_s32_u64(vmovl_u32(vld1_u32(w))); w = (const int32_t*) w + 2;
46 int32x4_t vacc0x45 = vreinterpretq_s32_u64(vmovl_u32(vld1_u32(w))); w = (const int32_t*) w + 2;
47 int32x4_t vacc0x67 = vreinterpretq_s32_u64(vmovl_u32(vld1_u32(w))); w = (const int32_t*) w + 2;
48
49 size_t k = kc;
50 do {
51 int8x8_t va0x0 = vld1_s8(a0); a0 += 8;
52
53 const int8x8_t vb01c0x0 = vld1_s8(w); w = (const int8_t*) w + 8;
54 const int8x8_t vb23c0x0 = vld1_s8(w); w = (const int8_t*) w + 8;
55 const int8x8_t vb45c0x0 = vld1_s8(w); w = (const int8_t*) w + 8;
56 const int8x8_t vb67c0x0 = vld1_s8(w); w = (const int8_t*) w + 8;
57 const int8x8_t vb01c1x0 = vld1_s8(w); w = (const int8_t*) w + 8;
58 const int8x8_t vb23c1x0 = vld1_s8(w); w = (const int8_t*) w + 8;
59 const int8x8_t vb45c1x0 = vld1_s8(w); w = (const int8_t*) w + 8;
60 const int8x8_t vb67c1x0 = vld1_s8(w); w = (const int8_t*) w + 8;
61
62 int16x8_t vprod0x01c0 = vmull_s8(vb01c0x0, va0x0);
63 vacc0x01 = vpadalq_s16(vacc0x01, vprod0x01c0);
64 int16x8_t vprod0x23c0 = vmull_s8(vb23c0x0, va0x0);
65 vacc0x23 = vpadalq_s16(vacc0x23, vprod0x23c0);
66 int16x8_t vprod0x45c0 = vmull_s8(vb45c0x0, va0x0);
67 vacc0x45 = vpadalq_s16(vacc0x45, vprod0x45c0);
68 int16x8_t vprod0x67c0 = vmull_s8(vb67c0x0, va0x0);
69 vacc0x67 = vpadalq_s16(vacc0x67, vprod0x67c0);
70 va0x0 = vext_s8(va0x0, va0x0, 4);
71 int16x8_t vprod0x01c1 = vmull_s8(vb01c1x0, va0x0);
72 vacc0x01 = vpadalq_s16(vacc0x01, vprod0x01c1);
73 int16x8_t vprod0x23c1 = vmull_s8(vb23c1x0, va0x0);
74 vacc0x23 = vpadalq_s16(vacc0x23, vprod0x23c1);
75 int16x8_t vprod0x45c1 = vmull_s8(vb45c1x0, va0x0);
76 vacc0x45 = vpadalq_s16(vacc0x45, vprod0x45c1);
77 int16x8_t vprod0x67c1 = vmull_s8(vb67c1x0, va0x0);
78 vacc0x67 = vpadalq_s16(vacc0x67, vprod0x67c1);
79
80 k -= 8 * sizeof(int8_t);
81 } while (k != 0);
82
83 #if XNN_ARCH_ARM64
84 int32x4_t vacc0x0123 = vpaddq_s32(vacc0x01, vacc0x23);
85 int32x4_t vacc0x4567 = vpaddq_s32(vacc0x45, vacc0x67);
86 #else
87 const int32x2_t vsum0x01 = vpadd_s32(vget_low_s32(vacc0x01), vget_high_s32(vacc0x01));
88 const int32x2_t vsum0x23 = vpadd_s32(vget_low_s32(vacc0x23), vget_high_s32(vacc0x23));
89 int32x4_t vacc0x0123 = vcombine_s32(vsum0x01, vsum0x23);
90 const int32x2_t vsum0x45 = vpadd_s32(vget_low_s32(vacc0x45), vget_high_s32(vacc0x45));
91 const int32x2_t vsum0x67 = vpadd_s32(vget_low_s32(vacc0x67), vget_high_s32(vacc0x67));
92 int32x4_t vacc0x4567 = vcombine_s32(vsum0x45, vsum0x67);
93 #endif
94
95 const int32x4_t vright_pre_shift = vld1q_dup_s32(¶ms->rndnu_neon.right_pre_shift);
96 const int32x4_t vmultiplier = vld1q_dup_s32(¶ms->rndnu_neon.multiplier);
97 const int32x4_t vright_post_shift = vld1q_dup_s32(¶ms->rndnu_neon.right_post_shift);
98
99 vacc0x0123 = vqshlq_s32(vacc0x0123, vright_pre_shift);
100 vacc0x4567 = vqshlq_s32(vacc0x4567, vright_pre_shift);
101
102 vacc0x0123 = vqdmulhq_s32(vacc0x0123, vmultiplier);
103 vacc0x4567 = vqdmulhq_s32(vacc0x4567, vmultiplier);
104
105 vacc0x0123 = vrshlq_s32(vacc0x0123, vright_post_shift);
106 vacc0x4567 = vrshlq_s32(vacc0x4567, vright_post_shift);
107
108 const int16x8_t voutput_zero_point = vld1q_dup_s16(¶ms->rndnu_neon.output_zero_point);
109 #if XNN_ARCH_ARM64
110 int16x8_t vacc0x01234567 = vqmovn_high_s32(vqmovn_s32(vacc0x0123), vacc0x4567);
111
112 vacc0x01234567 = vqaddq_s16(vacc0x01234567, voutput_zero_point);
113
114 int8x8_t vout0x01234567 = vqmovn_s16(vacc0x01234567);
115 #else
116 int16x8_t vacc0x01234567 = vcombine_s16(vqmovn_s32(vacc0x0123), vqmovn_s32(vacc0x4567));
117
118 vacc0x01234567 = vqaddq_s16(vacc0x01234567, voutput_zero_point);
119
120 int8x8_t vout0x01234567 = vqmovn_s16(vacc0x01234567);
121 #endif
122
123 const int8x8_t voutput_min = vld1_dup_s8(¶ms->rndnu_neon.output_min);
124 vout0x01234567 = vmax_s8(vout0x01234567, voutput_min);
125
126 const int8x8_t voutput_max = vld1_dup_s8(¶ms->rndnu_neon.output_max);
127 vout0x01234567 = vmin_s8(vout0x01234567, voutput_max);
128
129 if (nc >= 8) {
130 vst1_s8(c0 + 0, vout0x01234567);
131
132 c0 = (int8_t*) ((uintptr_t) c0 + cn_stride);
133
134 a0 = (const int8_t*) ((uintptr_t) a0 - kc);
135
136 nc -= 8;
137 } else {
138 // Final case where not all of the 8 columns fit in the destination.
139 if (nc & 4) {
140 vst1_lane_u32((void*) c0, vreinterpret_u32_s8(vout0x01234567), 0); c0 += 4;
141 vout0x01234567 = vext_s8(vout0x01234567, vout0x01234567, 4);
142 }
143 if (nc & 2) {
144 vst1_lane_u16((void*) c0, vreinterpret_u16_s8(vout0x01234567), 0); c0 += 2;
145 vout0x01234567 = vext_s8(vout0x01234567, vout0x01234567, 2);
146 }
147 if (nc & 1) {
148 vst1_lane_s8(c0, vout0x01234567, 0);
149 }
150
151 nc = 0;
152 }
153 } while (nc != 0);
154 }
155