1 // Auto-generated file. Do not edit!
2 // Template: src/qs8-gavgpool/multipass-neon.c.in
3 // Generator: tools/xngen
4 //
5 // Copyright 2020 Google LLC
6 //
7 // This source code is licensed under the BSD-style license found in the
8 // LICENSE file in the root directory of this source tree.
9
10 #include <assert.h>
11
12 #include <arm_neon.h>
13
14 #include <xnnpack/gavgpool.h>
15 #include <xnnpack/math.h>
16
17
xnn_qu8_gavgpool_minmax_fp32_ukernel_7p7x__neon_c8(size_t rows,size_t channels,const uint8_t * input,size_t input_stride,const uint8_t * zero,int32_t * buffer,uint8_t * output,const union xnn_qu8_avgpool_minmax_params params[restrict XNN_MIN_ELEMENTS (1)])18 void xnn_qu8_gavgpool_minmax_fp32_ukernel_7p7x__neon_c8(
19 size_t rows,
20 size_t channels,
21 const uint8_t* input,
22 size_t input_stride,
23 const uint8_t* zero,
24 int32_t* buffer,
25 uint8_t* output,
26 const union xnn_qu8_avgpool_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_OOB_READS
27 {
28 assert(rows > 7);
29 assert(channels != 0);
30
31 const uint8_t* i0 = input;
32 const uint8_t* i1 = (const uint8_t*) ((uintptr_t) i0 + input_stride);
33 const uint8_t* i2 = (const uint8_t*) ((uintptr_t) i1 + input_stride);
34 const uint8_t* i3 = (const uint8_t*) ((uintptr_t) i2 + input_stride);
35 const uint8_t* i4 = (const uint8_t*) ((uintptr_t) i3 + input_stride);
36 const uint8_t* i5 = (const uint8_t*) ((uintptr_t) i4 + input_stride);
37 const uint8_t* i6 = (const uint8_t*) ((uintptr_t) i5 + input_stride);
38 const size_t input_increment = 7 * input_stride - round_up_po2(channels, 8) * sizeof(uint8_t);
39
40 const int32x4_t vinit_bias = vld1q_dup_s32(¶ms->fp32_neon.init_bias);
41 int32_t* b = buffer;
42 size_t c = channels;
43 for (; c != 0; c = doz(c, 8)) {
44 const uint8x8_t vi0x01234567 = vld1_u8(i0); i0 += 8;
45 const uint8x8_t vi1x01234567 = vld1_u8(i1); i1 += 8;
46
47 const uint8x8_t vi2x01234567 = vld1_u8(i2); i2 += 8;
48 uint16x8_t vsum01234567 = vaddl_u8(vi0x01234567, vi1x01234567);
49
50 const uint8x8_t vi3x01234567 = vld1_u8(i3); i3 += 8;
51 vsum01234567 = vaddw_u8(vsum01234567, vi2x01234567);
52 const uint8x8_t vi4x01234567 = vld1_u8(i4); i4 += 8;
53 vsum01234567 = vaddw_u8(vsum01234567, vi3x01234567);
54 const uint8x8_t vi5x01234567 = vld1_u8(i5); i5 += 8;
55 vsum01234567 = vaddw_u8(vsum01234567, vi4x01234567);
56 const uint8x8_t vi6x01234567 = vld1_u8(i6); i6 += 8;
57 vsum01234567 = vaddw_u8(vsum01234567, vi5x01234567);
58 vsum01234567 = vaddw_u8(vsum01234567, vi6x01234567);
59
60 const int32x4_t vacc0123 = vreinterpretq_s32_u32(vaddw_u16(vreinterpretq_u32_s32(vinit_bias), vget_low_u16(vsum01234567)));
61 const int32x4_t vacc4567 = vreinterpretq_s32_u32(vaddw_u16(vreinterpretq_u32_s32(vinit_bias), vget_high_u16(vsum01234567)));
62
63 vst1q_s32(b, vacc0123); b += 4;
64 vst1q_s32(b, vacc4567); b += 4;
65 }
66
67 for (rows -= 7; rows > 7; rows -= 7) {
68 i0 = (const uint8_t*) ((uintptr_t) i0 + input_increment);
69 i1 = (const uint8_t*) ((uintptr_t) i1 + input_increment);
70 i2 = (const uint8_t*) ((uintptr_t) i2 + input_increment);
71 i3 = (const uint8_t*) ((uintptr_t) i3 + input_increment);
72 i4 = (const uint8_t*) ((uintptr_t) i4 + input_increment);
73 i5 = (const uint8_t*) ((uintptr_t) i5 + input_increment);
74 i6 = (const uint8_t*) ((uintptr_t) i6 + input_increment);
75
76 int32_t* b = buffer;
77 size_t c = channels;
78 for (; c != 0; c = doz(c, 8)) {
79 const uint8x8_t vi0x01234567 = vld1_u8(i0); i0 += 8;
80 const uint8x8_t vi1x01234567 = vld1_u8(i1); i1 += 8;
81
82 const uint8x8_t vi2x01234567 = vld1_u8(i2); i2 += 8;
83 uint16x8_t vsum01234567 = vaddl_u8(vi0x01234567, vi1x01234567);
84
85 const uint8x8_t vi3x01234567 = vld1_u8(i3); i3 += 8;
86 vsum01234567 = vaddw_u8(vsum01234567, vi2x01234567);
87 const uint8x8_t vi4x01234567 = vld1_u8(i4); i4 += 8;
88 vsum01234567 = vaddw_u8(vsum01234567, vi3x01234567);
89 const uint8x8_t vi5x01234567 = vld1_u8(i5); i5 += 8;
90 vsum01234567 = vaddw_u8(vsum01234567, vi4x01234567);
91 const uint8x8_t vi6x01234567 = vld1_u8(i6); i6 += 8;
92 vsum01234567 = vaddw_u8(vsum01234567, vi5x01234567);
93 int32x4_t vacc0123 = vld1q_s32(b);
94 int32x4_t vacc4567 = vld1q_s32(b + 4);
95 vsum01234567 = vaddw_u8(vsum01234567, vi6x01234567);
96
97 vacc0123 = vreinterpretq_s32_u32(vaddw_u16(vreinterpretq_u32_s32(vacc0123), vget_low_u16(vsum01234567)));
98 vacc4567 = vreinterpretq_s32_u32(vaddw_u16(vreinterpretq_u32_s32(vacc4567), vget_high_u16(vsum01234567)));
99
100 vst1q_s32(b, vacc0123); b += 4;
101 vst1q_s32(b, vacc4567); b += 4;
102 }
103 }
104
105 i0 = (const uint8_t*) ((uintptr_t) i0 + input_increment);
106 i1 = (const uint8_t*) ((uintptr_t) i1 + input_increment);
107 if XNN_UNPREDICTABLE(rows < 2) {
108 i1 = zero;
109 }
110 i2 = (const uint8_t*) ((uintptr_t) i2 + input_increment);
111 if XNN_UNPREDICTABLE(rows <= 2) {
112 i2 = zero;
113 }
114 i3 = (const uint8_t*) ((uintptr_t) i3 + input_increment);
115 if XNN_UNPREDICTABLE(rows < 4) {
116 i3 = zero;
117 }
118 i4 = (const uint8_t*) ((uintptr_t) i4 + input_increment);
119 if XNN_UNPREDICTABLE(rows <= 4) {
120 i4 = zero;
121 }
122 i5 = (const uint8_t*) ((uintptr_t) i5 + input_increment);
123 if XNN_UNPREDICTABLE(rows < 6) {
124 i5 = zero;
125 }
126 i6 = (const uint8_t*) ((uintptr_t) i6 + input_increment);
127 if XNN_UNPREDICTABLE(rows <= 6) {
128 i6 = zero;
129 }
130
131 const float32x4_t vscale = vld1q_dup_f32(¶ms->fp32_neon.scale);
132 const float32x4_t vmagic_bias = vld1q_dup_f32(¶ms->fp32_neon.magic_bias);
133 const int32x4_t vmagic_bias_less_output_zero_point = vld1q_dup_s32(¶ms->fp32_neon.magic_bias_less_output_zero_point);
134 const uint8x8_t voutput_min = vld1_dup_u8(¶ms->fp32_neon.output_min);
135 const uint8x8_t voutput_max = vld1_dup_u8(¶ms->fp32_neon.output_max);
136 for (; channels >= 8; channels -= 8) {
137 const uint8x8_t vi0x01234567 = vld1_u8(i0); i0 += 8;
138 const uint8x8_t vi1x01234567 = vld1_u8(i1); i1 += 8;
139
140 const uint8x8_t vi2x01234567 = vld1_u8(i2); i2 += 8;
141 uint16x8_t vsum01234567 = vaddl_u8(vi0x01234567, vi1x01234567);
142
143 const uint8x8_t vi3x01234567 = vld1_u8(i3); i3 += 8;
144 vsum01234567 = vaddw_u8(vsum01234567, vi2x01234567);
145 const uint8x8_t vi4x01234567 = vld1_u8(i4); i4 += 8;
146 vsum01234567 = vaddw_u8(vsum01234567, vi3x01234567);
147 const uint8x8_t vi5x01234567 = vld1_u8(i5); i5 += 8;
148 vsum01234567 = vaddw_u8(vsum01234567, vi4x01234567);
149 const uint8x8_t vi6x01234567 = vld1_u8(i6); i6 += 8;
150 vsum01234567 = vaddw_u8(vsum01234567, vi5x01234567);
151 int32x4_t vacc0123 = vld1q_s32(buffer); buffer += 4;
152 int32x4_t vacc4567 = vld1q_s32(buffer); buffer += 4;
153 vsum01234567 = vaddw_u8(vsum01234567, vi6x01234567);
154
155 vacc0123 = vreinterpretq_s32_u32(vaddw_u16(vreinterpretq_u32_s32(vacc0123), vget_low_u16(vsum01234567)));
156 vacc4567 = vreinterpretq_s32_u32(vaddw_u16(vreinterpretq_u32_s32(vacc4567), vget_high_u16(vsum01234567)));
157
158 float32x4_t vfpacc0123 = vcvtq_f32_s32(vacc0123);
159 float32x4_t vfpacc4567 = vcvtq_f32_s32(vacc4567);
160
161 vfpacc0123 = vmulq_f32(vfpacc0123, vscale);
162 vfpacc4567 = vmulq_f32(vfpacc4567, vscale);
163
164 vacc0123 = vreinterpretq_s32_f32(vaddq_f32(vfpacc0123, vmagic_bias));
165 vacc4567 = vreinterpretq_s32_f32(vaddq_f32(vfpacc4567, vmagic_bias));
166
167 vacc0123 = vqsubq_s32(vacc0123, vmagic_bias_less_output_zero_point);
168 vacc4567 = vqsubq_s32(vacc4567, vmagic_bias_less_output_zero_point);
169
170 #if XNN_ARCH_ARM64
171 int16x8_t vacc01234567 = vqmovn_high_s32(vqmovn_s32(vacc0123), vacc4567);
172 #else // !XNN_ARCH_ARM64
173 int16x8_t vacc01234567 = vcombine_s16(vqmovn_s32(vacc0123), vqmovn_s32(vacc4567));
174 #endif // !XNN_ARCH_ARM64
175
176
177 #if XNN_ARCH_ARM64
178 uint8x8_t vout01234567 = vqmovun_s16(vacc01234567);
179 #else // !XNN_ARCH_ARM64
180 uint8x8_t vout01234567 = vqmovun_s16(vacc01234567);
181 #endif // !XNN_ARCH_ARM64
182
183 vout01234567 = vmax_u8(vout01234567, voutput_min);
184
185 vout01234567 = vmin_u8(vout01234567, voutput_max);
186
187 vst1_u8(output, vout01234567); output += 8;
188 }
189 if XNN_UNLIKELY(channels != 0) {
190 {
191 const uint8x8_t vi0x01234567 = vld1_u8(i0);
192 const uint8x8_t vi1x01234567 = vld1_u8(i1);
193 const uint8x8_t vi2x01234567 = vld1_u8(i2);
194 uint16x8_t vsum01234567 = vaddl_u8(vi0x01234567, vi1x01234567);
195
196 const uint8x8_t vi3x01234567 = vld1_u8(i3);
197 vsum01234567 = vaddw_u8(vsum01234567, vi2x01234567);
198 const uint8x8_t vi4x01234567 = vld1_u8(i4);
199 vsum01234567 = vaddw_u8(vsum01234567, vi3x01234567);
200 const uint8x8_t vi5x01234567 = vld1_u8(i5);
201 vsum01234567 = vaddw_u8(vsum01234567, vi4x01234567);
202 const uint8x8_t vi6x01234567 = vld1_u8(i6);
203 vsum01234567 = vaddw_u8(vsum01234567, vi5x01234567);
204 int32x4_t vacc0123 = vld1q_s32(buffer); buffer += 4;
205 int32x4_t vacc4567 = vld1q_s32(buffer); buffer += 4;
206 vsum01234567 = vaddw_u8(vsum01234567, vi6x01234567);
207
208 vacc0123 = vreinterpretq_s32_u32(vaddw_u16(vreinterpretq_u32_s32(vacc0123), vget_low_u16(vsum01234567)));
209 vacc4567 = vreinterpretq_s32_u32(vaddw_u16(vreinterpretq_u32_s32(vacc4567), vget_high_u16(vsum01234567)));
210
211 float32x4_t vfpacc0123 = vcvtq_f32_s32(vacc0123);
212 float32x4_t vfpacc4567 = vcvtq_f32_s32(vacc4567);
213
214 vfpacc0123 = vmulq_f32(vfpacc0123, vscale);
215 vfpacc4567 = vmulq_f32(vfpacc4567, vscale);
216
217 vacc0123 = vreinterpretq_s32_f32(vaddq_f32(vfpacc0123, vmagic_bias));
218 vacc4567 = vreinterpretq_s32_f32(vaddq_f32(vfpacc4567, vmagic_bias));
219
220 vacc0123 = vqsubq_s32(vacc0123, vmagic_bias_less_output_zero_point);
221 vacc4567 = vqsubq_s32(vacc4567, vmagic_bias_less_output_zero_point);
222
223 #if XNN_ARCH_ARM64
224 int16x8_t vacc01234567 = vqmovn_high_s32(vqmovn_s32(vacc0123), vacc4567);
225 #else
226 int16x8_t vacc01234567 = vcombine_s16(vqmovn_s32(vacc0123), vqmovn_s32(vacc4567));
227 #endif
228
229 uint8x8_t vout01234567 = vqmovun_s16(vacc01234567);
230 vout01234567 = vmax_u8(vout01234567, voutput_min);
231 vout01234567 = vmin_u8(vout01234567, voutput_max);
232
233 if (channels & 4) {
234 vst1_lane_u32((void*) output, vreinterpret_u32_u8(vout01234567), 0); output += 4;
235 vout01234567 = vext_u8(vout01234567, vout01234567, 4);
236 }
237 if (channels & 2) {
238 vst1_lane_u16((void*) output, vreinterpret_u16_u8(vout01234567), 0); output += 2;
239 vout01234567 = vext_u8(vout01234567, vout01234567, 2);
240 }
241 if (channels & 1) {
242 vst1_lane_u8(output, vout01234567, 0);
243 }
244 }
245 }
246 }
247