1 /* 2 * Copyright (c) 2015-2019, ARM Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #include <drivers/arm/gicv2.h> 8 #include <drivers/arm/gic_common.h> 9 #include <platform_def.h> 10 11 static const interrupt_prop_t qemu_interrupt_props[] = { 12 PLATFORM_G1S_PROPS(GICV2_INTR_GROUP0), 13 PLATFORM_G0_PROPS(GICV2_INTR_GROUP0) 14 }; 15 16 static const struct gicv2_driver_data plat_gicv2_driver_data = { 17 .gicd_base = GICD_BASE, 18 .gicc_base = GICC_BASE, 19 .interrupt_props = qemu_interrupt_props, 20 .interrupt_props_num = ARRAY_SIZE(qemu_interrupt_props), 21 }; 22 plat_qemu_gic_init(void)23void plat_qemu_gic_init(void) 24 { 25 /* Initialize the gic cpu and distributor interfaces */ 26 gicv2_driver_init(&plat_gicv2_driver_data); 27 gicv2_distif_init(); 28 gicv2_pcpu_distif_init(); 29 gicv2_cpuif_enable(); 30 } 31 qemu_pwr_gic_on_finish(void)32void qemu_pwr_gic_on_finish(void) 33 { 34 /* TODO: This setup is needed only after a cold boot */ 35 gicv2_pcpu_distif_init(); 36 37 /* Enable the gic cpu interface */ 38 gicv2_cpuif_enable(); 39 } 40 qemu_pwr_gic_off(void)41void qemu_pwr_gic_off(void) 42 { 43 gicv2_cpuif_disable(); 44 } 45