1 //
2 // Copyright © 2022 Arm Ltd and Contributors. All rights reserved.
3 // SPDX-License-Identifier: MIT
4 //
5
6 #include "RefCastWorkload.hpp"
7 #include "RefWorkloadUtils.hpp"
8 #include <armnnUtils/FloatingPointConverter.hpp>
9 #include <ResolveType.hpp>
10 #include "Encoders.hpp"
11 #include "Decoders.hpp"
12
13 namespace
14 {
Cast(armnn::Decoder<float> & in,armnn::Encoder<float> & out,const uint32_t numElements)15 void Cast(armnn::Decoder<float>& in, armnn::Encoder<float>& out, const uint32_t numElements )
16 {
17 for (unsigned int i = 0; i < numElements; i++)
18 {
19 out.Set(in.Get());
20 ++in;
21 ++out;
22 }
23 }
24 }
25
26 namespace armnn
27 {
28
Execute() const29 void RefCastWorkload::Execute() const
30 {
31 Execute(m_Data.m_Inputs, m_Data.m_Outputs);
32 }
33
ExecuteAsync(ExecutionData & executionData)34 void RefCastWorkload::ExecuteAsync(ExecutionData& executionData)
35 {
36 WorkingMemDescriptor* workingMemDescriptor = static_cast<WorkingMemDescriptor*>(executionData.m_Data);
37 Execute(workingMemDescriptor->m_Inputs, workingMemDescriptor->m_Outputs);
38 }
39
Execute(std::vector<ITensorHandle * > inputs,std::vector<ITensorHandle * > outputs) const40 void RefCastWorkload::Execute(std::vector<ITensorHandle*> inputs, std::vector<ITensorHandle*> outputs) const
41 {
42 ARMNN_SCOPED_PROFILING_EVENT(Compute::CpuRef, "RefCastWorkload_Execute");
43
44 TensorInfo inputTensorInfo(GetTensorInfo(inputs[0]));
45 TensorInfo outputTensorInfo(GetTensorInfo(outputs[0]));
46
47 // Quantization info should set to default values.
48 if (inputTensorInfo.IsQuantized())
49 {
50 inputTensorInfo.SetQuantizationScale(1.0f);
51 inputTensorInfo.SetQuantizationOffset(0);
52 }
53 if (outputTensorInfo.IsQuantized())
54 {
55 outputTensorInfo.SetQuantizationScale(1.0f);
56 outputTensorInfo.SetQuantizationOffset(0);
57 }
58
59 Cast(*MakeDecoder<float>(inputTensorInfo, inputs[0]->Map()),
60 *MakeEncoder<float>(outputTensorInfo, outputs[0]->Map()),
61 inputTensorInfo.GetNumElements());
62 }
63
64 } //namespace armnn