1 /* Capstone Disassembler Engine */
2 /* By Nguyen Anh Quynh <aquynh@gmail.com>, 2013 */
3
4 #include <stdio.h>
5 #include <stdlib.h>
6
7 #include <capstone/platform.h>
8 #include <capstone/capstone.h>
9
10 struct platform {
11 cs_arch arch;
12 cs_mode mode;
13 unsigned char *code;
14 size_t size;
15 const char *comment;
16 cs_opt_type opt_type;
17 cs_opt_value opt_value;
18 };
19
print_string_hex(unsigned char * str,size_t len)20 static void print_string_hex(unsigned char *str, size_t len)
21 {
22 unsigned char *c;
23
24 printf("Code: ");
25 for (c = str; c < str + len; c++) {
26 printf("0x%02x ", *c & 0xff);
27 }
28 printf("\n");
29 }
30
test()31 static void test()
32 {
33 #ifdef CAPSTONE_HAS_X86
34 #define X86_CODE16 "\x8d\x4c\x32\x08\x01\xd8\x81\xc6\x34\x12\x00\x00"
35 #define X86_CODE32 "\xba\xcd\xab\x00\x00\x8d\x4c\x32\x08\x01\xd8\x81\xc6\x34\x12\x00\x00"
36 //#define X86_CODE32 "\x0f\xa7\xc0" // xstorerng
37 #define X86_CODE64 "\x55\x48\x8b\x05\xb8\x13\x00\x00"
38 #endif
39 #ifdef CAPSTONE_HAS_ARM
40 //#define ARM_CODE "\x04\xe0\x2d\xe5"
41 #define ARM_CODE "\xED\xFF\xFF\xEB\x04\xe0\x2d\xe5\x00\x00\x00\x00\xe0\x83\x22\xe5\xf1\x02\x03\x0e\x00\x00\xa0\xe3\x02\x30\xc1\xe7\x00\x00\x53\xe3"
42 #define ARM_CODE2 "\x10\xf1\x10\xe7\x11\xf2\x31\xe7\xdc\xa1\x2e\xf3\xe8\x4e\x62\xf3"
43 #define ARMV8 "\xe0\x3b\xb2\xee\x42\x00\x01\xe1\x51\xf0\x7f\xf5"
44 #define THUMB_MCLASS "\xef\xf3\x02\x80"
45 #define THUMB_CODE "\x70\x47\xeb\x46\x83\xb0\xc9\x68"
46 #define THUMB_CODE2 "\x4f\xf0\x00\x01\xbd\xe8\x00\x88\xd1\xe8\x00\xf0"
47 #endif
48 #ifdef CAPSTONE_HAS_MIPS
49 #define MIPS_CODE "\x0C\x10\x00\x97\x00\x00\x00\x00\x24\x02\x00\x0c\x8f\xa2\x00\x00\x34\x21\x34\x56"
50 #define MIPS_CODE2 "\x56\x34\x21\x34\xc2\x17\x01\x00"
51 #define MIPS_32R6M "\x00\x07\x00\x07\x00\x11\x93\x7c\x01\x8c\x8b\x7c\x00\xc7\x48\xd0"
52 #define MIPS_32R6 "\xec\x80\x00\x19\x7c\x43\x22\xa0"
53 #endif
54 #ifdef CAPSTONE_HAS_ARM64
55 //#define ARM64_CODE "\x00\x40\x21\x4b" // sub w0, w0, w1, uxtw
56 //#define ARM64_CODE "\x21\x7c\x02\x9b" // mul x1, x1, x2
57 //#define ARM64_CODE "\x20\x74\x0b\xd5" // dc zva, x0
58 //#define ARM64_CODE "\xe1\x0b\x40\xb9" // ldr w1, [sp, #0x8]
59 #define ARM64_CODE "\x21\x7c\x02\x9b\x21\x7c\x00\x53\x00\x40\x21\x4b\xe1\x0b\x40\xb9"
60 #endif
61 #ifdef CAPSTONE_HAS_POWERPC
62 #define PPC_CODE "\x80\x20\x00\x00\x80\x3f\x00\x00\x10\x43\x23\x0e\xd0\x44\x00\x80\x4c\x43\x22\x02\x2d\x03\x00\x80\x7c\x43\x20\x14\x7c\x43\x20\x93\x4f\x20\x00\x21\x4c\xc8\x00\x21"
63 #define PPC_CODE2 "\x10\x60\x2a\x10\x10\x64\x28\x88\x7c\x4a\x5d\x0f"
64 #endif
65 #ifdef CAPSTONE_HAS_SPARC
66 #define SPARC_CODE "\x80\xa0\x40\x02\x85\xc2\x60\x08\x85\xe8\x20\x01\x81\xe8\x00\x00\x90\x10\x20\x01\xd5\xf6\x10\x16\x21\x00\x00\x0a\x86\x00\x40\x02\x01\x00\x00\x00\x12\xbf\xff\xff\x10\xbf\xff\xff\xa0\x02\x00\x09\x0d\xbf\xff\xff\xd4\x20\x60\x00\xd4\x4e\x00\x16\x2a\xc2\x80\x03"
67 #define SPARCV9_CODE "\x81\xa8\x0a\x24\x89\xa0\x10\x20\x89\xa0\x1a\x60\x89\xa0\x00\xe0"
68 #endif
69 #ifdef CAPSTONE_HAS_SYSZ
70 #define SYSZ_CODE "\xed\x00\x00\x00\x00\x1a\x5a\x0f\x1f\xff\xc2\x09\x80\x00\x00\x00\x07\xf7\xeb\x2a\xff\xff\x7f\x57\xe3\x01\xff\xff\x7f\x57\xeb\x00\xf0\x00\x00\x24\xb2\x4f\x00\x78"
71 #endif
72 #ifdef CAPSTONE_HAS_XCORE
73 #define XCORE_CODE "\xfe\x0f\xfe\x17\x13\x17\xc6\xfe\xec\x17\x97\xf8\xec\x4f\x1f\xfd\xec\x37\x07\xf2\x45\x5b\xf9\xfa\x02\x06\x1b\x10"
74 #endif
75 #ifdef CAPSTONE_HAS_M68K
76 #define M68K_CODE "\xd4\x40\x87\x5a\x4e\x71\x02\xb4\xc0\xde\xc0\xde\x5c\x00\x1d\x80\x71\x12\x01\x23\xf2\x3c\x44\x22\x40\x49\x0e\x56\x54\xc5\xf2\x3c\x44\x00\x44\x7a\x00\x00\xf2\x00\x0a\x28"
77 #endif
78 #ifdef CAPSTONE_HAS_TMS320C64X
79 #define TMS320C64X_CODE "\x01\xac\x88\x40\x81\xac\x88\x43\x00\x00\x00\x00\x02\x90\x32\x96\x02\x80\x46\x9e\x05\x3c\x83\xe6\x0b\x0c\x8b\x24"
80 #endif
81 #ifdef CAPSTONE_HAS_M680X
82 #define M680X_CODE "\x06\x10\x19\x1a\x55\x1e\x01\x23\xe9\x31\x06\x34\x55\xa6\x81\xa7\x89\x7f\xff\xa6\x9d\x10\x00\xa7\x91\xa6\x9f\x10\x00\x11\xac\x99\x10\x00\x39"
83 #endif
84 #ifdef CAPSTONE_HAS_EVM
85 #define EVM_CODE "\x60\x61"
86 #endif
87
88 #ifdef CAPSTONE_HAS_MOS65XX
89 #define MOS65XX_CODE "\x0d\x34\x12\x00\x81\x65\x6c\x01\x00\x85\xFF\x10\x00\x19\x42\x42\x00\x49\x42"
90 #endif
91
92
93 struct platform {
94 cs_arch arch;
95 cs_mode mode;
96 unsigned char *code;
97 size_t size;
98 const char *comment;
99 cs_opt_type opt_type;
100 cs_opt_value opt_value;
101 };
102 struct platform platforms[] = {
103 #ifdef CAPSTONE_HAS_X86
104 {
105 CS_ARCH_X86,
106 CS_MODE_16,
107 (unsigned char*)X86_CODE16,
108 sizeof(X86_CODE16) - 1,
109 "X86 16bit (Intel syntax)"
110 },
111 {
112 CS_ARCH_X86,
113 CS_MODE_32,
114 (unsigned char*)X86_CODE32,
115 sizeof(X86_CODE32) - 1,
116 "X86 32bit (ATT syntax)",
117 CS_OPT_SYNTAX,
118 CS_OPT_SYNTAX_ATT,
119 },
120 {
121 CS_ARCH_X86,
122 CS_MODE_32,
123 (unsigned char*)X86_CODE32,
124 sizeof(X86_CODE32) - 1,
125 "X86 32 (Intel syntax)"
126 },
127 {
128 CS_ARCH_X86,
129 CS_MODE_32,
130 (unsigned char*)X86_CODE32,
131 sizeof(X86_CODE32) - 1,
132 "X86 32 (MASM syntax)",
133 CS_OPT_SYNTAX,
134 CS_OPT_SYNTAX_MASM,
135 },
136 {
137 CS_ARCH_X86,
138 CS_MODE_64,
139 (unsigned char*)X86_CODE64,
140 sizeof(X86_CODE64) - 1,
141 "X86 64 (Intel syntax)"
142 },
143 #endif
144 #ifdef CAPSTONE_HAS_ARM
145 {
146 CS_ARCH_ARM,
147 CS_MODE_ARM,
148 (unsigned char*)ARM_CODE,
149 sizeof(ARM_CODE) - 1,
150 "ARM"
151 },
152 {
153 CS_ARCH_ARM,
154 CS_MODE_THUMB,
155 (unsigned char*)THUMB_CODE2,
156 sizeof(THUMB_CODE2) - 1,
157 "THUMB-2"
158 },
159 {
160 CS_ARCH_ARM,
161 CS_MODE_ARM,
162 (unsigned char*)ARM_CODE2,
163 sizeof(ARM_CODE2) - 1,
164 "ARM: Cortex-A15 + NEON"
165 },
166 {
167 CS_ARCH_ARM,
168 CS_MODE_THUMB,
169 (unsigned char*)THUMB_CODE,
170 sizeof(THUMB_CODE) - 1,
171 "THUMB"
172 },
173 {
174 CS_ARCH_ARM,
175 (cs_mode)(CS_MODE_THUMB + CS_MODE_MCLASS),
176 (unsigned char*)THUMB_MCLASS,
177 sizeof(THUMB_MCLASS) - 1,
178 "Thumb-MClass"
179 },
180 {
181 CS_ARCH_ARM,
182 (cs_mode)(CS_MODE_ARM + CS_MODE_V8),
183 (unsigned char*)ARMV8,
184 sizeof(ARMV8) - 1,
185 "Arm-V8"
186 },
187 #endif
188 #ifdef CAPSTONE_HAS_MIPS
189 {
190 CS_ARCH_MIPS,
191 (cs_mode)(CS_MODE_MIPS32 + CS_MODE_BIG_ENDIAN),
192 (unsigned char*)MIPS_CODE,
193 sizeof(MIPS_CODE) - 1,
194 "MIPS-32 (Big-endian)"
195 },
196 {
197 CS_ARCH_MIPS,
198 (cs_mode)(CS_MODE_MIPS64 + CS_MODE_LITTLE_ENDIAN),
199 (unsigned char*)MIPS_CODE2,
200 sizeof(MIPS_CODE2) - 1,
201 "MIPS-64-EL (Little-endian)"
202 },
203 {
204 CS_ARCH_MIPS,
205 (cs_mode)(CS_MODE_MIPS32R6 + CS_MODE_MICRO + CS_MODE_BIG_ENDIAN),
206 (unsigned char*)MIPS_32R6M,
207 sizeof(MIPS_32R6M) - 1,
208 "MIPS-32R6 | Micro (Big-endian)"
209 },
210 {
211 CS_ARCH_MIPS,
212 (cs_mode)(CS_MODE_MIPS32R6 + CS_MODE_BIG_ENDIAN),
213 (unsigned char*)MIPS_32R6,
214 sizeof(MIPS_32R6) - 1,
215 "MIPS-32R6 (Big-endian)"
216 },
217 #endif
218 #ifdef CAPSTONE_HAS_ARM64
219 {
220 CS_ARCH_ARM64,
221 CS_MODE_ARM,
222 (unsigned char*)ARM64_CODE,
223 sizeof(ARM64_CODE) - 1,
224 "ARM-64"
225 },
226 #endif
227 #ifdef CAPSTONE_HAS_POWERPC
228 {
229 CS_ARCH_PPC,
230 CS_MODE_BIG_ENDIAN,
231 (unsigned char*)PPC_CODE,
232 sizeof(PPC_CODE) - 1,
233 "PPC-64"
234 },
235 {
236 CS_ARCH_PPC,
237 CS_MODE_BIG_ENDIAN,
238 (unsigned char*)PPC_CODE,
239 sizeof(PPC_CODE) - 1,
240 "PPC-64, print register with number only",
241 CS_OPT_SYNTAX,
242 CS_OPT_SYNTAX_NOREGNAME
243 },
244 {
245 CS_ARCH_PPC,
246 CS_MODE_BIG_ENDIAN + CS_MODE_QPX,
247 (unsigned char*)PPC_CODE2,
248 sizeof(PPC_CODE2) - 1,
249 "PPC-64 + QPX",
250 },
251 #endif
252 #ifdef CAPSTONE_HAS_SPARC
253 {
254 CS_ARCH_SPARC,
255 CS_MODE_BIG_ENDIAN,
256 (unsigned char*)SPARC_CODE,
257 sizeof(SPARC_CODE) - 1,
258 "Sparc"
259 },
260 {
261 CS_ARCH_SPARC,
262 (cs_mode)(CS_MODE_BIG_ENDIAN + CS_MODE_V9),
263 (unsigned char*)SPARCV9_CODE,
264 sizeof(SPARCV9_CODE) - 1,
265 "SparcV9"
266 },
267 #endif
268 #ifdef CAPSTONE_HAS_SYSZ
269 {
270 CS_ARCH_SYSZ,
271 (cs_mode)0,
272 (unsigned char*)SYSZ_CODE,
273 sizeof(SYSZ_CODE) - 1,
274 "SystemZ"
275 },
276 #endif
277 #ifdef CAPSTONE_HAS_XCORE
278 {
279 CS_ARCH_XCORE,
280 (cs_mode)0,
281 (unsigned char*)XCORE_CODE,
282 sizeof(XCORE_CODE) - 1,
283 "XCore"
284 },
285 #endif
286 #ifdef CAPSTONE_HAS_M68K
287 {
288 CS_ARCH_M68K,
289 (cs_mode)(CS_MODE_BIG_ENDIAN | CS_MODE_M68K_040),
290 (unsigned char*)M68K_CODE,
291 sizeof(M68K_CODE) - 1,
292 "M68K",
293 },
294 #endif
295 #ifdef CAPSTONE_HAS_TMS320C64X
296 {
297 CS_ARCH_TMS320C64X,
298 0,
299 (unsigned char*)TMS320C64X_CODE,
300 sizeof(TMS320C64X_CODE) - 1,
301 "TMS320C64x",
302 },
303 #endif
304 #ifdef CAPSTONE_HAS_M680X
305 {
306 CS_ARCH_M680X,
307 (cs_mode)(CS_MODE_M680X_6809),
308 (unsigned char*)M680X_CODE,
309 sizeof(M680X_CODE) - 1,
310 "M680X_M6809",
311 },
312 #endif
313 #ifdef CAPSTONE_HAS_EVM
314 {
315 CS_ARCH_EVM,
316 0,
317 (unsigned char*)EVM_CODE,
318 sizeof(EVM_CODE) - 1,
319 "EVM",
320 },
321 #endif
322 #ifdef CAPSTONE_HAS_MOS65XX
323 {
324 CS_ARCH_MOS65XX,
325 0,
326 (unsigned char *)MOS65XX_CODE,
327 sizeof(MOS65XX_CODE) - 1,
328 "MOS65XX"
329 },
330 #endif
331 };
332
333 csh handle;
334 uint64_t address = 0x1000;
335 cs_insn *insn;
336 int i;
337 size_t count;
338 cs_err err;
339
340 for (i = 0; i < sizeof(platforms)/sizeof(platforms[0]); i++) {
341 printf("****************\n");
342 printf("Platform: %s\n", platforms[i].comment);
343 err = cs_open(platforms[i].arch, platforms[i].mode, &handle);
344 if (err) {
345 printf("Failed on cs_open() with error returned: %u\n", err);
346 abort();
347 }
348
349 if (platforms[i].opt_type)
350 cs_option(handle, platforms[i].opt_type, platforms[i].opt_value);
351
352 count = cs_disasm(handle, platforms[i].code, platforms[i].size, address, 0, &insn);
353 if (count) {
354 size_t j;
355
356 print_string_hex(platforms[i].code, platforms[i].size);
357 printf("Disasm:\n");
358
359 for (j = 0; j < count; j++) {
360 printf("0x%" PRIx64 ":\t%s\t\t%s\n",
361 insn[j].address, insn[j].mnemonic, insn[j].op_str);
362 }
363
364 // print out the next offset, after the last insn
365 printf("0x%" PRIx64 ":\n", insn[j-1].address + insn[j-1].size);
366
367 // free memory allocated by cs_disasm()
368 cs_free(insn, count);
369 } else {
370 printf("****************\n");
371 printf("Platform: %s\n", platforms[i].comment);
372 print_string_hex(platforms[i].code, platforms[i].size);
373 printf("ERROR: Failed to disasm given code!\n");
374 abort();
375 }
376
377 printf("\n");
378
379 cs_close(&handle);
380 }
381 }
382
main()383 int main()
384 {
385 test();
386
387 return 0;
388 }
389