1 /*
2 * Copyright © 2008 Keith Packard
3 *
4 * Permission to use, copy, modify, distribute, and sell this software and its
5 * documentation for any purpose is hereby granted without fee, provided that
6 * the above copyright notice appear in all copies and that both that copyright
7 * notice and this permission notice appear in supporting documentation, and
8 * that the name of the copyright holders not be used in advertising or
9 * publicity pertaining to distribution of the software without specific,
10 * written prior permission. The copyright holders make no representations
11 * about the suitability of this software for any purpose. It is provided "as
12 * is" without express or implied warranty.
13 *
14 * THE COPYRIGHT HOLDERS DISCLAIM ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
15 * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
16 * EVENT SHALL THE COPYRIGHT HOLDERS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
17 * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
18 * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
19 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE
20 * OF THIS SOFTWARE.
21 */
22
23 #include <stdio.h>
24 #include <stdlib.h>
25 #include <string.h>
26 #include <getopt.h>
27 #include <unistd.h>
28 #include <stdarg.h>
29
30 #include "brw_compat.h"
31 #include "brw_context.h"
32 #include "brw_defines.h"
33
34 const struct opcode_desc opcode_descs[128] = {
35 [BRW_OPCODE_MOV] = { .name = "mov", .nsrc = 1, .ndst = 1 },
36 [BRW_OPCODE_FRC] = { .name = "frc", .nsrc = 1, .ndst = 1 },
37 [BRW_OPCODE_RNDU] = { .name = "rndu", .nsrc = 1, .ndst = 1 },
38 [BRW_OPCODE_RNDD] = { .name = "rndd", .nsrc = 1, .ndst = 1 },
39 [BRW_OPCODE_RNDE] = { .name = "rnde", .nsrc = 1, .ndst = 1 },
40 [BRW_OPCODE_RNDZ] = { .name = "rndz", .nsrc = 1, .ndst = 1 },
41 [BRW_OPCODE_NOT] = { .name = "not", .nsrc = 1, .ndst = 1 },
42 [BRW_OPCODE_LZD] = { .name = "lzd", .nsrc = 1, .ndst = 1 },
43
44 [BRW_OPCODE_MUL] = { .name = "mul", .nsrc = 2, .ndst = 1 },
45 [BRW_OPCODE_MAC] = { .name = "mac", .nsrc = 2, .ndst = 1 },
46 [BRW_OPCODE_MACH] = { .name = "mach", .nsrc = 2, .ndst = 1 },
47 [BRW_OPCODE_LINE] = { .name = "line", .nsrc = 2, .ndst = 1 },
48 [BRW_OPCODE_PLN] = { .name = "pln", .nsrc = 2, .ndst = 1 },
49 [BRW_OPCODE_MAD] = { .name = "mad", .nsrc = 3, .ndst = 1 },
50 [BRW_OPCODE_SAD2] = { .name = "sad2", .nsrc = 2, .ndst = 1 },
51 [BRW_OPCODE_SADA2] = { .name = "sada2", .nsrc = 2, .ndst = 1 },
52 [BRW_OPCODE_DP4] = { .name = "dp4", .nsrc = 2, .ndst = 1 },
53 [BRW_OPCODE_DPH] = { .name = "dph", .nsrc = 2, .ndst = 1 },
54 [BRW_OPCODE_DP3] = { .name = "dp3", .nsrc = 2, .ndst = 1 },
55 [BRW_OPCODE_DP2] = { .name = "dp2", .nsrc = 2, .ndst = 1 },
56 [BRW_OPCODE_MATH] = { .name = "math", .nsrc = 2, .ndst = 1 },
57
58 [BRW_OPCODE_AVG] = { .name = "avg", .nsrc = 2, .ndst = 1 },
59 [BRW_OPCODE_ADD] = { .name = "add", .nsrc = 2, .ndst = 1 },
60 [BRW_OPCODE_SEL] = { .name = "sel", .nsrc = 2, .ndst = 1 },
61 [BRW_OPCODE_AND] = { .name = "and", .nsrc = 2, .ndst = 1 },
62 [BRW_OPCODE_OR] = { .name = "or", .nsrc = 2, .ndst = 1 },
63 [BRW_OPCODE_XOR] = { .name = "xor", .nsrc = 2, .ndst = 1 },
64 [BRW_OPCODE_SHR] = { .name = "shr", .nsrc = 2, .ndst = 1 },
65 [BRW_OPCODE_SHL] = { .name = "shl", .nsrc = 2, .ndst = 1 },
66 [BRW_OPCODE_ASR] = { .name = "asr", .nsrc = 2, .ndst = 1 },
67 [BRW_OPCODE_CMP] = { .name = "cmp", .nsrc = 2, .ndst = 1 },
68 [BRW_OPCODE_CMPN] = { .name = "cmpn", .nsrc = 2, .ndst = 1 },
69
70 [BRW_OPCODE_SEND] = { .name = "send", .nsrc = 1, .ndst = 1 },
71 [BRW_OPCODE_SENDC] = { .name = "sendc", .nsrc = 1, .ndst = 1 },
72 [BRW_OPCODE_NOP] = { .name = "nop", .nsrc = 0, .ndst = 0 },
73 [BRW_OPCODE_JMPI] = { .name = "jmpi", .nsrc = 0, .ndst = 0 },
74 [BRW_OPCODE_IF] = { .name = "if", .nsrc = 2, .ndst = 0 },
75 [BRW_OPCODE_IFF] = { .name = "iff", .nsrc = 2, .ndst = 1 },
76 [BRW_OPCODE_WHILE] = { .name = "while", .nsrc = 2, .ndst = 0 },
77 [BRW_OPCODE_ELSE] = { .name = "else", .nsrc = 2, .ndst = 0 },
78 [BRW_OPCODE_BREAK] = { .name = "break", .nsrc = 2, .ndst = 0 },
79 [BRW_OPCODE_CONTINUE] = { .name = "cont", .nsrc = 1, .ndst = 0 },
80 [BRW_OPCODE_HALT] = { .name = "halt", .nsrc = 1, .ndst = 0 },
81 [BRW_OPCODE_MSAVE] = { .name = "msave", .nsrc = 1, .ndst = 1 },
82 [BRW_OPCODE_PUSH] = { .name = "push", .nsrc = 1, .ndst = 1 },
83 [BRW_OPCODE_MRESTORE] = { .name = "mrest", .nsrc = 1, .ndst = 1 },
84 [BRW_OPCODE_POP] = { .name = "pop", .nsrc = 2, .ndst = 0 },
85 [BRW_OPCODE_WAIT] = { .name = "wait", .nsrc = 1, .ndst = 0 },
86 [BRW_OPCODE_DO] = { .name = "do", .nsrc = 0, .ndst = 0 },
87 [BRW_OPCODE_ENDIF] = { .name = "endif", .nsrc = 2, .ndst = 0 },
88 };
89 static const struct opcode_desc *opcode = opcode_descs;
90
91 static const char * const conditional_modifier[16] = {
92 [BRW_CONDITIONAL_NONE] = "",
93 [BRW_CONDITIONAL_Z] = ".e",
94 [BRW_CONDITIONAL_NZ] = ".ne",
95 [BRW_CONDITIONAL_G] = ".g",
96 [BRW_CONDITIONAL_GE] = ".ge",
97 [BRW_CONDITIONAL_L] = ".l",
98 [BRW_CONDITIONAL_LE] = ".le",
99 [BRW_CONDITIONAL_R] = ".r",
100 [BRW_CONDITIONAL_O] = ".o",
101 [BRW_CONDITIONAL_U] = ".u",
102 };
103
104 static const char * const negate[2] = {
105 [0] = "",
106 [1] = "-",
107 };
108
109 static const char * const _abs[2] = {
110 [0] = "",
111 [1] = "(abs)",
112 };
113
114 static const char * const vert_stride[16] = {
115 [0] = "0",
116 [1] = "1",
117 [2] = "2",
118 [3] = "4",
119 [4] = "8",
120 [5] = "16",
121 [6] = "32",
122 [15] = "VxH",
123 };
124
125 static const char * const width[8] = {
126 [0] = "1",
127 [1] = "2",
128 [2] = "4",
129 [3] = "8",
130 [4] = "16",
131 };
132
133 static const char * const horiz_stride[4] = {
134 [0] = "0",
135 [1] = "1",
136 [2] = "2",
137 [3] = "4"
138 };
139
140 static const char * const chan_sel[4] = {
141 [0] = "x",
142 [1] = "y",
143 [2] = "z",
144 [3] = "w",
145 };
146
147 static const char * const debug_ctrl[2] = {
148 [0] = "",
149 [1] = ".breakpoint"
150 };
151
152 static const char * const saturate[2] = {
153 [0] = "",
154 [1] = ".sat"
155 };
156
157 static const char * const accwr[2] = {
158 [0] = "",
159 [1] = "AccWrEnable"
160 };
161
162 static const char * const wectrl[2] = {
163 [0] = "WE_normal",
164 [1] = "WE_all"
165 };
166
167 static const char * const exec_size[8] = {
168 [0] = "1",
169 [1] = "2",
170 [2] = "4",
171 [3] = "8",
172 [4] = "16",
173 [5] = "32"
174 };
175
176 static const char * const pred_inv[2] = {
177 [0] = "+",
178 [1] = "-"
179 };
180
181 static const char * const pred_ctrl_align16[16] = {
182 [1] = "",
183 [2] = ".x",
184 [3] = ".y",
185 [4] = ".z",
186 [5] = ".w",
187 [6] = ".any4h",
188 [7] = ".all4h",
189 };
190
191 static const char * const pred_ctrl_align1[16] = {
192 [1] = "",
193 [2] = ".anyv",
194 [3] = ".allv",
195 [4] = ".any2h",
196 [5] = ".all2h",
197 [6] = ".any4h",
198 [7] = ".all4h",
199 [8] = ".any8h",
200 [9] = ".all8h",
201 [10] = ".any16h",
202 [11] = ".all16h",
203 };
204
205 static const char * const thread_ctrl[4] = {
206 [0] = "",
207 [2] = "switch"
208 };
209
210 static const char * const compr_ctrl[4] = {
211 [0] = "",
212 [1] = "sechalf",
213 [2] = "compr",
214 [3] = "compr4",
215 };
216
217 static const char * const dep_ctrl[4] = {
218 [0] = "",
219 [1] = "NoDDClr",
220 [2] = "NoDDChk",
221 [3] = "NoDDClr,NoDDChk",
222 };
223
224 static const char * const mask_ctrl[4] = {
225 [0] = "",
226 [1] = "nomask",
227 };
228
229 static const char * const access_mode[2] = {
230 [0] = "align1",
231 [1] = "align16",
232 };
233
234 static const char * const reg_encoding[8] = {
235 [0] = "UD",
236 [1] = "D",
237 [2] = "UW",
238 [3] = "W",
239 [4] = "UB",
240 [5] = "B",
241 [7] = "F"
242 };
243
244 const int reg_type_size[8] = {
245 [0] = 4,
246 [1] = 4,
247 [2] = 2,
248 [3] = 2,
249 [4] = 1,
250 [5] = 1,
251 [7] = 4
252 };
253
254 static const char * const reg_file[4] = {
255 [0] = "A",
256 [1] = "g",
257 [2] = "m",
258 [3] = "imm",
259 };
260
261 static const char * const writemask[16] = {
262 [0x0] = ".",
263 [0x1] = ".x",
264 [0x2] = ".y",
265 [0x3] = ".xy",
266 [0x4] = ".z",
267 [0x5] = ".xz",
268 [0x6] = ".yz",
269 [0x7] = ".xyz",
270 [0x8] = ".w",
271 [0x9] = ".xw",
272 [0xa] = ".yw",
273 [0xb] = ".xyw",
274 [0xc] = ".zw",
275 [0xd] = ".xzw",
276 [0xe] = ".yzw",
277 [0xf] = "",
278 };
279
280 static const char * const end_of_thread[2] = {
281 [0] = "",
282 [1] = "EOT"
283 };
284
285 static const char * const target_function[16] = {
286 [BRW_SFID_NULL] = "null",
287 [BRW_SFID_MATH] = "math",
288 [BRW_SFID_SAMPLER] = "sampler",
289 [BRW_SFID_MESSAGE_GATEWAY] = "gateway",
290 [BRW_SFID_DATAPORT_READ] = "read",
291 [BRW_SFID_DATAPORT_WRITE] = "write",
292 [BRW_SFID_URB] = "urb",
293 [BRW_SFID_THREAD_SPAWNER] = "thread_spawner"
294 };
295
296 static const char * const target_function_gen6[16] = {
297 [BRW_SFID_NULL] = "null",
298 [BRW_SFID_MATH] = "math",
299 [BRW_SFID_SAMPLER] = "sampler",
300 [BRW_SFID_MESSAGE_GATEWAY] = "gateway",
301 [BRW_SFID_URB] = "urb",
302 [BRW_SFID_THREAD_SPAWNER] = "thread_spawner",
303 [GEN6_SFID_DATAPORT_SAMPLER_CACHE] = "sampler",
304 [GEN6_SFID_DATAPORT_RENDER_CACHE] = "render",
305 [GEN6_SFID_DATAPORT_CONSTANT_CACHE] = "const",
306 [GEN7_SFID_DATAPORT_DATA_CACHE] = "data"
307 };
308
309 static const char * const dp_rc_msg_type_gen6[16] = {
310 [BRW_DATAPORT_READ_MESSAGE_OWORD_BLOCK_READ] = "OWORD block read",
311 [GEN6_DATAPORT_READ_MESSAGE_RENDER_UNORM_READ] = "RT UNORM read",
312 [GEN6_DATAPORT_READ_MESSAGE_OWORD_DUAL_BLOCK_READ] = "OWORD dual block read",
313 [GEN6_DATAPORT_READ_MESSAGE_MEDIA_BLOCK_READ] = "media block read",
314 [GEN6_DATAPORT_READ_MESSAGE_OWORD_UNALIGN_BLOCK_READ] = "OWORD unaligned block read",
315 [GEN6_DATAPORT_READ_MESSAGE_DWORD_SCATTERED_READ] = "DWORD scattered read",
316 [GEN6_DATAPORT_WRITE_MESSAGE_DWORD_ATOMIC_WRITE] = "DWORD atomic write",
317 [GEN6_DATAPORT_WRITE_MESSAGE_OWORD_BLOCK_WRITE] = "OWORD block write",
318 [GEN6_DATAPORT_WRITE_MESSAGE_OWORD_DUAL_BLOCK_WRITE] = "OWORD dual block write",
319 [GEN6_DATAPORT_WRITE_MESSAGE_MEDIA_BLOCK_WRITE] = "media block write",
320 [GEN6_DATAPORT_WRITE_MESSAGE_DWORD_SCATTERED_WRITE] = "DWORD scattered write",
321 [GEN6_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_WRITE] = "RT write",
322 [GEN6_DATAPORT_WRITE_MESSAGE_STREAMED_VB_WRITE] = "streamed VB write",
323 [GEN6_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_UNORM_WRITE] = "RT UNORMc write",
324 };
325
326 static const char * const math_function[16] = {
327 [BRW_MATH_FUNCTION_INV] = "inv",
328 [BRW_MATH_FUNCTION_LOG] = "log",
329 [BRW_MATH_FUNCTION_EXP] = "exp",
330 [BRW_MATH_FUNCTION_SQRT] = "sqrt",
331 [BRW_MATH_FUNCTION_RSQ] = "rsq",
332 [BRW_MATH_FUNCTION_SIN] = "sin",
333 [BRW_MATH_FUNCTION_COS] = "cos",
334 [BRW_MATH_FUNCTION_SINCOS] = "sincos",
335 [BRW_MATH_FUNCTION_TAN] = "tan",
336 [BRW_MATH_FUNCTION_POW] = "pow",
337 [BRW_MATH_FUNCTION_INT_DIV_QUOTIENT_AND_REMAINDER] = "intdivmod",
338 [BRW_MATH_FUNCTION_INT_DIV_QUOTIENT] = "intdiv",
339 [BRW_MATH_FUNCTION_INT_DIV_REMAINDER] = "intmod",
340 };
341
342 static const char * const math_saturate[2] = {
343 [0] = "",
344 [1] = "sat"
345 };
346
347 static const char * const math_signed[2] = {
348 [0] = "",
349 [1] = "signed"
350 };
351
352 static const char * const math_scalar[2] = {
353 [0] = "",
354 [1] = "scalar"
355 };
356
357 static const char * const math_precision[2] = {
358 [0] = "",
359 [1] = "partial_precision"
360 };
361
362 static const char * const urb_opcode[2] = {
363 [0] = "urb_write",
364 [1] = "ff_sync",
365 };
366
367 static const char * const urb_swizzle[4] = {
368 [BRW_URB_SWIZZLE_NONE] = "",
369 [BRW_URB_SWIZZLE_INTERLEAVE] = "interleave",
370 [BRW_URB_SWIZZLE_TRANSPOSE] = "transpose",
371 };
372
373 static const char * const urb_allocate[2] = {
374 [0] = "",
375 [1] = "allocate"
376 };
377
378 static const char * const urb_used[2] = {
379 [0] = "",
380 [1] = "used"
381 };
382
383 static const char * const urb_complete[2] = {
384 [0] = "",
385 [1] = "complete"
386 };
387
388 static const char * const sampler_target_format[4] = {
389 [0] = "F",
390 [2] = "UD",
391 [3] = "D"
392 };
393
394
395 static int column;
396
string(FILE * file,const char * string)397 static int string (FILE *file, const char *string)
398 {
399 fputs (string, file);
400 column += strlen (string);
401 return 0;
402 }
403
404 static int format (FILE *f, const char *format, ...) PRINTFLIKE(2, 3);
format(FILE * f,const char * format,...)405 static int format (FILE *f, const char *format, ...)
406 {
407 char buf[1024];
408 va_list args;
409 va_start (args, format);
410
411 vsnprintf (buf, sizeof (buf) - 1, format, args);
412 va_end (args);
413 string (f, buf);
414 return 0;
415 }
416
newline(FILE * f)417 static int newline (FILE *f)
418 {
419 putc ('\n', f);
420 column = 0;
421 return 0;
422 }
423
pad(FILE * f,int c)424 static int pad (FILE *f, int c)
425 {
426 do
427 string (f, " ");
428 while (column < c);
429 return 0;
430 }
431
control(FILE * file,const char * name,const char * const ctrl[],unsigned id,int * space)432 static int control (FILE *file, const char *name, const char * const ctrl[],
433 unsigned id, int *space)
434 {
435 if (!ctrl[id]) {
436 fprintf (file, "*** invalid %s value %d ",
437 name, id);
438 return 1;
439 }
440 if (ctrl[id][0])
441 {
442 if (space && *space)
443 string (file, " ");
444 string (file, ctrl[id]);
445 if (space)
446 *space = 1;
447 }
448 return 0;
449 }
450
print_opcode(FILE * file,int id)451 static int print_opcode (FILE *file, int id)
452 {
453 if (!opcode[id].name) {
454 format (file, "*** invalid opcode value %d ", id);
455 return 1;
456 }
457 string (file, opcode[id].name);
458 return 0;
459 }
460
reg(FILE * file,unsigned _reg_file,unsigned _reg_nr)461 static int reg (FILE *file, unsigned _reg_file, unsigned _reg_nr)
462 {
463 int err = 0;
464
465 /* Clear the Compr4 instruction compression bit. */
466 if (_reg_file == BRW_MESSAGE_REGISTER_FILE)
467 _reg_nr &= ~(1 << 7);
468
469 if (_reg_file == BRW_ARCHITECTURE_REGISTER_FILE) {
470 switch (_reg_nr & 0xf0) {
471 case BRW_ARF_NULL:
472 string (file, "null");
473 return -1;
474 case BRW_ARF_ADDRESS:
475 format (file, "a%d", _reg_nr & 0x0f);
476 break;
477 case BRW_ARF_ACCUMULATOR:
478 format (file, "acc%d", _reg_nr & 0x0f);
479 break;
480 case BRW_ARF_FLAG:
481 format (file, "f%d", _reg_nr & 0x0f);
482 break;
483 case BRW_ARF_MASK:
484 format (file, "mask%d", _reg_nr & 0x0f);
485 break;
486 case BRW_ARF_MASK_STACK:
487 format (file, "msd%d", _reg_nr & 0x0f);
488 break;
489 case BRW_ARF_STATE:
490 format (file, "sr%d", _reg_nr & 0x0f);
491 break;
492 case BRW_ARF_CONTROL:
493 format (file, "cr%d", _reg_nr & 0x0f);
494 break;
495 case BRW_ARF_NOTIFICATION_COUNT:
496 format (file, "n%d", _reg_nr & 0x0f);
497 break;
498 case BRW_ARF_IP:
499 string (file, "ip");
500 return -1;
501 break;
502 default:
503 format (file, "ARF%d", _reg_nr);
504 break;
505 }
506 } else {
507 err |= control (file, "src reg file", reg_file, _reg_file, NULL);
508 format (file, "%d", _reg_nr);
509 }
510 return err;
511 }
512
dest(FILE * file,struct brw_instruction * inst)513 static int dest (FILE *file, struct brw_instruction *inst)
514 {
515 int err = 0;
516
517 if (inst->header.access_mode == BRW_ALIGN_1)
518 {
519 if (inst->bits1.da1.dest_address_mode == BRW_ADDRESS_DIRECT)
520 {
521 err |= reg (file, inst->bits1.da1.dest_reg_file, inst->bits1.da1.dest_reg_nr);
522 if (err == -1)
523 return 0;
524 if (inst->bits1.da1.dest_subreg_nr)
525 format (file, ".%d", inst->bits1.da1.dest_subreg_nr /
526 reg_type_size[inst->bits1.da1.dest_reg_type]);
527 format (file, "<%s>", horiz_stride[inst->bits1.da1.dest_horiz_stride]);
528 err |= control (file, "dest reg encoding", reg_encoding, inst->bits1.da1.dest_reg_type, NULL);
529 }
530 else
531 {
532 string (file, "g[a0");
533 if (inst->bits1.ia1.dest_subreg_nr)
534 format (file, ".%d", inst->bits1.ia1.dest_subreg_nr /
535 reg_type_size[inst->bits1.ia1.dest_reg_type]);
536 if (inst->bits1.ia1.dest_indirect_offset)
537 format (file, " %d", inst->bits1.ia1.dest_indirect_offset);
538 string (file, "]");
539 format (file, "<%s>", horiz_stride[inst->bits1.ia1.dest_horiz_stride]);
540 err |= control (file, "dest reg encoding", reg_encoding, inst->bits1.ia1.dest_reg_type, NULL);
541 }
542 }
543 else
544 {
545 if (inst->bits1.da16.dest_address_mode == BRW_ADDRESS_DIRECT)
546 {
547 err |= reg (file, inst->bits1.da16.dest_reg_file, inst->bits1.da16.dest_reg_nr);
548 if (err == -1)
549 return 0;
550 if (inst->bits1.da16.dest_subreg_nr)
551 format (file, ".%d", inst->bits1.da16.dest_subreg_nr /
552 reg_type_size[inst->bits1.da16.dest_reg_type]);
553 string (file, "<1>");
554 err |= control (file, "writemask", writemask, inst->bits1.da16.dest_writemask, NULL);
555 err |= control (file, "dest reg encoding", reg_encoding, inst->bits1.da16.dest_reg_type, NULL);
556 }
557 else
558 {
559 err = 1;
560 string (file, "Indirect align16 address mode not supported");
561 }
562 }
563
564 return 0;
565 }
566
dest_3src(FILE * file,struct brw_instruction * inst)567 static int dest_3src (FILE *file, struct brw_instruction *inst)
568 {
569 int err = 0;
570 uint32_t reg_file;
571
572 if (inst->bits1.da3src.dest_reg_file)
573 reg_file = BRW_MESSAGE_REGISTER_FILE;
574 else
575 reg_file = BRW_GENERAL_REGISTER_FILE;
576
577 err |= reg (file, reg_file, inst->bits1.da3src.dest_reg_nr);
578 if (err == -1)
579 return 0;
580 if (inst->bits1.da3src.dest_subreg_nr)
581 format (file, ".%d", inst->bits1.da3src.dest_subreg_nr);
582 string (file, "<1>");
583 err |= control (file, "writemask", writemask, inst->bits1.da3src.dest_writemask, NULL);
584 err |= control (file, "dest reg encoding", reg_encoding, BRW_REGISTER_TYPE_F, NULL);
585
586 return 0;
587 }
588
src_align1_region(FILE * file,unsigned _vert_stride,unsigned _width,unsigned _horiz_stride)589 static int src_align1_region (FILE *file,
590 unsigned _vert_stride, unsigned _width, unsigned _horiz_stride)
591 {
592 int err = 0;
593 string (file, "<");
594 err |= control (file, "vert stride", vert_stride, _vert_stride, NULL);
595 string (file, ",");
596 err |= control (file, "width", width, _width, NULL);
597 string (file, ",");
598 err |= control (file, "horiz_stride", horiz_stride, _horiz_stride, NULL);
599 string (file, ">");
600 return err;
601 }
602
src_da1(FILE * file,unsigned type,unsigned _reg_file,unsigned _vert_stride,unsigned _width,unsigned _horiz_stride,unsigned reg_num,unsigned sub_reg_num,unsigned __abs,unsigned _negate)603 static int src_da1 (FILE *file, unsigned type, unsigned _reg_file,
604 unsigned _vert_stride, unsigned _width, unsigned _horiz_stride,
605 unsigned reg_num, unsigned sub_reg_num, unsigned __abs, unsigned _negate)
606 {
607 int err = 0;
608 err |= control (file, "negate", negate, _negate, NULL);
609 err |= control (file, "abs", _abs, __abs, NULL);
610
611 err |= reg (file, _reg_file, reg_num);
612 if (err == -1)
613 return 0;
614 if (sub_reg_num)
615 format (file, ".%d", sub_reg_num / reg_type_size[type]); /* use formal style like spec */
616 src_align1_region (file, _vert_stride, _width, _horiz_stride);
617 err |= control (file, "src reg encoding", reg_encoding, type, NULL);
618 return err;
619 }
620
src_ia1(FILE * file,unsigned type,unsigned _reg_file,int _addr_imm,unsigned _addr_subreg_nr,unsigned _negate,unsigned __abs,unsigned _addr_mode,unsigned _horiz_stride,unsigned _width,unsigned _vert_stride)621 static int src_ia1 (FILE *file,
622 unsigned type,
623 unsigned _reg_file,
624 int _addr_imm,
625 unsigned _addr_subreg_nr,
626 unsigned _negate,
627 unsigned __abs,
628 unsigned _addr_mode,
629 unsigned _horiz_stride,
630 unsigned _width,
631 unsigned _vert_stride)
632 {
633 int err = 0;
634 err |= control (file, "negate", negate, _negate, NULL);
635 err |= control (file, "abs", _abs, __abs, NULL);
636
637 string (file, "g[a0");
638 if (_addr_subreg_nr)
639 format (file, ".%d", _addr_subreg_nr);
640 if (_addr_imm)
641 format (file, " %d", _addr_imm);
642 string (file, "]");
643 src_align1_region (file, _vert_stride, _width, _horiz_stride);
644 err |= control (file, "src reg encoding", reg_encoding, type, NULL);
645 return err;
646 }
647
src_da16(FILE * file,unsigned _reg_type,unsigned _reg_file,unsigned _vert_stride,unsigned _reg_nr,unsigned _subreg_nr,unsigned __abs,unsigned _negate,unsigned swz_x,unsigned swz_y,unsigned swz_z,unsigned swz_w)648 static int src_da16 (FILE *file,
649 unsigned _reg_type,
650 unsigned _reg_file,
651 unsigned _vert_stride,
652 unsigned _reg_nr,
653 unsigned _subreg_nr,
654 unsigned __abs,
655 unsigned _negate,
656 unsigned swz_x,
657 unsigned swz_y,
658 unsigned swz_z,
659 unsigned swz_w)
660 {
661 int err = 0;
662 err |= control (file, "negate", negate, _negate, NULL);
663 err |= control (file, "abs", _abs, __abs, NULL);
664
665 err |= reg (file, _reg_file, _reg_nr);
666 if (err == -1)
667 return 0;
668 if (_subreg_nr)
669 /* bit4 for subreg number byte addressing. Make this same meaning as
670 in da1 case, so output looks consistent. */
671 format (file, ".%d", 16 / reg_type_size[_reg_type]);
672 string (file, "<");
673 err |= control (file, "vert stride", vert_stride, _vert_stride, NULL);
674 string (file, ",4,1>");
675 /*
676 * Three kinds of swizzle display:
677 * identity - nothing printed
678 * 1->all - print the single channel
679 * 1->1 - print the mapping
680 */
681 if (swz_x == BRW_CHANNEL_X &&
682 swz_y == BRW_CHANNEL_Y &&
683 swz_z == BRW_CHANNEL_Z &&
684 swz_w == BRW_CHANNEL_W)
685 {
686 ;
687 }
688 else if (swz_x == swz_y && swz_x == swz_z && swz_x == swz_w)
689 {
690 string (file, ".");
691 err |= control (file, "channel select", chan_sel, swz_x, NULL);
692 }
693 else
694 {
695 string (file, ".");
696 err |= control (file, "channel select", chan_sel, swz_x, NULL);
697 err |= control (file, "channel select", chan_sel, swz_y, NULL);
698 err |= control (file, "channel select", chan_sel, swz_z, NULL);
699 err |= control (file, "channel select", chan_sel, swz_w, NULL);
700 }
701 err |= control (file, "src da16 reg type", reg_encoding, _reg_type, NULL);
702 return err;
703 }
704
src0_3src(FILE * file,struct brw_instruction * inst)705 static int src0_3src (FILE *file, struct brw_instruction *inst)
706 {
707 int err = 0;
708 unsigned swz_x = (inst->bits2.da3src.src0_swizzle >> 0) & 0x3;
709 unsigned swz_y = (inst->bits2.da3src.src0_swizzle >> 2) & 0x3;
710 unsigned swz_z = (inst->bits2.da3src.src0_swizzle >> 4) & 0x3;
711 unsigned swz_w = (inst->bits2.da3src.src0_swizzle >> 6) & 0x3;
712
713 err |= control (file, "negate", negate, inst->bits1.da3src.src0_negate, NULL);
714 err |= control (file, "abs", _abs, inst->bits1.da3src.src0_abs, NULL);
715
716 err |= reg (file, BRW_GENERAL_REGISTER_FILE, inst->bits2.da3src.src0_reg_nr);
717 if (err == -1)
718 return 0;
719 if (inst->bits2.da3src.src0_subreg_nr)
720 format (file, ".%d", inst->bits2.da3src.src0_subreg_nr);
721 string (file, "<4,1,1>");
722 err |= control (file, "src da16 reg type", reg_encoding,
723 BRW_REGISTER_TYPE_F, NULL);
724 /*
725 * Three kinds of swizzle display:
726 * identity - nothing printed
727 * 1->all - print the single channel
728 * 1->1 - print the mapping
729 */
730 if (swz_x == BRW_CHANNEL_X &&
731 swz_y == BRW_CHANNEL_Y &&
732 swz_z == BRW_CHANNEL_Z &&
733 swz_w == BRW_CHANNEL_W)
734 {
735 ;
736 }
737 else if (swz_x == swz_y && swz_x == swz_z && swz_x == swz_w)
738 {
739 string (file, ".");
740 err |= control (file, "channel select", chan_sel, swz_x, NULL);
741 }
742 else
743 {
744 string (file, ".");
745 err |= control (file, "channel select", chan_sel, swz_x, NULL);
746 err |= control (file, "channel select", chan_sel, swz_y, NULL);
747 err |= control (file, "channel select", chan_sel, swz_z, NULL);
748 err |= control (file, "channel select", chan_sel, swz_w, NULL);
749 }
750 return err;
751 }
752
src1_3src(FILE * file,struct brw_instruction * inst)753 static int src1_3src (FILE *file, struct brw_instruction *inst)
754 {
755 int err = 0;
756 unsigned swz_x = (inst->bits2.da3src.src1_swizzle >> 0) & 0x3;
757 unsigned swz_y = (inst->bits2.da3src.src1_swizzle >> 2) & 0x3;
758 unsigned swz_z = (inst->bits2.da3src.src1_swizzle >> 4) & 0x3;
759 unsigned swz_w = (inst->bits2.da3src.src1_swizzle >> 6) & 0x3;
760 unsigned src1_subreg_nr = (inst->bits2.da3src.src1_subreg_nr_low |
761 (inst->bits3.da3src.src1_subreg_nr_high << 2));
762
763 err |= control (file, "negate", negate, inst->bits1.da3src.src1_negate,
764 NULL);
765 err |= control (file, "abs", _abs, inst->bits1.da3src.src1_abs, NULL);
766
767 err |= reg (file, BRW_GENERAL_REGISTER_FILE,
768 inst->bits3.da3src.src1_reg_nr);
769 if (err == -1)
770 return 0;
771 if (src1_subreg_nr)
772 format (file, ".%d", src1_subreg_nr);
773 string (file, "<4,1,1>");
774 err |= control (file, "src da16 reg type", reg_encoding,
775 BRW_REGISTER_TYPE_F, NULL);
776 /*
777 * Three kinds of swizzle display:
778 * identity - nothing printed
779 * 1->all - print the single channel
780 * 1->1 - print the mapping
781 */
782 if (swz_x == BRW_CHANNEL_X &&
783 swz_y == BRW_CHANNEL_Y &&
784 swz_z == BRW_CHANNEL_Z &&
785 swz_w == BRW_CHANNEL_W)
786 {
787 ;
788 }
789 else if (swz_x == swz_y && swz_x == swz_z && swz_x == swz_w)
790 {
791 string (file, ".");
792 err |= control (file, "channel select", chan_sel, swz_x, NULL);
793 }
794 else
795 {
796 string (file, ".");
797 err |= control (file, "channel select", chan_sel, swz_x, NULL);
798 err |= control (file, "channel select", chan_sel, swz_y, NULL);
799 err |= control (file, "channel select", chan_sel, swz_z, NULL);
800 err |= control (file, "channel select", chan_sel, swz_w, NULL);
801 }
802 return err;
803 }
804
805
src2_3src(FILE * file,struct brw_instruction * inst)806 static int src2_3src (FILE *file, struct brw_instruction *inst)
807 {
808 int err = 0;
809 unsigned swz_x = (inst->bits3.da3src.src2_swizzle >> 0) & 0x3;
810 unsigned swz_y = (inst->bits3.da3src.src2_swizzle >> 2) & 0x3;
811 unsigned swz_z = (inst->bits3.da3src.src2_swizzle >> 4) & 0x3;
812 unsigned swz_w = (inst->bits3.da3src.src2_swizzle >> 6) & 0x3;
813
814 err |= control (file, "negate", negate, inst->bits1.da3src.src2_negate,
815 NULL);
816 err |= control (file, "abs", _abs, inst->bits1.da3src.src2_abs, NULL);
817
818 err |= reg (file, BRW_GENERAL_REGISTER_FILE,
819 inst->bits3.da3src.src2_reg_nr);
820 if (err == -1)
821 return 0;
822 if (inst->bits3.da3src.src2_subreg_nr)
823 format (file, ".%d", inst->bits3.da3src.src2_subreg_nr);
824 string (file, "<4,1,1>");
825 err |= control (file, "src da16 reg type", reg_encoding,
826 BRW_REGISTER_TYPE_F, NULL);
827 /*
828 * Three kinds of swizzle display:
829 * identity - nothing printed
830 * 1->all - print the single channel
831 * 1->1 - print the mapping
832 */
833 if (swz_x == BRW_CHANNEL_X &&
834 swz_y == BRW_CHANNEL_Y &&
835 swz_z == BRW_CHANNEL_Z &&
836 swz_w == BRW_CHANNEL_W)
837 {
838 ;
839 }
840 else if (swz_x == swz_y && swz_x == swz_z && swz_x == swz_w)
841 {
842 string (file, ".");
843 err |= control (file, "channel select", chan_sel, swz_x, NULL);
844 }
845 else
846 {
847 string (file, ".");
848 err |= control (file, "channel select", chan_sel, swz_x, NULL);
849 err |= control (file, "channel select", chan_sel, swz_y, NULL);
850 err |= control (file, "channel select", chan_sel, swz_z, NULL);
851 err |= control (file, "channel select", chan_sel, swz_w, NULL);
852 }
853 return err;
854 }
855
imm(FILE * file,unsigned type,struct brw_instruction * inst)856 static int imm (FILE *file, unsigned type, struct brw_instruction *inst) {
857 switch (type) {
858 case BRW_REGISTER_TYPE_UD:
859 format (file, "0x%08xUD", inst->bits3.ud);
860 break;
861 case BRW_REGISTER_TYPE_D:
862 format (file, "%dD", inst->bits3.d);
863 break;
864 case BRW_REGISTER_TYPE_UW:
865 format (file, "0x%04xUW", (uint16_t) inst->bits3.ud);
866 break;
867 case BRW_REGISTER_TYPE_W:
868 format (file, "%dW", (int16_t) inst->bits3.d);
869 break;
870 case BRW_REGISTER_TYPE_UB:
871 format (file, "0x%02xUB", (int8_t) inst->bits3.ud);
872 break;
873 case BRW_REGISTER_TYPE_VF:
874 format (file, "Vector Float");
875 break;
876 case BRW_REGISTER_TYPE_V:
877 format (file, "0x%08xV", inst->bits3.ud);
878 break;
879 case BRW_REGISTER_TYPE_F:
880 format (file, "%-gF", inst->bits3.f);
881 }
882 return 0;
883 }
884
src0(FILE * file,struct brw_instruction * inst)885 static int src0 (FILE *file, struct brw_instruction *inst)
886 {
887 if (inst->bits1.da1.src0_reg_file == BRW_IMMEDIATE_VALUE)
888 return imm (file, inst->bits1.da1.src0_reg_type,
889 inst);
890 else if (inst->header.access_mode == BRW_ALIGN_1)
891 {
892 if (inst->bits2.da1.src0_address_mode == BRW_ADDRESS_DIRECT)
893 {
894 return src_da1 (file,
895 inst->bits1.da1.src0_reg_type,
896 inst->bits1.da1.src0_reg_file,
897 inst->bits2.da1.src0_vert_stride,
898 inst->bits2.da1.src0_width,
899 inst->bits2.da1.src0_horiz_stride,
900 inst->bits2.da1.src0_reg_nr,
901 inst->bits2.da1.src0_subreg_nr,
902 inst->bits2.da1.src0_abs,
903 inst->bits2.da1.src0_negate);
904 }
905 else
906 {
907 return src_ia1 (file,
908 inst->bits1.ia1.src0_reg_type,
909 inst->bits1.ia1.src0_reg_file,
910 inst->bits2.ia1.src0_indirect_offset,
911 inst->bits2.ia1.src0_subreg_nr,
912 inst->bits2.ia1.src0_negate,
913 inst->bits2.ia1.src0_abs,
914 inst->bits2.ia1.src0_address_mode,
915 inst->bits2.ia1.src0_horiz_stride,
916 inst->bits2.ia1.src0_width,
917 inst->bits2.ia1.src0_vert_stride);
918 }
919 }
920 else
921 {
922 if (inst->bits2.da16.src0_address_mode == BRW_ADDRESS_DIRECT)
923 {
924 return src_da16 (file,
925 inst->bits1.da16.src0_reg_type,
926 inst->bits1.da16.src0_reg_file,
927 inst->bits2.da16.src0_vert_stride,
928 inst->bits2.da16.src0_reg_nr,
929 inst->bits2.da16.src0_subreg_nr,
930 inst->bits2.da16.src0_abs,
931 inst->bits2.da16.src0_negate,
932 inst->bits2.da16.src0_swz_x,
933 inst->bits2.da16.src0_swz_y,
934 inst->bits2.da16.src0_swz_z,
935 inst->bits2.da16.src0_swz_w);
936 }
937 else
938 {
939 string (file, "Indirect align16 address mode not supported");
940 return 1;
941 }
942 }
943 }
944
src1(FILE * file,struct brw_instruction * inst)945 static int src1 (FILE *file, struct brw_instruction *inst)
946 {
947 if (inst->bits1.da1.src1_reg_file == BRW_IMMEDIATE_VALUE)
948 return imm (file, inst->bits1.da1.src1_reg_type,
949 inst);
950 else if (inst->header.access_mode == BRW_ALIGN_1)
951 {
952 if (inst->bits3.da1.src1_address_mode == BRW_ADDRESS_DIRECT)
953 {
954 return src_da1 (file,
955 inst->bits1.da1.src1_reg_type,
956 inst->bits1.da1.src1_reg_file,
957 inst->bits3.da1.src1_vert_stride,
958 inst->bits3.da1.src1_width,
959 inst->bits3.da1.src1_horiz_stride,
960 inst->bits3.da1.src1_reg_nr,
961 inst->bits3.da1.src1_subreg_nr,
962 inst->bits3.da1.src1_abs,
963 inst->bits3.da1.src1_negate);
964 }
965 else
966 {
967 return src_ia1 (file,
968 inst->bits1.ia1.src1_reg_type,
969 inst->bits1.ia1.src1_reg_file,
970 inst->bits3.ia1.src1_indirect_offset,
971 inst->bits3.ia1.src1_subreg_nr,
972 inst->bits3.ia1.src1_negate,
973 inst->bits3.ia1.src1_abs,
974 inst->bits3.ia1.src1_address_mode,
975 inst->bits3.ia1.src1_horiz_stride,
976 inst->bits3.ia1.src1_width,
977 inst->bits3.ia1.src1_vert_stride);
978 }
979 }
980 else
981 {
982 if (inst->bits3.da16.src1_address_mode == BRW_ADDRESS_DIRECT)
983 {
984 return src_da16 (file,
985 inst->bits1.da16.src1_reg_type,
986 inst->bits1.da16.src1_reg_file,
987 inst->bits3.da16.src1_vert_stride,
988 inst->bits3.da16.src1_reg_nr,
989 inst->bits3.da16.src1_subreg_nr,
990 inst->bits3.da16.src1_abs,
991 inst->bits3.da16.src1_negate,
992 inst->bits3.da16.src1_swz_x,
993 inst->bits3.da16.src1_swz_y,
994 inst->bits3.da16.src1_swz_z,
995 inst->bits3.da16.src1_swz_w);
996 }
997 else
998 {
999 string (file, "Indirect align16 address mode not supported");
1000 return 1;
1001 }
1002 }
1003 }
1004
1005 int esize[6] = {
1006 [0] = 1,
1007 [1] = 2,
1008 [2] = 4,
1009 [3] = 8,
1010 [4] = 16,
1011 [5] = 32,
1012 };
1013
qtr_ctrl(FILE * file,struct brw_instruction * inst)1014 static int qtr_ctrl(FILE *file, struct brw_instruction *inst)
1015 {
1016 int qtr_ctl = inst->header.compression_control;
1017 int exec_size = esize[inst->header.execution_size];
1018
1019 if (exec_size == 8) {
1020 switch (qtr_ctl) {
1021 case 0:
1022 string (file, " 1Q");
1023 break;
1024 case 1:
1025 string (file, " 2Q");
1026 break;
1027 case 2:
1028 string (file, " 3Q");
1029 break;
1030 case 3:
1031 string (file, " 4Q");
1032 break;
1033 }
1034 } else if (exec_size == 16){
1035 if (qtr_ctl < 2)
1036 string (file, " 1H");
1037 else
1038 string (file, " 2H");
1039 }
1040 return 0;
1041 }
1042
brw_disasm(FILE * file,struct brw_instruction * inst,int gen)1043 int brw_disasm (FILE *file, struct brw_instruction *inst, int gen)
1044 {
1045 int err = 0;
1046 int space = 0;
1047
1048 if (inst->header.predicate_control) {
1049 string (file, "(");
1050 err |= control (file, "predicate inverse", pred_inv, inst->header.predicate_inverse, NULL);
1051 format (file, "f%d", gen >= 7 ? inst->bits2.da1.flag_reg_nr : 0);
1052 if (inst->bits2.da1.flag_subreg_nr)
1053 format (file, ".%d", inst->bits2.da1.flag_subreg_nr);
1054 if (inst->header.access_mode == BRW_ALIGN_1)
1055 err |= control (file, "predicate control align1", pred_ctrl_align1,
1056 inst->header.predicate_control, NULL);
1057 else
1058 err |= control (file, "predicate control align16", pred_ctrl_align16,
1059 inst->header.predicate_control, NULL);
1060 string (file, ") ");
1061 }
1062
1063 err |= print_opcode (file, inst->header.opcode);
1064 err |= control (file, "saturate", saturate, inst->header.saturate, NULL);
1065 err |= control (file, "debug control", debug_ctrl, inst->header.debug_control, NULL);
1066
1067 if (inst->header.opcode == BRW_OPCODE_MATH) {
1068 string (file, " ");
1069 err |= control (file, "function", math_function,
1070 inst->header.destreg__conditionalmod, NULL);
1071 } else if (inst->header.opcode != BRW_OPCODE_SEND &&
1072 inst->header.opcode != BRW_OPCODE_SENDC) {
1073 err |= control (file, "conditional modifier", conditional_modifier,
1074 inst->header.destreg__conditionalmod, NULL);
1075
1076 /* If we're using the conditional modifier, print which flags reg is
1077 * used for it. Note that on gen6+, the embedded-condition SEL and
1078 * control flow doesn't update flags.
1079 */
1080 if (inst->header.destreg__conditionalmod &&
1081 (gen < 6 || (inst->header.opcode != BRW_OPCODE_SEL &&
1082 inst->header.opcode != BRW_OPCODE_IF &&
1083 inst->header.opcode != BRW_OPCODE_WHILE))) {
1084 format (file, ".f%d", gen >= 7 ? inst->bits2.da1.flag_reg_nr : 0);
1085 if (inst->bits2.da1.flag_subreg_nr)
1086 format (file, ".%d", inst->bits2.da1.flag_subreg_nr);
1087 }
1088 }
1089
1090 if (inst->header.opcode != BRW_OPCODE_NOP) {
1091 string (file, "(");
1092 err |= control (file, "execution size", exec_size, inst->header.execution_size, NULL);
1093 string (file, ")");
1094 }
1095
1096 if (inst->header.opcode == BRW_OPCODE_SEND && gen < 6)
1097 format (file, " %d", inst->header.destreg__conditionalmod);
1098
1099 if (opcode[inst->header.opcode].nsrc == 3) {
1100 pad (file, 16);
1101 err |= dest_3src (file, inst);
1102
1103 pad (file, 32);
1104 err |= src0_3src (file, inst);
1105
1106 pad (file, 48);
1107 err |= src1_3src (file, inst);
1108
1109 pad (file, 64);
1110 err |= src2_3src (file, inst);
1111 } else {
1112 if (opcode[inst->header.opcode].ndst > 0) {
1113 pad (file, 16);
1114 err |= dest (file, inst);
1115 } else if (gen == 7 && (inst->header.opcode == BRW_OPCODE_ELSE ||
1116 inst->header.opcode == BRW_OPCODE_ENDIF ||
1117 inst->header.opcode == BRW_OPCODE_WHILE)) {
1118 format (file, " %d", inst->bits3.break_cont.jip);
1119 } else if (gen == 6 && (inst->header.opcode == BRW_OPCODE_IF ||
1120 inst->header.opcode == BRW_OPCODE_ELSE ||
1121 inst->header.opcode == BRW_OPCODE_ENDIF ||
1122 inst->header.opcode == BRW_OPCODE_WHILE)) {
1123 format (file, " %d", inst->bits1.branch_gen6.jump_count);
1124 } else if ((gen >= 6 && (inst->header.opcode == BRW_OPCODE_BREAK ||
1125 inst->header.opcode == BRW_OPCODE_CONTINUE ||
1126 inst->header.opcode == BRW_OPCODE_HALT)) ||
1127 (gen == 7 && inst->header.opcode == BRW_OPCODE_IF)) {
1128 format (file, " %d %d", inst->bits3.break_cont.uip, inst->bits3.break_cont.jip);
1129 } else if (inst->header.opcode == BRW_OPCODE_JMPI) {
1130 format (file, " %d", inst->bits3.d);
1131 }
1132
1133 if (opcode[inst->header.opcode].nsrc > 0) {
1134 pad (file, 32);
1135 err |= src0 (file, inst);
1136 }
1137 if (opcode[inst->header.opcode].nsrc > 1) {
1138 pad (file, 48);
1139 err |= src1 (file, inst);
1140 }
1141 }
1142
1143 if (inst->header.opcode == BRW_OPCODE_SEND ||
1144 inst->header.opcode == BRW_OPCODE_SENDC) {
1145 enum brw_message_target target;
1146
1147 if (gen >= 6)
1148 target = inst->header.destreg__conditionalmod;
1149 else if (gen == 5)
1150 target = inst->bits2.send_gen5.sfid;
1151 else
1152 target = inst->bits3.generic.msg_target;
1153
1154 newline (file);
1155 pad (file, 16);
1156 space = 0;
1157
1158 if (gen >= 6) {
1159 err |= control (file, "target function", target_function_gen6,
1160 target, &space);
1161 } else {
1162 err |= control (file, "target function", target_function,
1163 target, &space);
1164 }
1165
1166 switch (target) {
1167 case BRW_SFID_MATH:
1168 err |= control (file, "math function", math_function,
1169 inst->bits3.math.function, &space);
1170 err |= control (file, "math saturate", math_saturate,
1171 inst->bits3.math.saturate, &space);
1172 err |= control (file, "math signed", math_signed,
1173 inst->bits3.math.int_type, &space);
1174 err |= control (file, "math scalar", math_scalar,
1175 inst->bits3.math.data_type, &space);
1176 err |= control (file, "math precision", math_precision,
1177 inst->bits3.math.precision, &space);
1178 break;
1179 case BRW_SFID_SAMPLER:
1180 if (gen >= 7) {
1181 format (file, " (%d, %d, %d, %d)",
1182 inst->bits3.sampler_gen7.binding_table_index,
1183 inst->bits3.sampler_gen7.sampler,
1184 inst->bits3.sampler_gen7.msg_type,
1185 inst->bits3.sampler_gen7.simd_mode);
1186 } else if (gen >= 5) {
1187 format (file, " (%d, %d, %d, %d)",
1188 inst->bits3.sampler_gen5.binding_table_index,
1189 inst->bits3.sampler_gen5.sampler,
1190 inst->bits3.sampler_gen5.msg_type,
1191 inst->bits3.sampler_gen5.simd_mode);
1192 } else if (0 /* FINISHME: is_g4x */) {
1193 format (file, " (%d, %d)",
1194 inst->bits3.sampler_g4x.binding_table_index,
1195 inst->bits3.sampler_g4x.sampler);
1196 } else {
1197 format (file, " (%d, %d, ",
1198 inst->bits3.sampler.binding_table_index,
1199 inst->bits3.sampler.sampler);
1200 err |= control (file, "sampler target format",
1201 sampler_target_format,
1202 inst->bits3.sampler.return_format, NULL);
1203 string (file, ")");
1204 }
1205 break;
1206 case BRW_SFID_DATAPORT_READ:
1207 if (gen >= 6) {
1208 format (file, " (%d, %d, %d, %d)",
1209 inst->bits3.gen6_dp.binding_table_index,
1210 inst->bits3.gen6_dp.msg_control,
1211 inst->bits3.gen6_dp.msg_type,
1212 inst->bits3.gen6_dp.send_commit_msg);
1213 } else if (gen >= 5 /* FINISHME: || is_g4x */) {
1214 format (file, " (%d, %d, %d)",
1215 inst->bits3.dp_read_gen5.binding_table_index,
1216 inst->bits3.dp_read_gen5.msg_control,
1217 inst->bits3.dp_read_gen5.msg_type);
1218 } else {
1219 format (file, " (%d, %d, %d)",
1220 inst->bits3.dp_read.binding_table_index,
1221 inst->bits3.dp_read.msg_control,
1222 inst->bits3.dp_read.msg_type);
1223 }
1224 break;
1225
1226 case BRW_SFID_DATAPORT_WRITE:
1227 if (gen >= 7) {
1228 format (file, " (");
1229
1230 err |= control (file, "DP rc message type",
1231 dp_rc_msg_type_gen6,
1232 inst->bits3.gen7_dp.msg_type, &space);
1233
1234 format (file, ", %d, %d, %d)",
1235 inst->bits3.gen7_dp.binding_table_index,
1236 inst->bits3.gen7_dp.msg_control,
1237 inst->bits3.gen7_dp.msg_type);
1238 } else if (gen == 6) {
1239 format (file, " (");
1240
1241 err |= control (file, "DP rc message type",
1242 dp_rc_msg_type_gen6,
1243 inst->bits3.gen6_dp.msg_type, &space);
1244
1245 format (file, ", %d, %d, %d, %d)",
1246 inst->bits3.gen6_dp.binding_table_index,
1247 inst->bits3.gen6_dp.msg_control,
1248 inst->bits3.gen6_dp.msg_type,
1249 inst->bits3.gen6_dp.send_commit_msg);
1250 } else {
1251 format (file, " (%d, %d, %d, %d)",
1252 inst->bits3.dp_write.binding_table_index,
1253 (inst->bits3.dp_write.last_render_target << 3) |
1254 inst->bits3.dp_write.msg_control,
1255 inst->bits3.dp_write.msg_type,
1256 inst->bits3.dp_write.send_commit_msg);
1257 }
1258 break;
1259
1260 case BRW_SFID_URB:
1261 if (gen >= 5) {
1262 format (file, " %d", inst->bits3.urb_gen5.offset);
1263 } else {
1264 format (file, " %d", inst->bits3.urb.offset);
1265 }
1266
1267 space = 1;
1268 if (gen >= 5) {
1269 err |= control (file, "urb opcode", urb_opcode,
1270 inst->bits3.urb_gen5.opcode, &space);
1271 }
1272 err |= control (file, "urb swizzle", urb_swizzle,
1273 inst->bits3.urb.swizzle_control, &space);
1274 err |= control (file, "urb allocate", urb_allocate,
1275 inst->bits3.urb.allocate, &space);
1276 err |= control (file, "urb used", urb_used,
1277 inst->bits3.urb.used, &space);
1278 err |= control (file, "urb complete", urb_complete,
1279 inst->bits3.urb.complete, &space);
1280 break;
1281 case BRW_SFID_THREAD_SPAWNER:
1282 break;
1283 case GEN7_SFID_DATAPORT_DATA_CACHE:
1284 format (file, " (%d, %d, %d)",
1285 inst->bits3.gen7_dp.binding_table_index,
1286 inst->bits3.gen7_dp.msg_control,
1287 inst->bits3.gen7_dp.msg_type);
1288 break;
1289
1290
1291 default:
1292 format (file, "unsupported target %d", target);
1293 break;
1294 }
1295 if (space)
1296 string (file, " ");
1297 if (gen >= 5) {
1298 format (file, "mlen %d",
1299 inst->bits3.generic_gen5.msg_length);
1300 format (file, " rlen %d",
1301 inst->bits3.generic_gen5.response_length);
1302 } else {
1303 format (file, "mlen %d",
1304 inst->bits3.generic.msg_length);
1305 format (file, " rlen %d",
1306 inst->bits3.generic.response_length);
1307 }
1308 }
1309 pad (file, 64);
1310 if (inst->header.opcode != BRW_OPCODE_NOP) {
1311 string (file, "{");
1312 space = 1;
1313 err |= control(file, "access mode", access_mode, inst->header.access_mode, &space);
1314 if (gen >= 6)
1315 err |= control (file, "write enable control", wectrl, inst->header.mask_control, &space);
1316 else
1317 err |= control (file, "mask control", mask_ctrl, inst->header.mask_control, &space);
1318 err |= control (file, "dependency control", dep_ctrl, inst->header.dependency_control, &space);
1319
1320 if (gen >= 6)
1321 err |= qtr_ctrl (file, inst);
1322 else {
1323 if (inst->header.compression_control == BRW_COMPRESSION_COMPRESSED &&
1324 opcode[inst->header.opcode].ndst > 0 &&
1325 inst->bits1.da1.dest_reg_file == BRW_MESSAGE_REGISTER_FILE &&
1326 inst->bits1.da1.dest_reg_nr & (1 << 7)) {
1327 format (file, " compr4");
1328 } else {
1329 err |= control (file, "compression control", compr_ctrl,
1330 inst->header.compression_control, &space);
1331 }
1332 }
1333
1334 err |= control (file, "thread control", thread_ctrl, inst->header.thread_control, &space);
1335 if (gen >= 6)
1336 err |= control (file, "acc write control", accwr, inst->header.acc_wr_control, &space);
1337 if (inst->header.opcode == BRW_OPCODE_SEND ||
1338 inst->header.opcode == BRW_OPCODE_SENDC)
1339 err |= control (file, "end of thread", end_of_thread,
1340 inst->bits3.generic.end_of_thread, &space);
1341 if (space)
1342 string (file, " ");
1343 string (file, "}");
1344 }
1345 string (file, ";");
1346 newline (file);
1347 return err;
1348 }
1349