1 /*
2 * Copyright © 2011 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 *
23 * Authors:
24 * Daniel Vetter <daniel.vetter@ffwll.ch>
25 *
26 */
27
28 #include "igt.h"
29 #include <unistd.h>
30 #include <stdlib.h>
31 #include <stdint.h>
32 #include <stdio.h>
33 #include <string.h>
34 #include <fcntl.h>
35 #include <inttypes.h>
36 #include <errno.h>
37 #include <sys/stat.h>
38 #include <sys/ioctl.h>
39 #include <sys/time.h>
40 #include "drm.h"
41
42 /* Testcase: Submit patches with relocations in memory that will fault
43 *
44 * To be really evil, use a gtt mmap for them.
45 */
46
47 IGT_TEST_DESCRIPTION("Submit patches with relocations in memory that will"
48 " fault.");
49
50 #define OBJECT_SIZE 16384
51
52 #define COPY_BLT_CMD_NOLEN (2<<29|0x53<<22)
53 #define BLT_WRITE_ALPHA (1<<21)
54 #define BLT_WRITE_RGB (1<<20)
55 #define BLT_SRC_TILED (1<<15)
56 #define BLT_DST_TILED (1<<11)
57
58 uint32_t devid;
59
gem_linear_blt(uint32_t * batch,uint32_t src,uint32_t dst,uint32_t length,struct drm_i915_gem_relocation_entry * reloc)60 static int gem_linear_blt(uint32_t *batch,
61 uint32_t src,
62 uint32_t dst,
63 uint32_t length,
64 struct drm_i915_gem_relocation_entry *reloc)
65 {
66 uint32_t *b = batch;
67 int height = length / (16 * 1024);
68
69 igt_assert_lte(height, 1 << 16);
70
71 if (height) {
72 int i = 0;
73 b[i++] = COPY_BLT_CMD_NOLEN | BLT_WRITE_ALPHA | BLT_WRITE_RGB;
74 if (intel_gen(devid) >= 8)
75 b[i-1] |= 8;
76 else
77 b[i-1] |= 6;
78 b[i++] = 0xcc << 16 | 1 << 25 | 1 << 24 | (16*1024);
79 b[i++] = 0;
80 b[i++] = height << 16 | (4*1024);
81 b[i++] = 0;
82 reloc->offset = (b-batch+4) * sizeof(uint32_t);
83 reloc->delta = 0;
84 reloc->target_handle = dst;
85 reloc->read_domains = I915_GEM_DOMAIN_RENDER;
86 reloc->write_domain = I915_GEM_DOMAIN_RENDER;
87 reloc->presumed_offset = 0;
88 reloc++;
89
90 if (intel_gen(devid) >= 8)
91 b[i++] = 0; /* FIXME: use real high dword */
92
93 b[i++] = 0;
94 b[i++] = 16*1024;
95 b[i++] = 0;
96 reloc->offset = (b-batch+7) * sizeof(uint32_t);
97 if (intel_gen(devid) >= 8) {
98 reloc->offset += sizeof(uint32_t);
99 b[i++] = 0; /* FIXME: use real high dword */
100 }
101 reloc->delta = 0;
102 reloc->target_handle = src;
103 reloc->read_domains = I915_GEM_DOMAIN_RENDER;
104 reloc->write_domain = 0;
105 reloc->presumed_offset = 0;
106 reloc++;
107
108 if (intel_gen(devid) >= 8)
109 b += 10;
110 else
111 b += 8;
112 length -= height * 16*1024;
113 }
114
115 if (length) {
116 int i = 0;
117 b[i++] = COPY_BLT_CMD_NOLEN | BLT_WRITE_ALPHA | BLT_WRITE_RGB;
118 if (intel_gen(devid) >= 8)
119 b[i-1] |= 8;
120 else
121 b[i-1] |= 6;
122 b[i++] = 0xcc << 16 | 1 << 25 | 1 << 24 | (16*1024);
123 b[i++] = height << 16;
124 b[i++] = (1+height) << 16 | (length / 4);
125 b[i++] = 0;
126 reloc->offset = (b-batch+4) * sizeof(uint32_t);
127 reloc->delta = 0;
128 reloc->target_handle = dst;
129 reloc->read_domains = I915_GEM_DOMAIN_RENDER;
130 reloc->write_domain = I915_GEM_DOMAIN_RENDER;
131 reloc->presumed_offset = 0;
132 reloc++;
133 if (intel_gen(devid) >= 8)
134 b[i++] = 0; /* FIXME: use real high dword */
135
136 b[i++] = height << 16;
137 b[i++] = 16*1024;
138 b[i++] = 0;
139 reloc->offset = (b-batch+7) * sizeof(uint32_t);
140 if (intel_gen(devid) >= 8) {
141 reloc->offset += sizeof(uint32_t);
142 b[i++] = 0; /* FIXME: use real high dword */
143 }
144 reloc->delta = 0;
145 reloc->target_handle = src;
146 reloc->read_domains = I915_GEM_DOMAIN_RENDER;
147 reloc->write_domain = 0;
148 reloc->presumed_offset = 0;
149 reloc++;
150
151 if (intel_gen(devid) >= 8)
152 b += 10;
153 else
154 b += 8;
155 }
156
157 b[0] = MI_BATCH_BUFFER_END;
158 b[1] = 0;
159
160 return (b+2 - batch) * sizeof(uint32_t);
161 }
162
run(int object_size)163 static void run(int object_size)
164 {
165 struct drm_i915_gem_execbuffer2 execbuf;
166 struct drm_i915_gem_exec_object2 exec[3];
167 struct drm_i915_gem_relocation_entry reloc[4];
168 uint32_t buf[40];
169 uint32_t handle, handle_relocs, src, dst;
170 void *gtt_relocs;
171 int fd, len;
172 int ring;
173
174 fd = drm_open_driver(DRIVER_INTEL);
175 igt_require_gem(fd);
176 devid = intel_get_drm_devid(fd);
177 handle = gem_create(fd, 4096);
178 src = gem_create(fd, object_size);
179 dst = gem_create(fd, object_size);
180
181 len = gem_linear_blt(buf, src, dst, object_size, reloc);
182 gem_write(fd, handle, 0, buf, len);
183
184 exec[0].handle = src;
185 exec[0].relocation_count = 0;
186 exec[0].relocs_ptr = 0;
187 exec[0].alignment = 0;
188 exec[0].offset = 0;
189 exec[0].flags = 0;
190 exec[0].rsvd1 = 0;
191 exec[0].rsvd2 = 0;
192
193 exec[1].handle = dst;
194 exec[1].relocation_count = 0;
195 exec[1].relocs_ptr = 0;
196 exec[1].alignment = 0;
197 exec[1].offset = 0;
198 exec[1].flags = 0;
199 exec[1].rsvd1 = 0;
200 exec[1].rsvd2 = 0;
201
202 handle_relocs = gem_create(fd, 4096);
203 gem_write(fd, handle_relocs, 0, reloc, sizeof(reloc));
204 gtt_relocs = gem_mmap__gtt(fd, handle_relocs, 4096,
205 PROT_READ | PROT_WRITE);
206
207 exec[2].handle = handle;
208 if (intel_gen(devid) >= 8)
209 exec[2].relocation_count = len > 56 ? 4 : 2;
210 else
211 exec[2].relocation_count = len > 40 ? 4 : 2;
212 /* A newly mmap gtt bo will fault on first access. */
213 exec[2].relocs_ptr = to_user_pointer(gtt_relocs);
214 exec[2].alignment = 0;
215 exec[2].offset = 0;
216 exec[2].flags = 0;
217 exec[2].rsvd1 = 0;
218 exec[2].rsvd2 = 0;
219
220 ring = 0;
221 if (HAS_BLT_RING(devid))
222 ring = I915_EXEC_BLT;
223
224 execbuf.buffers_ptr = to_user_pointer(exec);
225 execbuf.buffer_count = 3;
226 execbuf.batch_start_offset = 0;
227 execbuf.batch_len = len;
228 execbuf.cliprects_ptr = 0;
229 execbuf.num_cliprects = 0;
230 execbuf.DR1 = 0;
231 execbuf.DR4 = 0;
232 execbuf.flags = ring;
233 i915_execbuffer2_set_context_id(execbuf, 0);
234 execbuf.rsvd2 = 0;
235
236 gem_execbuf(fd, &execbuf);
237 gem_sync(fd, handle);
238
239 gem_close(fd, handle);
240
241 close(fd);
242 }
243
244 igt_main
245 {
246 igt_subtest("normal")
247 run(OBJECT_SIZE);
248 igt_subtest("no-prefault") {
249 igt_disable_prefault();
250 run(OBJECT_SIZE);
251 igt_enable_prefault();
252 }
253 }
254