1 /* wierd use of API tests */
2
3 /* test1- export buffer from intel, import same fd twice into nouveau,
4 check handles match
5 test2 - export buffer from intel, import fd once, close fd, try import again
6 fail if it succeeds
7 test3 - export buffer from intel, import twice on nouveau, check handle is the same
8 test4 - export handle twice from intel, import into nouveau twice, check handle is the same
9 */
10
11 #include "igt.h"
12 #include <stdio.h>
13 #include <stdlib.h>
14 #include <unistd.h>
15 #include <fcntl.h>
16 #include <sys/stat.h>
17
18 #include "intel_bufmgr.h"
19 #include "nouveau.h"
20
21 #define BO_SIZE (256*1024)
22
23 int intel_fd = -1, intel_fd2 = -1, nouveau_fd = -1, nouveau_fd2 = -1;
24 drm_intel_bufmgr *bufmgr;
25 drm_intel_bufmgr *bufmgr2;
26 struct nouveau_device *ndev, *ndev2;
27 struct nouveau_client *nclient, *nclient2;
28 uint32_t devid;
29 struct intel_batchbuffer *intel_batch;
30
find_and_open_devices(void)31 static void find_and_open_devices(void)
32 {
33 int i;
34 char path[80];
35 struct stat buf;
36 FILE *fl;
37 char vendor_id[8];
38 int venid;
39 for (i = 0; i < 9; i++) {
40 char *ret;
41
42 sprintf(path, "/sys/class/drm/card%d/device/vendor", i);
43 if (stat(path, &buf))
44 break;
45
46 fl = fopen(path, "r");
47 if (!fl)
48 break;
49
50 ret = fgets(vendor_id, 8, fl);
51 igt_assert(ret);
52 fclose(fl);
53
54 venid = strtoul(vendor_id, NULL, 16);
55 sprintf(path, "/dev/dri/card%d", i);
56 if (venid == 0x8086) {
57 intel_fd = open(path, O_RDWR);
58 igt_assert(intel_fd);
59 intel_fd2 = open(path, O_RDWR);
60 igt_assert(intel_fd2);
61 } else if (venid == 0x10de) {
62 nouveau_fd = open(path, O_RDWR);
63 igt_assert(nouveau_fd);
64 nouveau_fd2 = open(path, O_RDWR);
65 igt_assert(nouveau_fd2);
66 }
67 }
68 }
69
test_i915_nv_import_twice(void)70 static void test_i915_nv_import_twice(void)
71 {
72 drm_intel_bo *test_intel_bo;
73 int prime_fd;
74 struct nouveau_bo *nvbo = NULL, *nvbo2 = NULL;
75
76 test_intel_bo = drm_intel_bo_alloc(bufmgr, "test bo", BO_SIZE, 4096);
77
78 igt_assert(drm_intel_bo_gem_export_to_prime(test_intel_bo, &prime_fd) == 0);
79
80 igt_assert(nouveau_bo_prime_handle_ref(ndev, prime_fd, &nvbo) == 0);
81 igt_assert(nouveau_bo_prime_handle_ref(ndev2, prime_fd, &nvbo2) == 0);
82 close(prime_fd);
83
84 nouveau_bo_ref(NULL, &nvbo2);
85 nouveau_bo_ref(NULL, &nvbo);
86 drm_intel_bo_unreference(test_intel_bo);
87 }
88
test_i915_nv_import_twice_check_flink_name(void)89 static void test_i915_nv_import_twice_check_flink_name(void)
90 {
91 drm_intel_bo *test_intel_bo;
92 int prime_fd;
93 struct nouveau_bo *nvbo = NULL, *nvbo2 = NULL;
94 uint32_t flink_name1, flink_name2;
95
96 test_intel_bo = drm_intel_bo_alloc(bufmgr, "test bo", BO_SIZE, 4096);
97
98 igt_assert(drm_intel_bo_gem_export_to_prime(test_intel_bo, &prime_fd) == 0);
99
100 igt_assert(nouveau_bo_prime_handle_ref(ndev, prime_fd, &nvbo) == 0);
101 igt_assert(nouveau_bo_prime_handle_ref(ndev2, prime_fd, &nvbo2) == 0);
102 close(prime_fd);
103
104 igt_assert(nouveau_bo_name_get(nvbo, &flink_name1) == 0);
105 igt_assert(nouveau_bo_name_get(nvbo2, &flink_name2) == 0);
106
107 igt_assert_eq_u32(flink_name1, flink_name2);
108
109 nouveau_bo_ref(NULL, &nvbo2);
110 nouveau_bo_ref(NULL, &nvbo);
111 drm_intel_bo_unreference(test_intel_bo);
112 }
113
test_i915_nv_reimport_twice_check_flink_name(void)114 static void test_i915_nv_reimport_twice_check_flink_name(void)
115 {
116 drm_intel_bo *test_intel_bo;
117 int prime_fd;
118 struct nouveau_bo *nvbo = NULL, *nvbo2 = NULL;
119 uint32_t flink_name1, flink_name2;
120
121 test_intel_bo = drm_intel_bo_alloc(bufmgr, "test bo", BO_SIZE, 4096);
122
123 igt_assert(drm_intel_bo_gem_export_to_prime(test_intel_bo, &prime_fd) == 0);
124
125 igt_assert(nouveau_bo_prime_handle_ref(ndev, prime_fd, &nvbo) == 0);
126
127 /* create a new dma-buf */
128 close(prime_fd);
129 igt_assert(drm_intel_bo_gem_export_to_prime(test_intel_bo, &prime_fd) == 0);
130
131 igt_assert(nouveau_bo_prime_handle_ref(ndev2, prime_fd, &nvbo2) == 0);
132 close(prime_fd);
133
134 igt_assert(nouveau_bo_name_get(nvbo, &flink_name1) == 0);
135 igt_assert(nouveau_bo_name_get(nvbo2, &flink_name2) == 0);
136
137 igt_assert_eq_u32(flink_name1, flink_name2);
138
139 nouveau_bo_ref(NULL, &nvbo2);
140 nouveau_bo_ref(NULL, &nvbo);
141 drm_intel_bo_unreference(test_intel_bo);
142 }
143
test_nv_i915_import_twice_check_flink_name(void)144 static void test_nv_i915_import_twice_check_flink_name(void)
145 {
146 drm_intel_bo *intel_bo = NULL, *intel_bo2 = NULL;
147 int prime_fd;
148 struct nouveau_bo *nvbo = NULL;
149 uint32_t flink_name1, flink_name2;
150
151 igt_assert(nouveau_bo_new(ndev, NOUVEAU_BO_GART | NOUVEAU_BO_MAP,
152 0, BO_SIZE, NULL, &nvbo) == 0);
153
154 igt_assert(nouveau_bo_set_prime(nvbo, &prime_fd) == 0);
155
156 intel_bo = drm_intel_bo_gem_create_from_prime(bufmgr, prime_fd, BO_SIZE);
157 igt_assert(intel_bo);
158
159 intel_bo2 = drm_intel_bo_gem_create_from_prime(bufmgr2, prime_fd, BO_SIZE);
160 igt_assert(intel_bo2);
161 close(prime_fd);
162
163 igt_assert(drm_intel_bo_flink(intel_bo, &flink_name1) == 0);
164 igt_assert(drm_intel_bo_flink(intel_bo2, &flink_name2) == 0);
165
166 igt_assert_eq_u32(flink_name1, flink_name2);
167
168 nouveau_bo_ref(NULL, &nvbo);
169 drm_intel_bo_unreference(intel_bo);
170 drm_intel_bo_unreference(intel_bo2);
171 }
172
test_nv_i915_reimport_twice_check_flink_name(void)173 static void test_nv_i915_reimport_twice_check_flink_name(void)
174 {
175 drm_intel_bo *intel_bo = NULL, *intel_bo2 = NULL;
176 int prime_fd;
177 struct nouveau_bo *nvbo = NULL;
178 uint32_t flink_name1, flink_name2;
179
180 igt_assert(nouveau_bo_new(ndev, NOUVEAU_BO_GART | NOUVEAU_BO_MAP,
181 0, BO_SIZE, NULL, &nvbo) == 0);
182
183 igt_assert(nouveau_bo_set_prime(nvbo, &prime_fd) == 0);
184
185 intel_bo = drm_intel_bo_gem_create_from_prime(bufmgr, prime_fd, BO_SIZE);
186 igt_assert(intel_bo);
187 close(prime_fd);
188 igt_assert(nouveau_bo_set_prime(nvbo, &prime_fd) == 0);
189
190 intel_bo2 = drm_intel_bo_gem_create_from_prime(bufmgr2, prime_fd, BO_SIZE);
191 igt_assert(intel_bo2);
192 close(prime_fd);
193
194 igt_assert(drm_intel_bo_flink(intel_bo, &flink_name1) == 0);
195 igt_assert(drm_intel_bo_flink(intel_bo2, &flink_name2) == 0);
196
197 igt_assert_eq_u32(flink_name1, flink_name2);
198
199 nouveau_bo_ref(NULL, &nvbo);
200 drm_intel_bo_unreference(intel_bo);
201 drm_intel_bo_unreference(intel_bo2);
202 }
203
test_i915_nv_import_vs_close(void)204 static void test_i915_nv_import_vs_close(void)
205 {
206 drm_intel_bo *test_intel_bo;
207 int prime_fd;
208 struct nouveau_bo *nvbo = NULL, *nvbo2 = NULL;
209
210 test_intel_bo = drm_intel_bo_alloc(bufmgr, "test bo", BO_SIZE, 4096);
211 igt_assert(test_intel_bo);
212
213 igt_assert(drm_intel_bo_gem_export_to_prime(test_intel_bo, &prime_fd) == 0);
214
215 igt_assert(nouveau_bo_prime_handle_ref(ndev, prime_fd, &nvbo) == 0);
216 close(prime_fd);
217 igt_assert(nouveau_bo_prime_handle_ref(ndev2, prime_fd, &nvbo2) < 0);
218
219 nouveau_bo_ref(NULL, &nvbo2);
220 nouveau_bo_ref(NULL, &nvbo);
221 drm_intel_bo_unreference(test_intel_bo);
222 }
223
224 /* import handle twice on one driver */
test_i915_nv_double_import(void)225 static void test_i915_nv_double_import(void)
226 {
227 drm_intel_bo *test_intel_bo;
228 int prime_fd;
229 struct nouveau_bo *nvbo = NULL, *nvbo2 = NULL;
230
231 test_intel_bo = drm_intel_bo_alloc(bufmgr, "test bo", BO_SIZE, 4096);
232 igt_assert(test_intel_bo);
233
234 igt_assert(drm_intel_bo_gem_export_to_prime(test_intel_bo, &prime_fd) == 0);
235
236 igt_assert(nouveau_bo_prime_handle_ref(ndev, prime_fd, &nvbo) == 0);
237 igt_assert(nouveau_bo_prime_handle_ref(ndev, prime_fd, &nvbo2) == 0);
238 close(prime_fd);
239
240 igt_assert(nvbo->handle == nvbo2->handle);
241
242 nouveau_bo_ref(NULL, &nvbo2);
243 nouveau_bo_ref(NULL, &nvbo);
244 drm_intel_bo_unreference(test_intel_bo);
245 }
246
247 /* export handle twice from one driver - import twice
248 see if we get same object */
test_i915_nv_double_export(void)249 static void test_i915_nv_double_export(void)
250 {
251 drm_intel_bo *test_intel_bo;
252 int prime_fd, prime_fd2;
253 struct nouveau_bo *nvbo = NULL, *nvbo2 = NULL;
254
255 test_intel_bo = drm_intel_bo_alloc(bufmgr, "test bo", BO_SIZE, 4096);
256 igt_assert(test_intel_bo);
257
258 drm_intel_bo_gem_export_to_prime(test_intel_bo, &prime_fd);
259
260 drm_intel_bo_gem_export_to_prime(test_intel_bo, &prime_fd2);
261
262 igt_assert(nouveau_bo_prime_handle_ref(ndev, prime_fd, &nvbo) == 0);
263 close(prime_fd);
264 igt_assert(nouveau_bo_prime_handle_ref(ndev, prime_fd2, &nvbo2) == 0);
265 close(prime_fd2);
266
267 igt_assert(nvbo->handle == nvbo2->handle);
268
269 nouveau_bo_ref(NULL, &nvbo2);
270 nouveau_bo_ref(NULL, &nvbo);
271 drm_intel_bo_unreference(test_intel_bo);
272 }
273
274 /* export handle from intel driver - reimport to intel driver
275 see if you get same object */
test_i915_self_import(void)276 static void test_i915_self_import(void)
277 {
278 drm_intel_bo *test_intel_bo, *test_intel_bo2;
279 int prime_fd;
280
281 test_intel_bo = drm_intel_bo_alloc(bufmgr, "test bo", BO_SIZE, 4096);
282
283 drm_intel_bo_gem_export_to_prime(test_intel_bo, &prime_fd);
284
285 test_intel_bo2 = drm_intel_bo_gem_create_from_prime(bufmgr, prime_fd, BO_SIZE);
286 close(prime_fd);
287 igt_assert(test_intel_bo2);
288
289 igt_assert(test_intel_bo->handle == test_intel_bo2->handle);
290
291 drm_intel_bo_unreference(test_intel_bo);
292 }
293
294 /* nouveau export reimport test */
test_nv_self_import(void)295 static void test_nv_self_import(void)
296 {
297 int prime_fd;
298 struct nouveau_bo *nvbo, *nvbo2;
299
300 igt_assert(nouveau_bo_new(ndev, NOUVEAU_BO_GART | NOUVEAU_BO_MAP,
301 0, BO_SIZE, NULL, &nvbo) == 0);
302 igt_assert(nouveau_bo_set_prime(nvbo, &prime_fd) == 0);
303
304 igt_assert(nouveau_bo_prime_handle_ref(ndev, prime_fd, &nvbo2) == 0);
305 close(prime_fd);
306
307 igt_assert(nvbo->handle == nvbo2->handle);
308 nouveau_bo_ref(NULL, &nvbo);
309 nouveau_bo_ref(NULL, &nvbo2);
310 }
311
312 /* export handle from intel driver - reimport to another intel driver bufmgr
313 see if you get same object */
test_i915_self_import_to_different_fd(void)314 static void test_i915_self_import_to_different_fd(void)
315 {
316 drm_intel_bo *test_intel_bo, *test_intel_bo2;
317 int prime_fd;
318
319 test_intel_bo = drm_intel_bo_alloc(bufmgr, "test bo", BO_SIZE, 4096);
320
321 drm_intel_bo_gem_export_to_prime(test_intel_bo, &prime_fd);
322
323 test_intel_bo2 = drm_intel_bo_gem_create_from_prime(bufmgr2, prime_fd, BO_SIZE);
324 close(prime_fd);
325 igt_assert(test_intel_bo2);
326
327 drm_intel_bo_unreference(test_intel_bo2);
328 drm_intel_bo_unreference(test_intel_bo);
329 }
330
331 /* nouveau export reimport to other driver test */
test_nv_self_import_to_different_fd(void)332 static void test_nv_self_import_to_different_fd(void)
333 {
334 int prime_fd;
335 struct nouveau_bo *nvbo, *nvbo2;
336
337 igt_assert(nouveau_bo_new(ndev, NOUVEAU_BO_GART | NOUVEAU_BO_MAP,
338 0, BO_SIZE, NULL, &nvbo) == 0);
339 igt_assert(nouveau_bo_set_prime(nvbo, &prime_fd) == 0);
340
341 igt_assert(nouveau_bo_prime_handle_ref(ndev2, prime_fd, &nvbo2) == 0);
342 close(prime_fd);
343
344 /* not sure what to test for, just make sure we don't explode */
345 nouveau_bo_ref(NULL, &nvbo);
346 nouveau_bo_ref(NULL, &nvbo2);
347 }
348
349 igt_main
350 {
351 igt_fixture {
352 find_and_open_devices();
353
354 igt_require(nouveau_fd != -1);
355 igt_require(nouveau_fd2 != -1);
356 igt_require(intel_fd != -1);
357 igt_require(intel_fd2 != -1);
358
359 /* set up intel bufmgr */
360 bufmgr = drm_intel_bufmgr_gem_init(intel_fd, 4096);
361 igt_assert(bufmgr);
362 /* Do not enable reuse, we share (almost) all buffers. */
363 //drm_intel_bufmgr_gem_enable_reuse(bufmgr);
364
365 bufmgr2 = drm_intel_bufmgr_gem_init(intel_fd2, 4096);
366 igt_assert(bufmgr2);
367 drm_intel_bufmgr_gem_enable_reuse(bufmgr2);
368
369 /* set up nouveau bufmgr */
370 igt_assert(nouveau_device_wrap(nouveau_fd, 0, &ndev) >= 0);
371 igt_assert(nouveau_client_new(ndev, &nclient) >= 0);
372
373 /* set up nouveau bufmgr */
374 igt_assert(nouveau_device_wrap(nouveau_fd2, 0, &ndev2) >= 0);
375
376 igt_assert(nouveau_client_new(ndev2, &nclient2) >= 0);;
377
378 /* set up an intel batch buffer */
379 devid = intel_get_drm_devid(intel_fd);
380 intel_batch = intel_batchbuffer_alloc(bufmgr, devid);
381 igt_assert(intel_batch);
382 }
383
384 #define xtest(name) \
385 igt_subtest(#name) \
386 test_##name();
387
388 xtest(i915_nv_import_twice);
389 xtest(i915_nv_import_twice_check_flink_name);
390 xtest(i915_nv_reimport_twice_check_flink_name);
391 xtest(nv_i915_import_twice_check_flink_name);
392 xtest(nv_i915_reimport_twice_check_flink_name);
393 xtest(i915_nv_import_vs_close);
394 xtest(i915_nv_double_import);
395 xtest(i915_nv_double_export);
396 xtest(i915_self_import);
397 xtest(nv_self_import);
398 xtest(i915_self_import_to_different_fd);
399 xtest(nv_self_import_to_different_fd);
400
401 igt_fixture {
402 intel_batchbuffer_free(intel_batch);
403
404 nouveau_device_del(&ndev);
405 drm_intel_bufmgr_destroy(bufmgr);
406
407 close(intel_fd);
408 close(nouveau_fd);
409 }
410 }
411