1 /******************************************************************************
2 *
3 * Copyright (C) 2018 The Android Open Source Project
4 *
5 * Licensed under the Apache License, Version 2.0 (the "License");
6 * you may not use this file except in compliance with the License.
7 * You may obtain a copy of the License at:
8 *
9 * http://www.apache.org/licenses/LICENSE-2.0
10 *
11 * Unless required by applicable law or agreed to in writing, software
12 * distributed under the License is distributed on an "AS IS" BASIS,
13 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
14 * See the License for the specific language governing permissions and
15 * limitations under the License.
16 *
17 *****************************************************************************
18 * Originally developed and contributed by Ittiam Systems Pvt. Ltd, Bangalore
19 */
20
21 /*!
22 ******************************************************************************
23 * \file ihevce_sub_pic_rc.c
24 *
25 * \brief
26 *
27 * \date
28 * 18/09/2012
29 *
30 * \author
31 * Ittiam
32 *
33 * List of Functions
34 *
35 ******************************************************************************
36 */
37
38 /*****************************************************************************/
39 /* File Includes */
40 /*****************************************************************************/
41 /* System include files */
42 #include <stdio.h>
43 #include <string.h>
44 #include <stdlib.h>
45 #include <assert.h>
46 #include <stdarg.h>
47 #include <math.h>
48
49 /* User include files */
50 #include "ihevc_typedefs.h"
51 #include "itt_video_api.h"
52 #include "ihevce_api.h"
53
54 #include "rc_cntrl_param.h"
55 #include "rc_frame_info_collector.h"
56 #include "rc_look_ahead_params.h"
57
58 #include "ihevc_defs.h"
59 #include "ihevc_debug.h"
60 #include "ihevc_structs.h"
61 #include "ihevc_platform_macros.h"
62 #include "ihevc_deblk.h"
63 #include "ihevc_itrans_recon.h"
64 #include "ihevc_chroma_itrans_recon.h"
65 #include "ihevc_chroma_intra_pred.h"
66 #include "ihevc_intra_pred.h"
67 #include "ihevc_inter_pred.h"
68 #include "ihevc_mem_fns.h"
69 #include "ihevc_padding.h"
70 #include "ihevc_weighted_pred.h"
71 #include "ihevc_sao.h"
72 #include "ihevc_resi_trans.h"
73 #include "ihevc_quant_iquant_ssd.h"
74 #include "ihevc_cabac_tables.h"
75
76 #include "ihevce_defs.h"
77 #include "ihevce_buffer_que_interface.h"
78 #include "ihevce_hle_interface.h"
79 #include "ihevce_hle_q_func.h"
80 #include "ihevce_lap_enc_structs.h"
81 #include "ihevce_multi_thrd_structs.h"
82 #include "ihevce_me_common_defs.h"
83 #include "ihevce_had_satd.h"
84 #include "ihevce_error_checks.h"
85 #include "ihevce_error_codes.h"
86 #include "ihevce_bitstream.h"
87 #include "ihevce_cabac.h"
88 #include "ihevce_trace.h"
89 #include "ihevce_function_selector.h"
90 #include "ihevce_enc_structs.h"
91 #include "ihevce_global_tables.h"
92 #include "ihevce_cmn_utils_instr_set_router.h"
93 #include "ihevce_rdoq_macros.h"
94 #include "ihevce_entropy_structs.h"
95 #include "ihevce_entropy_interface.h"
96 #include "ihevce_enc_loop_structs.h"
97 #include "hme_datatype.h"
98 #include "hme_interface.h"
99 #include "hme_common_defs.h"
100 #include "hme_defs.h"
101 #include "ihevce_rc_enc_structs.h"
102 #include "ihevce_rc_interface.h"
103 #include "ihevce_sub_pic_rc.h"
104
105 #include "cast_types.h"
106 #include "osal.h"
107 #include "osal_defaults.h"
108
109 /*****************************************************************************/
110 /* Globals */
111 /*****************************************************************************/
112 /* @ brief : Qp deviation of -6 to 6 is mapped */
113 float qp_scale_dev[13] = { 0.5, 0.56, 0.630, 0.707, 0.794, 0.891, 1.00,
114 1.122, 1.259, 1.414, 1.587, 1.782, 2.00 };
115
116 /*****************************************************************************/
117 /* Constant Macros */
118 /*****************************************************************************/
119 #define IN_FRAME_RC_PRINT 0
120 #define IN_FRAME_RC_FRAME_NUM 4
121
122 /*****************************************************************************/
123 /* Function Definitions */
124 /*****************************************************************************/
125
126 /*!
127 ******************************************************************************
128 * \if Function name : ihevce_sub_pic_rc_bits_fill \endif
129 *
130 * \brief
131 * Sub-pic RC thread interface function
132 *
133 * \param[in] Frame process pointer
134 *
135 * \return
136 * None
137 *
138 * \author
139 * Ittiam
140 *
141 *****************************************************************************
142 */
ihevce_sub_pic_rc_in_data(void * pv_multi_thrd_ctxt,void * pv_ctxt,void * pv_ctb_ipe_analyse,void * pv_frm_ctb_prms)143 void ihevce_sub_pic_rc_in_data(
144 void *pv_multi_thrd_ctxt, void *pv_ctxt, void *pv_ctb_ipe_analyse, void *pv_frm_ctb_prms)
145 {
146 multi_thrd_ctxt_t *ps_multi_thrd_ctxt = (multi_thrd_ctxt_t *)pv_multi_thrd_ctxt;
147 ihevce_enc_loop_ctxt_t *ps_ctxt = (ihevce_enc_loop_ctxt_t *)pv_ctxt;
148 ipe_l0_ctb_analyse_for_me_t *ps_ctb_ipe_analyse =
149 (ipe_l0_ctb_analyse_for_me_t *)pv_ctb_ipe_analyse;
150 frm_ctb_ctxt_t *ps_frm_ctb_prms = (frm_ctb_ctxt_t *)pv_frm_ctb_prms;
151
152 WORD32 j = 0;
153 WORD32 i4_frm_id = ps_ctxt->i4_enc_frm_id;
154 WORD32 i4_br_id = ps_ctxt->i4_bitrate_instance_num;
155 WORD32 i4_thrd_id = ps_ctxt->thrd_id;
156 WORD32 i4_ctb_count_flag = 0;
157 WORD32 i4_is_intra_pic = (ISLICE == ps_ctxt->i1_slice_type);
158
159 /*Accumalate all the variables in shared memory */
160 for(j = 0; j < (MAX_CU_IN_CTB >> 2); j++)
161 {
162 ps_multi_thrd_ctxt->ai8_nctb_ipe_sad[i4_frm_id][i4_br_id][i4_thrd_id] +=
163 ps_ctb_ipe_analyse->ai4_best_sad_8x8_l1_ipe[j];
164 ps_multi_thrd_ctxt->ai8_nctb_me_sad[i4_frm_id][i4_br_id][i4_thrd_id] +=
165 ps_ctb_ipe_analyse->ai4_best_sad_8x8_l1_me[j];
166
167 ps_multi_thrd_ctxt->ai8_nctb_act_factor[i4_frm_id][i4_br_id][i4_thrd_id] +=
168 ps_ctb_ipe_analyse->ai4_8x8_act_factor[j];
169 }
170
171 ps_multi_thrd_ctxt->ai8_nctb_l0_ipe_sad[i4_frm_id][i4_br_id][i4_thrd_id] +=
172 ps_ctb_ipe_analyse->i4_ctb_acc_satd;
173
174 /*Accumalte L0 MPM bits for N CTB*/
175 ps_multi_thrd_ctxt->ai8_nctb_mpm_bits_consumed[i4_frm_id][i4_br_id][i4_thrd_id] +=
176 ps_ctb_ipe_analyse->i4_ctb_acc_mpm_bits;
177
178 /*Accumate the total bits and hdr bits for N Ctbs*/
179 ps_multi_thrd_ctxt->ai8_nctb_bits_consumed[i4_frm_id][i4_br_id][i4_thrd_id] +=
180 ps_ctxt->u4_total_cu_bits;
181 ps_multi_thrd_ctxt->ai8_acc_bits_consumed[i4_frm_id][i4_br_id][i4_thrd_id] +=
182 ps_ctxt->u4_total_cu_bits;
183 ps_multi_thrd_ctxt->ai8_acc_bits_mul_qs_consumed[i4_frm_id][i4_br_id][i4_thrd_id] +=
184 ps_ctxt->u4_total_cu_bits_mul_qs;
185 ps_multi_thrd_ctxt->ai8_nctb_hdr_bits_consumed[i4_frm_id][i4_br_id][i4_thrd_id] +=
186 ps_ctxt->u4_total_cu_hdr_bits;
187
188 /*Reset the total CU bits, accumalated for all CTBS*/
189 ps_ctxt->u4_total_cu_bits = 0;
190 ps_ctxt->u4_total_cu_hdr_bits = 0;
191 ps_ctxt->u4_total_cu_bits_mul_qs = 0;
192
193 /*Put mutex lock for incrementing cb count */
194 osal_mutex_lock(ps_multi_thrd_ctxt->pv_sub_pic_rc_mutex_lock_hdl);
195
196 ps_multi_thrd_ctxt->ai4_acc_ctb_ctr[i4_frm_id][i4_br_id] += 1;
197 ps_multi_thrd_ctxt->ai4_ctb_ctr[i4_frm_id][i4_br_id] += 1;
198
199 /*Check if the acc ctb counter across thread has reached the required threshold */
200 if(ps_multi_thrd_ctxt->ai4_acc_ctb_ctr[i4_frm_id][i4_br_id] >=
201 ps_ctxt->i4_num_ctb_for_out_scale)
202 {
203 i4_ctb_count_flag = 1;
204 /*Reset accumalated CTB counter appropriately s */
205 ps_multi_thrd_ctxt->ai4_acc_ctb_ctr[i4_frm_id][i4_br_id] = 0;
206 }
207
208 /*Variables to be sent in the queue after required ctb count is reached */
209 if(1 == i4_ctb_count_flag)
210 {
211 WORD32 i4_temp_thrd_id;
212 LWORD64 i8_nctb_l1_me_sad = 0, i8_nctb_l1_ipe_sad = 0;
213 LWORD64 i8_nctb_l0_ipe_satd = 0, i8_nctb_l1_activity_fact = 0;
214 LWORD64 i8_nctb_hdr_bits_consumed = 0, i8_nctb_l0_mpm_bits = 0;
215 LWORD64 i8_nctb_bits_consumed = 0, i8_acc_bits_consumed = 0,
216 i8_acc_bits_mul_qs_consumed = 0;
217 LWORD64 i8_frame_l1_ipe_sad, i8_frame_l0_ipe_satd, i8_frame_l1_me_sad;
218 LWORD64 i8_frame_l1_activity_fact, i8_frame_bits_estimated;
219
220 for(i4_temp_thrd_id = 0; i4_temp_thrd_id < ps_ctxt->i4_num_proc_thrds; i4_temp_thrd_id++)
221 {
222 /*Accumalte only if thread id is valid */
223 if(ps_multi_thrd_ctxt->ai4_thrd_id_valid_flag[i4_frm_id][i4_br_id][i4_temp_thrd_id] ==
224 1)
225 {
226 /*store complexities for the ctbs across all threads till then */
227 i8_nctb_l1_me_sad +=
228 ps_multi_thrd_ctxt->ai8_nctb_me_sad[i4_frm_id][i4_br_id][i4_temp_thrd_id];
229 i8_nctb_l1_ipe_sad +=
230 ps_multi_thrd_ctxt->ai8_nctb_ipe_sad[i4_frm_id][i4_br_id][i4_temp_thrd_id];
231 i8_nctb_l0_ipe_satd +=
232 ps_multi_thrd_ctxt->ai8_nctb_l0_ipe_sad[i4_frm_id][i4_br_id][i4_temp_thrd_id];
233 i8_nctb_l1_activity_fact +=
234 ps_multi_thrd_ctxt->ai8_nctb_act_factor[i4_frm_id][i4_br_id][i4_temp_thrd_id];
235
236 /*Set encoder total and hdr bits and mpm bits for that N ctbs */
237 i8_nctb_hdr_bits_consumed +=
238 ps_multi_thrd_ctxt
239 ->ai8_nctb_hdr_bits_consumed[i4_frm_id][i4_br_id][i4_temp_thrd_id];
240 i8_nctb_l0_mpm_bits +=
241 ps_multi_thrd_ctxt
242 ->ai8_nctb_mpm_bits_consumed[i4_frm_id][i4_br_id][i4_temp_thrd_id];
243 i8_nctb_bits_consumed +=
244 ps_multi_thrd_ctxt->ai8_nctb_bits_consumed[i4_frm_id][i4_br_id][i4_temp_thrd_id];
245
246 /*Set encoder total bits for ctbs till then */
247 i8_acc_bits_consumed +=
248 ps_multi_thrd_ctxt->ai8_acc_bits_consumed[i4_frm_id][i4_br_id][i4_temp_thrd_id];
249 i8_acc_bits_mul_qs_consumed +=
250 ps_multi_thrd_ctxt
251 ->ai8_acc_bits_mul_qs_consumed[i4_frm_id][i4_br_id][i4_temp_thrd_id];
252
253 /*Reset NCTB total and hdr, mpm bits counter to zero */
254 ps_multi_thrd_ctxt->ai8_nctb_bits_consumed[i4_frm_id][i4_br_id][i4_temp_thrd_id] =
255 0;
256 ps_multi_thrd_ctxt
257 ->ai8_nctb_hdr_bits_consumed[i4_frm_id][i4_br_id][i4_temp_thrd_id] = 0;
258 ps_multi_thrd_ctxt
259 ->ai8_nctb_mpm_bits_consumed[i4_frm_id][i4_br_id][i4_temp_thrd_id] = 0;
260 }
261 }
262
263 /*Store all frame level params */
264 i8_frame_l1_ipe_sad = ps_ctxt->i8_frame_l1_ipe_sad;
265 i8_frame_l0_ipe_satd = ps_ctxt->i8_frame_l0_ipe_satd;
266 i8_frame_l1_me_sad = ps_ctxt->i8_frame_l1_me_sad;
267 i8_frame_l1_activity_fact = ps_ctxt->i8_frame_l1_activity_fact;
268 i8_frame_bits_estimated = ps_ctxt->ai4_frame_bits_estimated[i4_frm_id][i4_br_id];
269
270 /*If CU level RC is disabled reset the nctb and frame level factor */
271 if(0 == ps_ctxt->i4_qp_mod)
272 {
273 i8_frame_l1_activity_fact = 0;
274 }
275
276 ASSERT(ps_ctxt->ai4_frame_bits_estimated[i4_frm_id][i4_br_id] != 0);
277
278 {
279 float bits_estimated, activity_ratio = 1;
280 WORD32 i8_ctb_bits_estimated;
281 float f_bit_deviation;
282 WORD32 i4_tot_frame_ctb =
283 ps_frm_ctb_prms->i4_num_ctbs_vert * ps_frm_ctb_prms->i4_num_ctbs_horz;
284
285 /*The QP limit can only increment/decrement by 3/1 */
286 float f_qp_increase_limit = (1.414);
287 //float f_qp_decrease_limit = (0.891);
288
289 /*Frame level activity is set to 0 for cu-level rc off*/
290 if(i8_frame_l1_activity_fact != 0)
291 activity_ratio =
292 (float)(i8_frame_l1_activity_fact) / (float)(i8_nctb_l1_activity_fact);
293
294 activity_ratio = 1;
295
296 /*Estimate the bits to be consumed based on the intra and inter complexity */
297 if(i4_is_intra_pic)
298 {
299 float sad_ratio = (float)(i8_nctb_l0_ipe_satd) / (float)(i8_frame_l0_ipe_satd);
300 bits_estimated = sad_ratio * activity_ratio * ((float)i8_frame_bits_estimated);
301 }
302 else
303 {
304 float sad_ratio = (float)(i8_nctb_l1_me_sad) / (float)(i8_frame_l1_me_sad);
305 bits_estimated = sad_ratio * activity_ratio * ((float)i8_frame_bits_estimated);
306 }
307
308 i8_ctb_bits_estimated = (i8_frame_bits_estimated / i4_tot_frame_ctb);
309
310 /*for better control on both sides*/
311 f_bit_deviation = ((i8_acc_bits_consumed * 1.0) / bits_estimated);
312 //printf("\n dev = %f\t",f_bit_deviation);
313 /* if consumed bits is higher than 7.5% or consumed bits is lower by 20%)*/
314 if((f_bit_deviation > 1.075) ||
315 ((f_bit_deviation < 0.8) &&
316 (ps_ctxt->i4_is_model_valid == 0 ||
317 (ps_multi_thrd_ctxt->ai4_threshold_reached[i4_frm_id][i4_br_id]))))
318 {
319 float f_qscale_avg_factor;
320 WORD32 i4_cu_qp_sub_pic_rc_curr;
321 /*get the Qscale of Frame QP*/
322 WORD32 i4_frm_qs_q3 =
323 (ps_ctxt->ps_rc_quant_ctxt->pi4_qp_to_qscale
324 [ps_ctxt->i4_frame_qp + ps_ctxt->ps_rc_quant_ctxt->i1_qp_offset]);
325 WORD32 i4_prev_qp = ps_ctxt->i4_frame_mod_qp;
326
327 ps_multi_thrd_ctxt->ai4_threshold_reached[i4_frm_id][i4_br_id] = 1;
328
329 /*Calculating Intra scale factor */
330 if(i4_is_intra_pic)
331 {
332 /*In case of lower QP, Qscale increase at every step is very low, which doesn't allow QP increase
333 to meet the rate, hence disable deviation clip below QP 4 for all bitdepth*/
334 if(i4_prev_qp > MIN_QP_NO_CLIP_DEV)
335 {
336 /* Clip the bits deviation such that it never cross +3 qp shifts from average QP so far coded with in-frame rc*/
337 if(f_bit_deviation > f_qp_increase_limit)
338 {
339 f_bit_deviation = f_qp_increase_limit;
340 }
341 }
342
343 /*The current qscale should do not deviate +/- 3 QP from the previous qscale */
344 f_qscale_avg_factor =
345 (((float)(i8_acc_bits_mul_qs_consumed * (1 << QSCALE_Q_FAC_3))) /
346 (i8_acc_bits_consumed * i4_frm_qs_q3));
347 i4_cu_qp_sub_pic_rc_curr =
348 f_qscale_avg_factor * f_bit_deviation * (1 << QP_LEVEL_MOD_ACT_FACTOR);
349 }
350 else /*Calculating Inter scale factor */
351 {
352 /*In case of lower QP, Qscale increase at every step is very low, which doesn't allow QP increase
353 to meet the rate, hence disable deviation clip below QP 4 for all bitdepth*/
354 if(i4_prev_qp > MIN_QP_NO_CLIP_DEV)
355 {
356 /* Clip the bits deviation such that it never cross +3 qp shifts from average QP so far coded with in-frame rc*/
357 if(f_bit_deviation > f_qp_increase_limit)
358 {
359 f_bit_deviation = f_qp_increase_limit;
360 }
361 }
362
363 /*The current qscale should do not deviate +/- 3 QP from the previous qscale */
364 f_qscale_avg_factor =
365 (((float)(i8_acc_bits_mul_qs_consumed * (1 << QSCALE_Q_FAC_3))) /
366 (i8_acc_bits_consumed * i4_frm_qs_q3));
367 i4_cu_qp_sub_pic_rc_curr =
368 f_qscale_avg_factor * f_bit_deviation * (1 << QP_LEVEL_MOD_ACT_FACTOR);
369 }
370 //printf("Avg_qscale = %f\t qs_inq3 = %d",f_qscale_avg_factor,i4_frm_qs_q3);
371 /*update of previous chunk QP in multi-thread context, so that all threads can use it from now onwards*/
372 {
373 ps_multi_thrd_ctxt->ai4_prev_chunk_qp[i4_frm_id][i4_br_id] =
374 ps_ctxt->i4_frame_mod_qp;
375 }
376 /*Limit the qp from decreasing less than 6 compared to frame qp */
377 {
378 osal_mutex_lock(ps_multi_thrd_ctxt->pv_sub_pic_rc_for_qp_update_mutex_lock_hdl);
379 ps_multi_thrd_ctxt->ai4_curr_qp_estimated[i4_frm_id][i4_br_id] =
380 i4_cu_qp_sub_pic_rc_curr;
381 osal_mutex_unlock(
382 ps_multi_thrd_ctxt->pv_sub_pic_rc_for_qp_update_mutex_lock_hdl);
383 }
384 }
385 }
386 }
387 osal_mutex_unlock(ps_multi_thrd_ctxt->pv_sub_pic_rc_mutex_lock_hdl);
388 return;
389 }
390
391 /*!
392 ******************************************************************************
393 * \if Function name : ihevce_sub_pic_rc_qp_query \endif
394 *
395 * \brief
396 * Sub-pic RC thread interface function
397 *
398 * \param[in] Frame process pointer
399 *
400 * \return
401 * None
402 *
403 * \author
404 * Ittiam
405 *
406 *****************************************************************************
407 */
ihevce_sub_pic_rc_scale_query(void * pv_multi_thrd_ctxt,void * pv_ctxt)408 void ihevce_sub_pic_rc_scale_query(void *pv_multi_thrd_ctxt, void *pv_ctxt)
409 {
410 multi_thrd_ctxt_t *ps_multi_thrd_ctxt = (multi_thrd_ctxt_t *)pv_multi_thrd_ctxt;
411 ihevce_enc_loop_ctxt_t *ps_ctxt = (ihevce_enc_loop_ctxt_t *)pv_ctxt;
412 WORD32 i4_mod_qp, i4_prev_qs;
413 WORD32 i4_previous_chunk_qp;
414
415 WORD32 i4_qp_delata_max_limit, i4_qp_delata_min_limit;
416
417 osal_mutex_lock(ps_multi_thrd_ctxt->pv_sub_pic_rc_for_qp_update_mutex_lock_hdl);
418
419 i4_mod_qp =
420 (ps_ctxt->ps_rc_quant_ctxt
421 ->pi4_qp_to_qscale[ps_ctxt->i4_frame_qp + ps_ctxt->ps_rc_quant_ctxt->i1_qp_offset]);
422 i4_previous_chunk_qp =
423 ps_multi_thrd_ctxt
424 ->ai4_prev_chunk_qp[ps_ctxt->i4_enc_frm_id][ps_ctxt->i4_bitrate_instance_num];
425 i4_prev_qs =
426 (ps_ctxt->ps_rc_quant_ctxt
427 ->pi4_qp_to_qscale[i4_previous_chunk_qp + ps_ctxt->ps_rc_quant_ctxt->i1_qp_offset]);
428 /*Limit the qp_delta_scale if it exceeds the limit of QP51 and QP 1 */
429
430 i4_qp_delata_max_limit =
431 ps_ctxt->ps_rc_quant_ctxt->i2_max_qscale * (1 << QP_LEVEL_MOD_ACT_FACTOR);
432 i4_qp_delata_max_limit = i4_qp_delata_max_limit / i4_mod_qp;
433
434 i4_qp_delata_min_limit =
435 ps_ctxt->ps_rc_quant_ctxt->i2_min_qscale * (1 << QP_LEVEL_MOD_ACT_FACTOR);
436 i4_qp_delata_min_limit = i4_qp_delata_min_limit / i4_mod_qp;
437 {
438 /*For Non-I SCD and Frames after SCD*/
439 /*The scale is tweeked to only increase qp (increased by 6) if the bits consumed is higher than bits
440 estimated */
441 ps_ctxt->i4_cu_qp_sub_pic_rc =
442 ps_multi_thrd_ctxt
443 ->ai4_curr_qp_estimated[ps_ctxt->i4_enc_frm_id][ps_ctxt->i4_bitrate_instance_num];
444 /*Limit the Qscale */
445 if(ps_ctxt->i4_cu_qp_sub_pic_rc > i4_qp_delata_max_limit)
446 {
447 ps_ctxt->i4_cu_qp_sub_pic_rc = i4_qp_delata_max_limit;
448 }
449 else if(ps_ctxt->i4_cu_qp_sub_pic_rc < i4_qp_delata_min_limit)
450 {
451 ps_ctxt->i4_cu_qp_sub_pic_rc = i4_qp_delata_min_limit;
452 }
453
454 ps_multi_thrd_ctxt
455 ->ai4_curr_qp_estimated[ps_ctxt->i4_enc_frm_id][ps_ctxt->i4_bitrate_instance_num] =
456 ps_ctxt->i4_cu_qp_sub_pic_rc;
457 }
458
459 /*Accumalate the CTB level QP here and feed to rc as average qp*/
460 {
461 WORD32 i4_mod_cur_qp, i4_mod_prev_qp;
462
463 i4_mod_cur_qp =
464 ((i4_mod_qp * ps_ctxt->i4_cu_qp_sub_pic_rc) + (1 << (QP_LEVEL_MOD_ACT_FACTOR - 1))) >>
465 QP_LEVEL_MOD_ACT_FACTOR;
466
467 /*Limit the qscale and qp */
468 if(i4_mod_cur_qp > ps_ctxt->ps_rc_quant_ctxt->i2_max_qscale)
469 {
470 i4_mod_cur_qp = ps_ctxt->ps_rc_quant_ctxt->i2_max_qscale;
471 ASSERT(0);
472 }
473 else if(i4_mod_cur_qp < ps_ctxt->ps_rc_quant_ctxt->i2_min_qscale)
474 {
475 i4_mod_cur_qp = ps_ctxt->ps_rc_quant_ctxt->i2_min_qscale;
476 ASSERT(0);
477 }
478
479 i4_mod_cur_qp = ps_ctxt->ps_rc_quant_ctxt->pi4_qscale_to_qp[i4_mod_cur_qp];
480 /*limit the prev qs*/
481 if(i4_prev_qs > ps_ctxt->ps_rc_quant_ctxt->i2_max_qscale)
482 {
483 i4_prev_qs = ps_ctxt->ps_rc_quant_ctxt->i2_max_qscale;
484 }
485 else if(i4_prev_qs < ps_ctxt->ps_rc_quant_ctxt->i2_min_qscale)
486 {
487 i4_prev_qs = ps_ctxt->ps_rc_quant_ctxt->i2_min_qscale;
488 }
489
490 i4_mod_prev_qp = ps_ctxt->ps_rc_quant_ctxt->pi4_qscale_to_qp[i4_prev_qs];
491
492 /*cur qp < prev qp, then allow only -1*/
493 if(i4_mod_cur_qp < i4_mod_prev_qp)
494 {
495 i4_mod_cur_qp = i4_mod_prev_qp - 1;
496 if(i4_mod_cur_qp < (ps_ctxt->i4_frame_qp - 6))
497 {
498 i4_mod_cur_qp = (ps_ctxt->i4_frame_qp - 6);
499 }
500 }
501
502 /*In case of lower QP, Qscale increase at every step is very low, which doesn't allow QP increase
503 to meet the rate, hence disable deviation clip below QP 4 for all bitdepth*/
504 if(i4_mod_cur_qp > i4_mod_prev_qp)
505 {
506 i4_mod_cur_qp = MIN(i4_mod_prev_qp + 3, i4_mod_cur_qp);
507 }
508
509 /* CLIP to maintain Qp between user configured and min and max Qp values*/
510 if(i4_mod_cur_qp > ps_ctxt->ps_rc_quant_ctxt->i2_max_qp)
511 i4_mod_cur_qp = ps_ctxt->ps_rc_quant_ctxt->i2_max_qp;
512 else if(i4_mod_cur_qp < ps_ctxt->ps_rc_quant_ctxt->i2_min_qp)
513 i4_mod_cur_qp = ps_ctxt->ps_rc_quant_ctxt->i2_min_qp;
514
515 /*Modify the qp based on delta*/
516 ps_ctxt->i4_frame_mod_qp = i4_mod_cur_qp;
517 ps_ctxt->i4_is_first_query = 0;
518 if(ps_ctxt->i4_frame_mod_qp != ps_ctxt->i4_frame_qp)
519 {
520 ps_ctxt->i4_is_ctb_qp_modified = 1;
521 }
522 }
523
524 ps_multi_thrd_ctxt->ai4_curr_qp_acc[ps_ctxt->i4_enc_frm_id][ps_ctxt->i4_bitrate_instance_num] +=
525 ps_ctxt->i4_frame_mod_qp;
526
527 osal_mutex_unlock(ps_multi_thrd_ctxt->pv_sub_pic_rc_for_qp_update_mutex_lock_hdl);
528
529 return;
530 }
531