1; 2; jidctint.asm - accurate integer IDCT (64-bit AVX2) 3; 4; Copyright 2009 Pierre Ossman <ossman@cendio.se> for Cendio AB 5; Copyright (C) 2009, 2016, 2018, 2020, D. R. Commander. 6; Copyright (C) 2018, Matthias Räncker. 7; 8; Based on the x86 SIMD extension for IJG JPEG library 9; Copyright (C) 1999-2006, MIYASAKA Masaru. 10; For conditions of distribution and use, see copyright notice in jsimdext.inc 11; 12; This file should be assembled with NASM (Netwide Assembler), 13; can *not* be assembled with Microsoft's MASM or any compatible 14; assembler (including Borland's Turbo Assembler). 15; NASM is available from http://nasm.sourceforge.net/ or 16; http://sourceforge.net/project/showfiles.php?group_id=6208 17; 18; This file contains a slower but more accurate integer implementation of the 19; inverse DCT (Discrete Cosine Transform). The following code is based 20; directly on the IJG's original jidctint.c; see the jidctint.c for 21; more details. 22 23%include "jsimdext.inc" 24%include "jdct.inc" 25 26; -------------------------------------------------------------------------- 27 28%define CONST_BITS 13 29%define PASS1_BITS 2 30 31%define DESCALE_P1 (CONST_BITS - PASS1_BITS) 32%define DESCALE_P2 (CONST_BITS + PASS1_BITS + 3) 33 34%if CONST_BITS == 13 35F_0_298 equ 2446 ; FIX(0.298631336) 36F_0_390 equ 3196 ; FIX(0.390180644) 37F_0_541 equ 4433 ; FIX(0.541196100) 38F_0_765 equ 6270 ; FIX(0.765366865) 39F_0_899 equ 7373 ; FIX(0.899976223) 40F_1_175 equ 9633 ; FIX(1.175875602) 41F_1_501 equ 12299 ; FIX(1.501321110) 42F_1_847 equ 15137 ; FIX(1.847759065) 43F_1_961 equ 16069 ; FIX(1.961570560) 44F_2_053 equ 16819 ; FIX(2.053119869) 45F_2_562 equ 20995 ; FIX(2.562915447) 46F_3_072 equ 25172 ; FIX(3.072711026) 47%else 48; NASM cannot do compile-time arithmetic on floating-point constants. 49%define DESCALE(x, n) (((x) + (1 << ((n) - 1))) >> (n)) 50F_0_298 equ DESCALE( 320652955, 30 - CONST_BITS) ; FIX(0.298631336) 51F_0_390 equ DESCALE( 418953276, 30 - CONST_BITS) ; FIX(0.390180644) 52F_0_541 equ DESCALE( 581104887, 30 - CONST_BITS) ; FIX(0.541196100) 53F_0_765 equ DESCALE( 821806413, 30 - CONST_BITS) ; FIX(0.765366865) 54F_0_899 equ DESCALE( 966342111, 30 - CONST_BITS) ; FIX(0.899976223) 55F_1_175 equ DESCALE(1262586813, 30 - CONST_BITS) ; FIX(1.175875602) 56F_1_501 equ DESCALE(1612031267, 30 - CONST_BITS) ; FIX(1.501321110) 57F_1_847 equ DESCALE(1984016188, 30 - CONST_BITS) ; FIX(1.847759065) 58F_1_961 equ DESCALE(2106220350, 30 - CONST_BITS) ; FIX(1.961570560) 59F_2_053 equ DESCALE(2204520673, 30 - CONST_BITS) ; FIX(2.053119869) 60F_2_562 equ DESCALE(2751909506, 30 - CONST_BITS) ; FIX(2.562915447) 61F_3_072 equ DESCALE(3299298341, 30 - CONST_BITS) ; FIX(3.072711026) 62%endif 63 64; -------------------------------------------------------------------------- 65; In-place 8x8x16-bit inverse matrix transpose using AVX2 instructions 66; %1-%4: Input/output registers 67; %5-%8: Temp registers 68 69%macro dotranspose 8 70 ; %5=(00 10 20 30 40 50 60 70 01 11 21 31 41 51 61 71) 71 ; %6=(03 13 23 33 43 53 63 73 02 12 22 32 42 52 62 72) 72 ; %7=(04 14 24 34 44 54 64 74 05 15 25 35 45 55 65 75) 73 ; %8=(07 17 27 37 47 57 67 77 06 16 26 36 46 56 66 76) 74 75 vpermq %5, %1, 0xD8 76 vpermq %6, %2, 0x72 77 vpermq %7, %3, 0xD8 78 vpermq %8, %4, 0x72 79 ; transpose coefficients(phase 1) 80 ; %5=(00 10 20 30 01 11 21 31 40 50 60 70 41 51 61 71) 81 ; %6=(02 12 22 32 03 13 23 33 42 52 62 72 43 53 63 73) 82 ; %7=(04 14 24 34 05 15 25 35 44 54 64 74 45 55 65 75) 83 ; %8=(06 16 26 36 07 17 27 37 46 56 66 76 47 57 67 77) 84 85 vpunpcklwd %1, %5, %6 86 vpunpckhwd %2, %5, %6 87 vpunpcklwd %3, %7, %8 88 vpunpckhwd %4, %7, %8 89 ; transpose coefficients(phase 2) 90 ; %1=(00 02 10 12 20 22 30 32 40 42 50 52 60 62 70 72) 91 ; %2=(01 03 11 13 21 23 31 33 41 43 51 53 61 63 71 73) 92 ; %3=(04 06 14 16 24 26 34 36 44 46 54 56 64 66 74 76) 93 ; %4=(05 07 15 17 25 27 35 37 45 47 55 57 65 67 75 77) 94 95 vpunpcklwd %5, %1, %2 96 vpunpcklwd %6, %3, %4 97 vpunpckhwd %7, %1, %2 98 vpunpckhwd %8, %3, %4 99 ; transpose coefficients(phase 3) 100 ; %5=(00 01 02 03 10 11 12 13 40 41 42 43 50 51 52 53) 101 ; %6=(04 05 06 07 14 15 16 17 44 45 46 47 54 55 56 57) 102 ; %7=(20 21 22 23 30 31 32 33 60 61 62 63 70 71 72 73) 103 ; %8=(24 25 26 27 34 35 36 37 64 65 66 67 74 75 76 77) 104 105 vpunpcklqdq %1, %5, %6 106 vpunpckhqdq %2, %5, %6 107 vpunpcklqdq %3, %7, %8 108 vpunpckhqdq %4, %7, %8 109 ; transpose coefficients(phase 4) 110 ; %1=(00 01 02 03 04 05 06 07 40 41 42 43 44 45 46 47) 111 ; %2=(10 11 12 13 14 15 16 17 50 51 52 53 54 55 56 57) 112 ; %3=(20 21 22 23 24 25 26 27 60 61 62 63 64 65 66 67) 113 ; %4=(30 31 32 33 34 35 36 37 70 71 72 73 74 75 76 77) 114%endmacro 115 116; -------------------------------------------------------------------------- 117; In-place 8x8x16-bit accurate integer inverse DCT using AVX2 instructions 118; %1-%4: Input/output registers 119; %5-%12: Temp registers 120; %9: Pass (1 or 2) 121 122%macro dodct 13 123 ; -- Even part 124 125 ; (Original) 126 ; z1 = (z2 + z3) * 0.541196100; 127 ; tmp2 = z1 + z3 * -1.847759065; 128 ; tmp3 = z1 + z2 * 0.765366865; 129 ; 130 ; (This implementation) 131 ; tmp2 = z2 * 0.541196100 + z3 * (0.541196100 - 1.847759065); 132 ; tmp3 = z2 * (0.541196100 + 0.765366865) + z3 * 0.541196100; 133 134 vperm2i128 %6, %3, %3, 0x01 ; %6=in6_2 135 vpunpcklwd %5, %3, %6 ; %5=in26_62L 136 vpunpckhwd %6, %3, %6 ; %6=in26_62H 137 vpmaddwd %5, %5, [rel PW_F130_F054_MF130_F054] ; %5=tmp3_2L 138 vpmaddwd %6, %6, [rel PW_F130_F054_MF130_F054] ; %6=tmp3_2H 139 140 vperm2i128 %7, %1, %1, 0x01 ; %7=in4_0 141 vpsignw %1, %1, [rel PW_1_NEG1] 142 vpaddw %7, %7, %1 ; %7=(in0+in4)_(in0-in4) 143 144 vpxor %1, %1, %1 145 vpunpcklwd %8, %1, %7 ; %8=tmp0_1L 146 vpunpckhwd %1, %1, %7 ; %1=tmp0_1H 147 vpsrad %8, %8, (16-CONST_BITS) ; vpsrad %8,16 & vpslld %8,CONST_BITS 148 vpsrad %1, %1, (16-CONST_BITS) ; vpsrad %1,16 & vpslld %1,CONST_BITS 149 150 vpsubd %11, %8, %5 ; %11=tmp0_1L-tmp3_2L=tmp13_12L 151 vpaddd %9, %8, %5 ; %9=tmp0_1L+tmp3_2L=tmp10_11L 152 vpsubd %12, %1, %6 ; %12=tmp0_1H-tmp3_2H=tmp13_12H 153 vpaddd %10, %1, %6 ; %10=tmp0_1H+tmp3_2H=tmp10_11H 154 155 ; -- Odd part 156 157 vpaddw %1, %4, %2 ; %1=in7_5+in3_1=z3_4 158 159 ; (Original) 160 ; z5 = (z3 + z4) * 1.175875602; 161 ; z3 = z3 * -1.961570560; z4 = z4 * -0.390180644; 162 ; z3 += z5; z4 += z5; 163 ; 164 ; (This implementation) 165 ; z3 = z3 * (1.175875602 - 1.961570560) + z4 * 1.175875602; 166 ; z4 = z3 * 1.175875602 + z4 * (1.175875602 - 0.390180644); 167 168 vperm2i128 %8, %1, %1, 0x01 ; %8=z4_3 169 vpunpcklwd %7, %1, %8 ; %7=z34_43L 170 vpunpckhwd %8, %1, %8 ; %8=z34_43H 171 vpmaddwd %7, %7, [rel PW_MF078_F117_F078_F117] ; %7=z3_4L 172 vpmaddwd %8, %8, [rel PW_MF078_F117_F078_F117] ; %8=z3_4H 173 174 ; (Original) 175 ; z1 = tmp0 + tmp3; z2 = tmp1 + tmp2; 176 ; tmp0 = tmp0 * 0.298631336; tmp1 = tmp1 * 2.053119869; 177 ; tmp2 = tmp2 * 3.072711026; tmp3 = tmp3 * 1.501321110; 178 ; z1 = z1 * -0.899976223; z2 = z2 * -2.562915447; 179 ; tmp0 += z1 + z3; tmp1 += z2 + z4; 180 ; tmp2 += z2 + z3; tmp3 += z1 + z4; 181 ; 182 ; (This implementation) 183 ; tmp0 = tmp0 * (0.298631336 - 0.899976223) + tmp3 * -0.899976223; 184 ; tmp1 = tmp1 * (2.053119869 - 2.562915447) + tmp2 * -2.562915447; 185 ; tmp2 = tmp1 * -2.562915447 + tmp2 * (3.072711026 - 2.562915447); 186 ; tmp3 = tmp0 * -0.899976223 + tmp3 * (1.501321110 - 0.899976223); 187 ; tmp0 += z3; tmp1 += z4; 188 ; tmp2 += z3; tmp3 += z4; 189 190 vperm2i128 %2, %2, %2, 0x01 ; %2=in1_3 191 vpunpcklwd %3, %4, %2 ; %3=in71_53L 192 vpunpckhwd %4, %4, %2 ; %4=in71_53H 193 194 vpmaddwd %5, %3, [rel PW_MF060_MF089_MF050_MF256] ; %5=tmp0_1L 195 vpmaddwd %6, %4, [rel PW_MF060_MF089_MF050_MF256] ; %6=tmp0_1H 196 vpaddd %5, %5, %7 ; %5=tmp0_1L+z3_4L=tmp0_1L 197 vpaddd %6, %6, %8 ; %6=tmp0_1H+z3_4H=tmp0_1H 198 199 vpmaddwd %3, %3, [rel PW_MF089_F060_MF256_F050] ; %3=tmp3_2L 200 vpmaddwd %4, %4, [rel PW_MF089_F060_MF256_F050] ; %4=tmp3_2H 201 vperm2i128 %7, %7, %7, 0x01 ; %7=z4_3L 202 vperm2i128 %8, %8, %8, 0x01 ; %8=z4_3H 203 vpaddd %7, %3, %7 ; %7=tmp3_2L+z4_3L=tmp3_2L 204 vpaddd %8, %4, %8 ; %8=tmp3_2H+z4_3H=tmp3_2H 205 206 ; -- Final output stage 207 208 vpaddd %1, %9, %7 ; %1=tmp10_11L+tmp3_2L=data0_1L 209 vpaddd %2, %10, %8 ; %2=tmp10_11H+tmp3_2H=data0_1H 210 vpaddd %1, %1, [rel PD_DESCALE_P %+ %13] 211 vpaddd %2, %2, [rel PD_DESCALE_P %+ %13] 212 vpsrad %1, %1, DESCALE_P %+ %13 213 vpsrad %2, %2, DESCALE_P %+ %13 214 vpackssdw %1, %1, %2 ; %1=data0_1 215 216 vpsubd %3, %9, %7 ; %3=tmp10_11L-tmp3_2L=data7_6L 217 vpsubd %4, %10, %8 ; %4=tmp10_11H-tmp3_2H=data7_6H 218 vpaddd %3, %3, [rel PD_DESCALE_P %+ %13] 219 vpaddd %4, %4, [rel PD_DESCALE_P %+ %13] 220 vpsrad %3, %3, DESCALE_P %+ %13 221 vpsrad %4, %4, DESCALE_P %+ %13 222 vpackssdw %4, %3, %4 ; %4=data7_6 223 224 vpaddd %7, %11, %5 ; %7=tmp13_12L+tmp0_1L=data3_2L 225 vpaddd %8, %12, %6 ; %8=tmp13_12H+tmp0_1H=data3_2H 226 vpaddd %7, %7, [rel PD_DESCALE_P %+ %13] 227 vpaddd %8, %8, [rel PD_DESCALE_P %+ %13] 228 vpsrad %7, %7, DESCALE_P %+ %13 229 vpsrad %8, %8, DESCALE_P %+ %13 230 vpackssdw %2, %7, %8 ; %2=data3_2 231 232 vpsubd %7, %11, %5 ; %7=tmp13_12L-tmp0_1L=data4_5L 233 vpsubd %8, %12, %6 ; %8=tmp13_12H-tmp0_1H=data4_5H 234 vpaddd %7, %7, [rel PD_DESCALE_P %+ %13] 235 vpaddd %8, %8, [rel PD_DESCALE_P %+ %13] 236 vpsrad %7, %7, DESCALE_P %+ %13 237 vpsrad %8, %8, DESCALE_P %+ %13 238 vpackssdw %3, %7, %8 ; %3=data4_5 239%endmacro 240 241; -------------------------------------------------------------------------- 242 SECTION SEG_CONST 243 244 alignz 32 245 GLOBAL_DATA(jconst_idct_islow_avx2) 246 247EXTN(jconst_idct_islow_avx2): 248 249PW_F130_F054_MF130_F054 times 4 dw (F_0_541 + F_0_765), F_0_541 250 times 4 dw (F_0_541 - F_1_847), F_0_541 251PW_MF078_F117_F078_F117 times 4 dw (F_1_175 - F_1_961), F_1_175 252 times 4 dw (F_1_175 - F_0_390), F_1_175 253PW_MF060_MF089_MF050_MF256 times 4 dw (F_0_298 - F_0_899), -F_0_899 254 times 4 dw (F_2_053 - F_2_562), -F_2_562 255PW_MF089_F060_MF256_F050 times 4 dw -F_0_899, (F_1_501 - F_0_899) 256 times 4 dw -F_2_562, (F_3_072 - F_2_562) 257PD_DESCALE_P1 times 8 dd 1 << (DESCALE_P1 - 1) 258PD_DESCALE_P2 times 8 dd 1 << (DESCALE_P2 - 1) 259PB_CENTERJSAMP times 32 db CENTERJSAMPLE 260PW_1_NEG1 times 8 dw 1 261 times 8 dw -1 262 263 alignz 32 264 265; -------------------------------------------------------------------------- 266 SECTION SEG_TEXT 267 BITS 64 268; 269; Perform dequantization and inverse DCT on one block of coefficients. 270; 271; GLOBAL(void) 272; jsimd_idct_islow_avx2(void *dct_table, JCOEFPTR coef_block, 273; JSAMPARRAY output_buf, JDIMENSION output_col) 274; 275 276; r10 = jpeg_component_info *compptr 277; r11 = JCOEFPTR coef_block 278; r12 = JSAMPARRAY output_buf 279; r13d = JDIMENSION output_col 280 281 align 32 282 GLOBAL_FUNCTION(jsimd_idct_islow_avx2) 283 284EXTN(jsimd_idct_islow_avx2): 285 push rbp 286 mov rax, rsp ; rax = original rbp 287 mov rbp, rsp ; rbp = aligned rbp 288 push_xmm 4 289 collect_args 4 290 291 ; ---- Pass 1: process columns. 292 293%ifndef NO_ZERO_COLUMN_TEST_ISLOW_AVX2 294 mov eax, dword [DWBLOCK(1,0,r11,SIZEOF_JCOEF)] 295 or eax, dword [DWBLOCK(2,0,r11,SIZEOF_JCOEF)] 296 jnz near .columnDCT 297 298 movdqa xmm0, XMMWORD [XMMBLOCK(1,0,r11,SIZEOF_JCOEF)] 299 movdqa xmm1, XMMWORD [XMMBLOCK(2,0,r11,SIZEOF_JCOEF)] 300 vpor xmm0, xmm0, XMMWORD [XMMBLOCK(3,0,r11,SIZEOF_JCOEF)] 301 vpor xmm1, xmm1, XMMWORD [XMMBLOCK(4,0,r11,SIZEOF_JCOEF)] 302 vpor xmm0, xmm0, XMMWORD [XMMBLOCK(5,0,r11,SIZEOF_JCOEF)] 303 vpor xmm1, xmm1, XMMWORD [XMMBLOCK(6,0,r11,SIZEOF_JCOEF)] 304 vpor xmm0, xmm0, XMMWORD [XMMBLOCK(7,0,r11,SIZEOF_JCOEF)] 305 vpor xmm1, xmm1, xmm0 306 vpacksswb xmm1, xmm1, xmm1 307 vpacksswb xmm1, xmm1, xmm1 308 movd eax, xmm1 309 test rax, rax 310 jnz short .columnDCT 311 312 ; -- AC terms all zero 313 314 movdqa xmm5, XMMWORD [XMMBLOCK(0,0,r11,SIZEOF_JCOEF)] 315 vpmullw xmm5, xmm5, XMMWORD [XMMBLOCK(0,0,r10,SIZEOF_ISLOW_MULT_TYPE)] 316 317 vpsllw xmm5, xmm5, PASS1_BITS 318 319 vpunpcklwd xmm4, xmm5, xmm5 ; xmm4=(00 00 01 01 02 02 03 03) 320 vpunpckhwd xmm5, xmm5, xmm5 ; xmm5=(04 04 05 05 06 06 07 07) 321 vinserti128 ymm4, ymm4, xmm5, 1 322 323 vpshufd ymm0, ymm4, 0x00 ; ymm0=col0_4=(00 00 00 00 00 00 00 00 04 04 04 04 04 04 04 04) 324 vpshufd ymm1, ymm4, 0x55 ; ymm1=col1_5=(01 01 01 01 01 01 01 01 05 05 05 05 05 05 05 05) 325 vpshufd ymm2, ymm4, 0xAA ; ymm2=col2_6=(02 02 02 02 02 02 02 02 06 06 06 06 06 06 06 06) 326 vpshufd ymm3, ymm4, 0xFF ; ymm3=col3_7=(03 03 03 03 03 03 03 03 07 07 07 07 07 07 07 07) 327 328 jmp near .column_end 329%endif 330.columnDCT: 331 332 vmovdqu ymm4, YMMWORD [YMMBLOCK(0,0,r11,SIZEOF_JCOEF)] ; ymm4=in0_1 333 vmovdqu ymm5, YMMWORD [YMMBLOCK(2,0,r11,SIZEOF_JCOEF)] ; ymm5=in2_3 334 vmovdqu ymm6, YMMWORD [YMMBLOCK(4,0,r11,SIZEOF_JCOEF)] ; ymm6=in4_5 335 vmovdqu ymm7, YMMWORD [YMMBLOCK(6,0,r11,SIZEOF_JCOEF)] ; ymm7=in6_7 336 vpmullw ymm4, ymm4, YMMWORD [YMMBLOCK(0,0,r10,SIZEOF_ISLOW_MULT_TYPE)] 337 vpmullw ymm5, ymm5, YMMWORD [YMMBLOCK(2,0,r10,SIZEOF_ISLOW_MULT_TYPE)] 338 vpmullw ymm6, ymm6, YMMWORD [YMMBLOCK(4,0,r10,SIZEOF_ISLOW_MULT_TYPE)] 339 vpmullw ymm7, ymm7, YMMWORD [YMMBLOCK(6,0,r10,SIZEOF_ISLOW_MULT_TYPE)] 340 341 vperm2i128 ymm0, ymm4, ymm6, 0x20 ; ymm0=in0_4 342 vperm2i128 ymm1, ymm5, ymm4, 0x31 ; ymm1=in3_1 343 vperm2i128 ymm2, ymm5, ymm7, 0x20 ; ymm2=in2_6 344 vperm2i128 ymm3, ymm7, ymm6, 0x31 ; ymm3=in7_5 345 346 dodct ymm0, ymm1, ymm2, ymm3, ymm4, ymm5, ymm6, ymm7, ymm8, ymm9, ymm10, ymm11, 1 347 ; ymm0=data0_1, ymm1=data3_2, ymm2=data4_5, ymm3=data7_6 348 349 dotranspose ymm0, ymm1, ymm2, ymm3, ymm4, ymm5, ymm6, ymm7 350 ; ymm0=data0_4, ymm1=data1_5, ymm2=data2_6, ymm3=data3_7 351 352.column_end: 353 354 ; -- Prefetch the next coefficient block 355 356 prefetchnta [r11 + DCTSIZE2*SIZEOF_JCOEF + 0*32] 357 prefetchnta [r11 + DCTSIZE2*SIZEOF_JCOEF + 1*32] 358 prefetchnta [r11 + DCTSIZE2*SIZEOF_JCOEF + 2*32] 359 prefetchnta [r11 + DCTSIZE2*SIZEOF_JCOEF + 3*32] 360 361 ; ---- Pass 2: process rows. 362 363 vperm2i128 ymm4, ymm3, ymm1, 0x31 ; ymm3=in7_5 364 vperm2i128 ymm1, ymm3, ymm1, 0x20 ; ymm1=in3_1 365 366 dodct ymm0, ymm1, ymm2, ymm4, ymm3, ymm5, ymm6, ymm7, ymm8, ymm9, ymm10, ymm11, 2 367 ; ymm0=data0_1, ymm1=data3_2, ymm2=data4_5, ymm4=data7_6 368 369 dotranspose ymm0, ymm1, ymm2, ymm4, ymm3, ymm5, ymm6, ymm7 370 ; ymm0=data0_4, ymm1=data1_5, ymm2=data2_6, ymm4=data3_7 371 372 vpacksswb ymm0, ymm0, ymm1 ; ymm0=data01_45 373 vpacksswb ymm1, ymm2, ymm4 ; ymm1=data23_67 374 vpaddb ymm0, ymm0, [rel PB_CENTERJSAMP] 375 vpaddb ymm1, ymm1, [rel PB_CENTERJSAMP] 376 377 vextracti128 xmm6, ymm1, 1 ; xmm3=data67 378 vextracti128 xmm4, ymm0, 1 ; xmm2=data45 379 vextracti128 xmm2, ymm1, 0 ; xmm1=data23 380 vextracti128 xmm0, ymm0, 0 ; xmm0=data01 381 382 vpshufd xmm1, xmm0, 0x4E ; xmm1=(10 11 12 13 14 15 16 17 00 01 02 03 04 05 06 07) 383 vpshufd xmm3, xmm2, 0x4E ; xmm3=(30 31 32 33 34 35 36 37 20 21 22 23 24 25 26 27) 384 vpshufd xmm5, xmm4, 0x4E ; xmm5=(50 51 52 53 54 55 56 57 40 41 42 43 44 45 46 47) 385 vpshufd xmm7, xmm6, 0x4E ; xmm7=(70 71 72 73 74 75 76 77 60 61 62 63 64 65 66 67) 386 387 vzeroupper 388 389 mov eax, r13d 390 391 mov rdxp, JSAMPROW [r12+0*SIZEOF_JSAMPROW] ; (JSAMPLE *) 392 mov rsip, JSAMPROW [r12+1*SIZEOF_JSAMPROW] ; (JSAMPLE *) 393 movq XMM_MMWORD [rdx+rax*SIZEOF_JSAMPLE], xmm0 394 movq XMM_MMWORD [rsi+rax*SIZEOF_JSAMPLE], xmm1 395 396 mov rdxp, JSAMPROW [r12+2*SIZEOF_JSAMPROW] ; (JSAMPLE *) 397 mov rsip, JSAMPROW [r12+3*SIZEOF_JSAMPROW] ; (JSAMPLE *) 398 movq XMM_MMWORD [rdx+rax*SIZEOF_JSAMPLE], xmm2 399 movq XMM_MMWORD [rsi+rax*SIZEOF_JSAMPLE], xmm3 400 401 mov rdxp, JSAMPROW [r12+4*SIZEOF_JSAMPROW] ; (JSAMPLE *) 402 mov rsip, JSAMPROW [r12+5*SIZEOF_JSAMPROW] ; (JSAMPLE *) 403 movq XMM_MMWORD [rdx+rax*SIZEOF_JSAMPLE], xmm4 404 movq XMM_MMWORD [rsi+rax*SIZEOF_JSAMPLE], xmm5 405 406 mov rdxp, JSAMPROW [r12+6*SIZEOF_JSAMPROW] ; (JSAMPLE *) 407 mov rsip, JSAMPROW [r12+7*SIZEOF_JSAMPROW] ; (JSAMPLE *) 408 movq XMM_MMWORD [rdx+rax*SIZEOF_JSAMPLE], xmm6 409 movq XMM_MMWORD [rsi+rax*SIZEOF_JSAMPLE], xmm7 410 411 uncollect_args 4 412 pop_xmm 4 413 pop rbp 414 ret 415 416; For some reason, the OS X linker does not honor the request to align the 417; segment unless we do this. 418 align 32 419