1 /******************************************************************************
2 * *
3 * Copyright (C) 2018 The Android Open Source Project
4 *
5 * Licensed under the Apache License, Version 2.0 (the "License");
6 * you may not use this file except in compliance with the License.
7 * You may obtain a copy of the License at:
8 *
9 * http://www.apache.org/licenses/LICENSE-2.0
10 *
11 * Unless required by applicable law or agreed to in writing, software
12 * distributed under the License is distributed on an "AS IS" BASIS,
13 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
14 * See the License for the specific language governing permissions and
15 * limitations under the License.
16 *
17 *****************************************************************************
18 * Originally developed and contributed by Ittiam Systems Pvt. Ltd, Bangalore
19 */
20 #include "ixheaacd_type_def.h"
21 #include "ixheaacd_constants.h"
22 #include "ixheaacd_memory_standards.h"
23 #include "ixheaacd_mps_struct_def.h"
24 #include "ixheaacd_mps_res_rom.h"
25 #include "ixheaacd_defines.h"
26 #include "ixheaacd_mps_aac_struct.h"
27
28 #include "ixheaacd_sbr_common.h"
29 #include "ixheaacd_bitbuffer.h"
30 #include "ixheaacd_defines.h"
31 #include "ixheaacd_aac_rom.h"
32
33 #include "ixheaacd_sbrdecsettings.h"
34 #include "ixheaacd_sbr_scale.h"
35 #include "ixheaacd_env_extr_part.h"
36 #include "ixheaacd_sbr_rom.h"
37
38 #include "ixheaacd_common_rom.h"
39 #include "ixheaacd_pulsedata.h"
40
41 #include "ixheaacd_pns.h"
42 #include "ixheaacd_drc_data_struct.h"
43
44 #include "ixheaacd_lt_predict.h"
45 #include "ixheaacd_cnst.h"
46 #include "ixheaacd_ec_defines.h"
47 #include "ixheaacd_ec_struct_def.h"
48
49 #include "ixheaacd_channelinfo.h"
50 #include "ixheaacd_drc_dec.h"
51 #include "ixheaacd_sbrdecoder.h"
52
53 #include "ixheaacd_channel.h"
54
55 #include "ixheaacd_audioobjtypes.h"
56 #include "ixheaacd_memory_standards.h"
57 #include "ixheaacd_adts.h"
58 #include "ixheaacd_audioobjtypes.h"
59 #include "ixheaacd_latmdemux.h"
60 #include "ixheaacd_aacdec.h"
61
62 #include "ixheaacd_hybrid.h"
63 #include "ixheaacd_ps_dec.h"
64
65 #include "ixheaacd_mps_polyphase.h"
66 #include "ixheaacd_config.h"
67 #include "ixheaacd_qmf_dec.h"
68 #include "ixheaacd_mps_dec.h"
69
70 #include "ixheaacd_struct_def.h"
71 #include "ixheaacd_error_codes.h"
72
73 #include "ixheaacd_adts_crc_check.h"
74
ixheaacd_adts_crc_open(ia_adts_crc_info_struct * ptr_adts_crc_info)75 VOID ixheaacd_adts_crc_open(ia_adts_crc_info_struct *ptr_adts_crc_info) {
76 WORD32 i, j;
77 UWORD16 val;
78
79 ptr_adts_crc_info->no_reg = 0;
80 ptr_adts_crc_info->crc_active = 0;
81
82 for (i = 0; i <= 255; ++i) {
83 for (val = i << 8, j = 8; --j >= 0;) {
84 val = (val & 0x8000) ? (val << 1) ^ 0x8005 : val << 1;
85 }
86
87 ptr_adts_crc_info->crc_lookup[i] = val;
88 }
89 }
90
ixheaacd_copy_bit_buf_state(ia_bit_buf_struct * it_bit_buff_src,ia_crc_bit_buf_struct_handle it_crc_bit_buff_dst)91 VOID ixheaacd_copy_bit_buf_state(
92 ia_bit_buf_struct *it_bit_buff_src,
93 ia_crc_bit_buf_struct_handle it_crc_bit_buff_dst) {
94 it_crc_bit_buff_dst->ptr_bit_buf_base = it_bit_buff_src->ptr_bit_buf_base;
95 it_crc_bit_buff_dst->ptr_bit_buf_end = it_bit_buff_src->ptr_bit_buf_end;
96 it_crc_bit_buff_dst->ptr_read_next = it_bit_buff_src->ptr_read_next;
97 it_crc_bit_buff_dst->bit_pos = it_bit_buff_src->bit_pos;
98 it_crc_bit_buff_dst->cnt_bits = it_bit_buff_src->cnt_bits;
99 it_crc_bit_buff_dst->size = it_bit_buff_src->size;
100 }
101
ixheaacd_adts_crc_start_reg(ia_adts_crc_info_struct * ptr_adts_crc_info,ia_bit_buf_struct * it_bit_buff_src,WORD32 no_bits)102 WORD32 ixheaacd_adts_crc_start_reg(ia_adts_crc_info_struct *ptr_adts_crc_info,
103 ia_bit_buf_struct *it_bit_buff_src,
104 WORD32 no_bits) {
105 UWORD32 no_bytes;
106
107 ptr_adts_crc_info->str_crc_reg_data[ptr_adts_crc_info->no_reg].bit_cnt = 0;
108 ptr_adts_crc_info->str_crc_reg_data[ptr_adts_crc_info->no_reg].max_bits =
109 no_bits;
110
111 if (no_bits < 0) {
112 no_bits = -no_bits;
113 }
114
115 if (no_bits == 0) {
116 no_bits = 16 << 3;
117 }
118
119 no_bytes = no_bits >> 3;
120
121 if (no_bytes << 3 < (UWORD32)no_bits) {
122 no_bytes++;
123 }
124
125 ptr_adts_crc_info->str_crc_reg_data[ptr_adts_crc_info->no_reg].buf_size =
126 no_bytes;
127 ptr_adts_crc_info->str_crc_reg_data[ptr_adts_crc_info->no_reg].active = 1;
128
129 ixheaacd_copy_bit_buf_state(
130 it_bit_buff_src,
131 &(ptr_adts_crc_info->str_crc_reg_data[ptr_adts_crc_info->no_reg]
132 .str_bit_buf));
133
134 ptr_adts_crc_info->no_reg += 1;
135
136 return (ptr_adts_crc_info->no_reg - 1);
137 }
138
ixheaacd_adts_crc_end_reg(ia_adts_crc_info_struct * ptr_adts_crc_info,ia_bit_buf_struct * it_bit_buff_src,WORD32 reg)139 VOID ixheaacd_adts_crc_end_reg(ia_adts_crc_info_struct *ptr_adts_crc_info,
140 ia_bit_buf_struct *it_bit_buff_src, WORD32 reg) {
141 ptr_adts_crc_info->str_crc_reg_data[reg].active = 0;
142 ptr_adts_crc_info->str_crc_reg_data[reg].bit_buf_cnt =
143 ptr_adts_crc_info->str_crc_reg_data[reg].str_bit_buf.cnt_bits -
144 it_bit_buff_src->cnt_bits;
145 }
146
ixheaacd_adts_crc_fast_crc(ia_adts_crc_info_struct * ptr_adts_crc_info,UWORD16 * crc_reg,UWORD8 feed)147 VOID ixheaacd_adts_crc_fast_crc(ia_adts_crc_info_struct *ptr_adts_crc_info,
148 UWORD16 *crc_reg, UWORD8 feed) {
149 *crc_reg =
150 (*crc_reg << 8) ^ ptr_adts_crc_info->crc_lookup[(*crc_reg >> 8) ^ feed];
151 }
152
ixheaacd_adts_crc_slow_crc(UWORD16 * crc_reg,UWORD8 feed,UWORD32 no_bits)153 VOID ixheaacd_adts_crc_slow_crc(UWORD16 *crc_reg, UWORD8 feed,
154 UWORD32 no_bits) {
155 UWORD32 i;
156 UWORD16 tmp;
157 for (i = 0; i < no_bits; i++) {
158 tmp = (feed & (1 << (7 - i))) >> (7 - i);
159 tmp ^= (*crc_reg & (1 << 15)) >> 15;
160 tmp *= 32773;
161 *crc_reg <<= 1;
162 *crc_reg ^= tmp;
163 }
164 }
165
ixheaacd_adts_crc_check_crc(ia_adts_crc_info_struct * ptr_adts_crc_info)166 WORD32 ixheaacd_adts_crc_check_crc(ia_adts_crc_info_struct *ptr_adts_crc_info) {
167 WORD32 error_code = AAC_DEC_OK;
168 UWORD16 crc = 65535;
169 WORD32 reg;
170 ia_crc_reg_data_struct *ptr_reg_data;
171
172 for (reg = 0; reg < ptr_adts_crc_info->no_reg; reg++) {
173 UWORD8 bits;
174 WORD32 bits_remaining;
175
176 ptr_reg_data = &ptr_adts_crc_info->str_crc_reg_data[reg];
177
178 if (ptr_reg_data->max_bits > 0) {
179 if (ptr_adts_crc_info->str_crc_reg_data[reg].bit_buf_cnt >
180 ptr_reg_data->max_bits)
181 bits_remaining = ptr_reg_data->max_bits;
182 else
183 bits_remaining = ptr_adts_crc_info->str_crc_reg_data[reg].bit_buf_cnt;
184 } else {
185 bits_remaining = ptr_adts_crc_info->str_crc_reg_data[reg].bit_buf_cnt;
186 }
187
188 while (bits_remaining >= 8) {
189 if (ptr_reg_data->str_bit_buf.cnt_bits < 8) {
190 return IA_XHEAAC_DEC_EXE_NONFATAL_INSUFFICIENT_INPUT_BYTES;
191 }
192 bits = (UWORD8)ixheaacd_read_bits_buf(
193 (ia_bit_buf_struct *)(&ptr_adts_crc_info->str_crc_reg_data[reg]
194 .str_bit_buf),
195 8);
196 ixheaacd_adts_crc_fast_crc(ptr_adts_crc_info, &crc, bits);
197 bits_remaining -= 8;
198 }
199
200 if (ptr_reg_data->str_bit_buf.cnt_bits < bits_remaining) {
201 return IA_XHEAAC_DEC_EXE_NONFATAL_INSUFFICIENT_INPUT_BYTES;
202 }
203 bits = (UWORD8)ixheaacd_read_bits_buf(
204 (ia_bit_buf_struct *)(&ptr_adts_crc_info->str_crc_reg_data[reg]
205 .str_bit_buf),
206 bits_remaining);
207 ixheaacd_adts_crc_slow_crc(&crc, (UWORD8)(bits << (8 - bits_remaining)),
208 bits_remaining);
209
210 if (ptr_reg_data->max_bits >
211 ptr_adts_crc_info->str_crc_reg_data[reg].bit_buf_cnt) {
212 bits_remaining = ptr_reg_data->max_bits -
213 ptr_adts_crc_info->str_crc_reg_data[reg].bit_buf_cnt;
214
215 for (; bits_remaining >= 8; bits_remaining -= 8) {
216 ixheaacd_adts_crc_fast_crc(ptr_adts_crc_info, &crc, 0);
217 }
218
219 ixheaacd_adts_crc_slow_crc(&crc, 0, bits_remaining);
220 }
221 }
222
223 ptr_adts_crc_info->no_reg = 0;
224
225 if (crc != ptr_adts_crc_info->file_value) {
226 return (IA_XHEAAC_DEC_EXE_NONFATAL_ADTS_HDR_CRC_FAIL);
227 }
228
229 return (error_code);
230 }
231