1 //===--- HexagonRDF.cpp ---------------------------------------------------===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9
10 #include "HexagonRDF.h"
11 #include "HexagonInstrInfo.h"
12 #include "HexagonRegisterInfo.h"
13
14 #include "llvm/CodeGen/MachineInstr.h"
15
16 using namespace llvm;
17 using namespace rdf;
18
covers(RegisterRef RA,RegisterRef RB) const19 bool HexagonRegisterAliasInfo::covers(RegisterRef RA, RegisterRef RB) const {
20 if (RA == RB)
21 return true;
22
23 if (TargetRegisterInfo::isVirtualRegister(RA.Reg) &&
24 TargetRegisterInfo::isVirtualRegister(RB.Reg)) {
25 // Hexagon-specific cases.
26 if (RA.Reg == RB.Reg) {
27 if (RA.Sub == 0)
28 return true;
29 if (RB.Sub == 0)
30 return false;
31 }
32 }
33
34 return RegisterAliasInfo::covers(RA, RB);
35 }
36
covers(const RegisterSet & RRs,RegisterRef RR) const37 bool HexagonRegisterAliasInfo::covers(const RegisterSet &RRs, RegisterRef RR)
38 const {
39 if (RRs.count(RR))
40 return true;
41
42 if (!TargetRegisterInfo::isPhysicalRegister(RR.Reg)) {
43 assert(TargetRegisterInfo::isVirtualRegister(RR.Reg));
44 // Check if both covering subregisters are present.
45 bool HasLo = RRs.count({RR.Reg, Hexagon::subreg_loreg});
46 bool HasHi = RRs.count({RR.Reg, Hexagon::subreg_hireg});
47 if (HasLo && HasHi)
48 return true;
49 }
50
51 if (RR.Sub == 0) {
52 // Check if both covering subregisters are present.
53 unsigned Lo = TRI.getSubReg(RR.Reg, Hexagon::subreg_loreg);
54 unsigned Hi = TRI.getSubReg(RR.Reg, Hexagon::subreg_hireg);
55 if (RRs.count({Lo, 0}) && RRs.count({Hi, 0}))
56 return true;
57 }
58
59 return RegisterAliasInfo::covers(RRs, RR);
60 }
61