1 //===-- SparcMCTargetDesc.cpp - Sparc Target Descriptions -----------------===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file provides Sparc specific target descriptions.
11 //
12 //===----------------------------------------------------------------------===//
13
14 #include "SparcMCTargetDesc.h"
15 #include "InstPrinter/SparcInstPrinter.h"
16 #include "SparcMCAsmInfo.h"
17 #include "SparcTargetStreamer.h"
18 #include "llvm/MC/MCInstrInfo.h"
19 #include "llvm/MC/MCRegisterInfo.h"
20 #include "llvm/MC/MCSubtargetInfo.h"
21 #include "llvm/Support/ErrorHandling.h"
22 #include "llvm/Support/TargetRegistry.h"
23
24 using namespace llvm;
25
26 #define GET_INSTRINFO_MC_DESC
27 #include "SparcGenInstrInfo.inc"
28
29 #define GET_SUBTARGETINFO_MC_DESC
30 #include "SparcGenSubtargetInfo.inc"
31
32 #define GET_REGINFO_MC_DESC
33 #include "SparcGenRegisterInfo.inc"
34
createSparcMCAsmInfo(const MCRegisterInfo & MRI,const Triple & TT)35 static MCAsmInfo *createSparcMCAsmInfo(const MCRegisterInfo &MRI,
36 const Triple &TT) {
37 MCAsmInfo *MAI = new SparcELFMCAsmInfo(TT);
38 unsigned Reg = MRI.getDwarfRegNum(SP::O6, true);
39 MCCFIInstruction Inst = MCCFIInstruction::createDefCfa(nullptr, Reg, 0);
40 MAI->addInitialFrameState(Inst);
41 return MAI;
42 }
43
createSparcV9MCAsmInfo(const MCRegisterInfo & MRI,const Triple & TT)44 static MCAsmInfo *createSparcV9MCAsmInfo(const MCRegisterInfo &MRI,
45 const Triple &TT) {
46 MCAsmInfo *MAI = new SparcELFMCAsmInfo(TT);
47 unsigned Reg = MRI.getDwarfRegNum(SP::O6, true);
48 MCCFIInstruction Inst = MCCFIInstruction::createDefCfa(nullptr, Reg, 2047);
49 MAI->addInitialFrameState(Inst);
50 return MAI;
51 }
52
createSparcMCInstrInfo()53 static MCInstrInfo *createSparcMCInstrInfo() {
54 MCInstrInfo *X = new MCInstrInfo();
55 InitSparcMCInstrInfo(X);
56 return X;
57 }
58
createSparcMCRegisterInfo(const Triple & TT)59 static MCRegisterInfo *createSparcMCRegisterInfo(const Triple &TT) {
60 MCRegisterInfo *X = new MCRegisterInfo();
61 InitSparcMCRegisterInfo(X, SP::O7);
62 return X;
63 }
64
65 static MCSubtargetInfo *
createSparcMCSubtargetInfo(const Triple & TT,StringRef CPU,StringRef FS)66 createSparcMCSubtargetInfo(const Triple &TT, StringRef CPU, StringRef FS) {
67 if (CPU.empty())
68 CPU = (TT.getArch() == Triple::sparcv9) ? "v9" : "v8";
69 return createSparcMCSubtargetInfoImpl(TT, CPU, FS);
70 }
71
72 // Code models. Some only make sense for 64-bit code.
73 //
74 // SunCC Reloc CodeModel Constraints
75 // abs32 Static Small text+data+bss linked below 2^32 bytes
76 // abs44 Static Medium text+data+bss linked below 2^44 bytes
77 // abs64 Static Large text smaller than 2^31 bytes
78 // pic13 PIC_ Small GOT < 2^13 bytes
79 // pic32 PIC_ Medium GOT < 2^32 bytes
80 //
81 // All code models require that the text segment is smaller than 2GB.
82
adjustCodeGenOpts(const Triple & TT,Reloc::Model RM,CodeModel::Model & CM)83 static void adjustCodeGenOpts(const Triple &TT, Reloc::Model RM,
84 CodeModel::Model &CM) {
85 // The default 32-bit code model is abs32/pic32 and the default 32-bit
86 // code model for JIT is abs32.
87 switch (CM) {
88 default: break;
89 case CodeModel::Default:
90 case CodeModel::JITDefault: CM = CodeModel::Small; break;
91 }
92 }
93
adjustCodeGenOptsV9(const Triple & TT,Reloc::Model RM,CodeModel::Model & CM)94 static void adjustCodeGenOptsV9(const Triple &TT, Reloc::Model RM,
95 CodeModel::Model &CM) {
96 // The default 64-bit code model is abs44/pic32 and the default 64-bit
97 // code model for JIT is abs64.
98 switch (CM) {
99 default: break;
100 case CodeModel::Default:
101 CM = RM == Reloc::PIC_ ? CodeModel::Small : CodeModel::Medium;
102 break;
103 case CodeModel::JITDefault:
104 CM = CodeModel::Large;
105 break;
106 }
107 }
108
109 static MCTargetStreamer *
createObjectTargetStreamer(MCStreamer & S,const MCSubtargetInfo & STI)110 createObjectTargetStreamer(MCStreamer &S, const MCSubtargetInfo &STI) {
111 return new SparcTargetELFStreamer(S);
112 }
113
createTargetAsmStreamer(MCStreamer & S,formatted_raw_ostream & OS,MCInstPrinter * InstPrint,bool isVerboseAsm)114 static MCTargetStreamer *createTargetAsmStreamer(MCStreamer &S,
115 formatted_raw_ostream &OS,
116 MCInstPrinter *InstPrint,
117 bool isVerboseAsm) {
118 return new SparcTargetAsmStreamer(S, OS);
119 }
120
createSparcMCInstPrinter(const Triple & T,unsigned SyntaxVariant,const MCAsmInfo & MAI,const MCInstrInfo & MII,const MCRegisterInfo & MRI)121 static MCInstPrinter *createSparcMCInstPrinter(const Triple &T,
122 unsigned SyntaxVariant,
123 const MCAsmInfo &MAI,
124 const MCInstrInfo &MII,
125 const MCRegisterInfo &MRI) {
126 return new SparcInstPrinter(MAI, MII, MRI);
127 }
128
LLVMInitializeSparcTargetMC()129 extern "C" void LLVMInitializeSparcTargetMC() {
130 // Register the MC asm info.
131 RegisterMCAsmInfoFn X(TheSparcTarget, createSparcMCAsmInfo);
132 RegisterMCAsmInfoFn Y(TheSparcV9Target, createSparcV9MCAsmInfo);
133 RegisterMCAsmInfoFn Z(TheSparcelTarget, createSparcMCAsmInfo);
134
135 for (Target *T : {&TheSparcTarget, &TheSparcV9Target, &TheSparcelTarget}) {
136 // Register the MC instruction info.
137 TargetRegistry::RegisterMCInstrInfo(*T, createSparcMCInstrInfo);
138
139 // Register the MC register info.
140 TargetRegistry::RegisterMCRegInfo(*T, createSparcMCRegisterInfo);
141
142 // Register the MC subtarget info.
143 TargetRegistry::RegisterMCSubtargetInfo(*T, createSparcMCSubtargetInfo);
144
145 // Register the MC Code Emitter.
146 TargetRegistry::RegisterMCCodeEmitter(*T, createSparcMCCodeEmitter);
147
148 // Register the asm backend.
149 TargetRegistry::RegisterMCAsmBackend(*T, createSparcAsmBackend);
150
151 // Register the object target streamer.
152 TargetRegistry::RegisterObjectTargetStreamer(*T,
153 createObjectTargetStreamer);
154
155 // Register the asm streamer.
156 TargetRegistry::RegisterAsmTargetStreamer(*T, createTargetAsmStreamer);
157
158 // Register the MCInstPrinter
159 TargetRegistry::RegisterMCInstPrinter(*T, createSparcMCInstPrinter);
160 }
161
162 // Register the MC codegen info.
163 TargetRegistry::registerMCAdjustCodeGenOpts(TheSparcTarget,
164 adjustCodeGenOpts);
165 TargetRegistry::registerMCAdjustCodeGenOpts(TheSparcV9Target,
166 adjustCodeGenOptsV9);
167 TargetRegistry::registerMCAdjustCodeGenOpts(TheSparcelTarget,
168 adjustCodeGenOpts);
169 }
170