1; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck %s 2 3; CHECK-LABEL: {{^}}cube: 4; CHECK: CUBE T{{[0-9]}}.X 5; CHECK: CUBE T{{[0-9]}}.Y 6; CHECK: CUBE T{{[0-9]}}.Z 7; CHECK: CUBE * T{{[0-9]}}.W 8define amdgpu_ps void @cube() { 9main_body: 10 %tmp = load <4 x float>, <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>], [1024 x <4 x float>] addrspace(8)* null, i64 0, i32 9) 11 %tmp1 = extractelement <4 x float> %tmp, i32 3 12 %tmp2 = load <4 x float>, <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>], [1024 x <4 x float>] addrspace(8)* null, i64 0, i32 9) 13 %tmp3 = extractelement <4 x float> %tmp2, i32 0 14 %tmp4 = fdiv float %tmp3, %tmp1 15 %tmp5 = load <4 x float>, <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>], [1024 x <4 x float>] addrspace(8)* null, i64 0, i32 9) 16 %tmp6 = extractelement <4 x float> %tmp5, i32 1 17 %tmp7 = fdiv float %tmp6, %tmp1 18 %tmp8 = load <4 x float>, <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>], [1024 x <4 x float>] addrspace(8)* null, i64 0, i32 9) 19 %tmp9 = extractelement <4 x float> %tmp8, i32 2 20 %tmp10 = fdiv float %tmp9, %tmp1 21 %tmp11 = insertelement <4 x float> undef, float %tmp4, i32 0 22 %tmp12 = insertelement <4 x float> %tmp11, float %tmp7, i32 1 23 %tmp13 = insertelement <4 x float> %tmp12, float %tmp10, i32 2 24 %tmp14 = insertelement <4 x float> %tmp13, float 1.000000e+00, i32 3 25 %tmp15 = call <4 x float> @llvm.AMDGPU.cube(<4 x float> %tmp14) 26 %tmp16 = extractelement <4 x float> %tmp15, i32 0 27 %tmp17 = extractelement <4 x float> %tmp15, i32 1 28 %tmp18 = extractelement <4 x float> %tmp15, i32 2 29 %tmp19 = extractelement <4 x float> %tmp15, i32 3 30 %tmp20 = call float @llvm.fabs.f32(float %tmp18) 31 %tmp21 = fdiv float 1.000000e+00, %tmp20 32 %tmp22 = fmul float %tmp16, %tmp21 33 %tmp23 = fadd float %tmp22, 1.500000e+00 34 %tmp24 = fmul float %tmp17, %tmp21 35 %tmp25 = fadd float %tmp24, 1.500000e+00 36 %tmp26 = insertelement <4 x float> undef, float %tmp25, i32 0 37 %tmp27 = insertelement <4 x float> %tmp26, float %tmp23, i32 1 38 %tmp28 = insertelement <4 x float> %tmp27, float %tmp19, i32 2 39 %tmp29 = insertelement <4 x float> %tmp28, float %tmp25, i32 3 40 %tmp30 = shufflevector <4 x float> %tmp29, <4 x float> %tmp29, <4 x i32> <i32 0, i32 1, i32 2, i32 3> 41 %tmp31 = call <4 x float> @llvm.r600.tex(<4 x float> %tmp30, i32 0, i32 0, i32 0, i32 16, i32 0, i32 1, i32 1, i32 1, i32 1) 42 call void @llvm.R600.store.swizzle(<4 x float> %tmp31, i32 0, i32 0) 43 ret void 44} 45 46; Function Attrs: readnone 47declare <4 x float> @llvm.AMDGPU.cube(<4 x float>) #0 48 49; Function Attrs: nounwind readnone 50declare float @llvm.fabs.f32(float) #0 51 52declare void @llvm.R600.store.swizzle(<4 x float>, i32, i32) 53 54; Function Attrs: readnone 55declare <4 x float> @llvm.r600.tex(<4 x float>, i32, i32, i32, i32, i32, i32, i32, i32, i32) #0 56 57attributes #0 = { nounwind readnone } 58