1; Test that compares are omitted if CC already has the right value 2; (z196 version). 3; 4; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z196 -no-integrated-as | FileCheck %s 5 6; Addition provides enough for equality comparisons with zero. First teest 7; the EQ case with LOC. 8define i32 @f1(i32 %a, i32 %b, i32 *%cptr) { 9; CHECK-LABEL: f1: 10; CHECK: afi %r2, 1000000 11; CHECK-NEXT: loce %r3, 0(%r4) 12; CHECK: br %r14 13 %add = add i32 %a, 1000000 14 %cmp = icmp eq i32 %add, 0 15 %c = load i32 , i32 *%cptr 16 %arg = select i1 %cmp, i32 %c, i32 %b 17 call void asm sideeffect "blah $0", "{r3}"(i32 %arg) 18 ret i32 %add 19} 20 21; ...and again with STOC. 22define i32 @f2(i32 %a, i32 %b, i32 *%cptr) { 23; CHECK-LABEL: f2: 24; CHECK: afi %r2, 1000000 25; CHECK-NEXT: stoce %r3, 0(%r4) 26; CHECK: br %r14 27 %add = add i32 %a, 1000000 28 %cmp = icmp eq i32 %add, 0 29 %c = load i32 , i32 *%cptr 30 %newval = select i1 %cmp, i32 %b, i32 %c 31 store i32 %newval, i32 *%cptr 32 ret i32 %add 33} 34 35; Reverse the select order and test with LOCR. 36define i32 @f3(i32 %a, i32 %b, i32 %c) { 37; CHECK-LABEL: f3: 38; CHECK: afi %r2, 1000000 39; CHECK-NEXT: locrne %r3, %r4 40; CHECK: br %r14 41 %add = add i32 %a, 1000000 42 %cmp = icmp eq i32 %add, 0 43 %arg = select i1 %cmp, i32 %b, i32 %c 44 call void asm sideeffect "blah $0", "{r3}"(i32 %arg) 45 ret i32 %add 46} 47 48; ...and again with LOC. 49define i32 @f4(i32 %a, i32 %b, i32 *%cptr) { 50; CHECK-LABEL: f4: 51; CHECK: afi %r2, 1000000 52; CHECK-NEXT: locne %r3, 0(%r4) 53; CHECK: br %r14 54 %add = add i32 %a, 1000000 55 %cmp = icmp eq i32 %add, 0 56 %c = load i32 , i32 *%cptr 57 %arg = select i1 %cmp, i32 %b, i32 %c 58 call void asm sideeffect "blah $0", "{r3}"(i32 %arg) 59 ret i32 %add 60} 61 62; ...and again with STOC. 63define i32 @f5(i32 %a, i32 %b, i32 *%cptr) { 64; CHECK-LABEL: f5: 65; CHECK: afi %r2, 1000000 66; CHECK-NEXT: stocne %r3, 0(%r4) 67; CHECK: br %r14 68 %add = add i32 %a, 1000000 69 %cmp = icmp eq i32 %add, 0 70 %c = load i32 , i32 *%cptr 71 %newval = select i1 %cmp, i32 %c, i32 %b 72 store i32 %newval, i32 *%cptr 73 ret i32 %add 74} 75 76; Change the EQ in f3 to NE. 77define i32 @f6(i32 %a, i32 %b, i32 %c) { 78; CHECK-LABEL: f6: 79; CHECK: afi %r2, 1000000 80; CHECK-NEXT: locre %r3, %r4 81; CHECK: br %r14 82 %add = add i32 %a, 1000000 83 %cmp = icmp ne i32 %add, 0 84 %arg = select i1 %cmp, i32 %b, i32 %c 85 call void asm sideeffect "blah $0", "{r3}"(i32 %arg) 86 ret i32 %add 87} 88 89; ...and again with LOC. 90define i32 @f7(i32 %a, i32 %b, i32 *%cptr) { 91; CHECK-LABEL: f7: 92; CHECK: afi %r2, 1000000 93; CHECK-NEXT: loce %r3, 0(%r4) 94; CHECK: br %r14 95 %add = add i32 %a, 1000000 96 %cmp = icmp ne i32 %add, 0 97 %c = load i32 , i32 *%cptr 98 %arg = select i1 %cmp, i32 %b, i32 %c 99 call void asm sideeffect "blah $0", "{r3}"(i32 %arg) 100 ret i32 %add 101} 102 103; ...and again with STOC. 104define i32 @f8(i32 %a, i32 %b, i32 *%cptr) { 105; CHECK-LABEL: f8: 106; CHECK: afi %r2, 1000000 107; CHECK-NEXT: stoce %r3, 0(%r4) 108; CHECK: br %r14 109 %add = add i32 %a, 1000000 110 %cmp = icmp ne i32 %add, 0 111 %c = load i32 , i32 *%cptr 112 %newval = select i1 %cmp, i32 %c, i32 %b 113 store i32 %newval, i32 *%cptr 114 ret i32 %add 115} 116