1; RUN: llc -mtriple=i686-pc-win32 -mattr=+sse2 < %s | FileCheck %s --check-prefix=CHECK --check-prefix=X86 2; RUN: llc -mtriple=x86_64-pc-win32 < %s | FileCheck %s --check-prefix=CHECK --check-prefix=X64 3 4; Test integer arguments. 5 6define x86_vectorcallcc i32 @test_int_1() { 7 ret i32 0 8} 9 10; CHECK-LABEL: {{^}}test_int_1@@0: 11; CHECK: xorl %eax, %eax 12 13define x86_vectorcallcc i32 @test_int_2(i32 inreg %a) { 14 ret i32 %a 15} 16 17; X86-LABEL: {{^}}test_int_2@@4: 18; X64-LABEL: {{^}}test_int_2@@8: 19; CHECK: movl %ecx, %eax 20 21define x86_vectorcallcc i32 @test_int_3(i64 inreg %a) { 22 %at = trunc i64 %a to i32 23 ret i32 %at 24} 25 26; X86-LABEL: {{^}}test_int_3@@8: 27; X64-LABEL: {{^}}test_int_3@@8: 28; CHECK: movl %ecx, %eax 29 30define x86_vectorcallcc i32 @test_int_4(i32 inreg %a, i32 inreg %b) { 31 %s = add i32 %a, %b 32 ret i32 %s 33} 34 35; X86-LABEL: {{^}}test_int_4@@8: 36; X86: leal (%ecx,%edx), %eax 37 38; X64-LABEL: {{^}}test_int_4@@16: 39; X64: leal (%rcx,%rdx), %eax 40 41define x86_vectorcallcc i32 @"\01test_int_5"(i32, i32) { 42 ret i32 0 43} 44; CHECK-LABEL: {{^}}test_int_5: 45 46define x86_vectorcallcc double @test_fp_1(double %a, double %b) { 47 ret double %b 48} 49; CHECK-LABEL: {{^}}test_fp_1@@16: 50; CHECK: movaps %xmm1, %xmm0 51 52define x86_vectorcallcc double @test_fp_2( 53 double, double, double, double, double, double, double %r) { 54 ret double %r 55} 56; CHECK-LABEL: {{^}}test_fp_2@@56: 57; CHECK: movsd {{[0-9]+\(%[re]sp\)}}, %xmm0 58 59define x86_vectorcallcc {double, double, double, double} @test_fp_3() { 60 ret {double, double, double, double} 61 { double 0.0, double 0.0, double 0.0, double 0.0 } 62} 63; CHECK-LABEL: {{^}}test_fp_3@@0: 64; CHECK: xorps %xmm0 65; CHECK: xorps %xmm1 66; CHECK: xorps %xmm2 67; CHECK: xorps %xmm3 68 69; FIXME: Returning via x87 isn't compatible, but its hard to structure the 70; tablegen any other way. 71define x86_vectorcallcc {double, double, double, double, double} @test_fp_4() { 72 ret {double, double, double, double, double} 73 { double 0.0, double 0.0, double 0.0, double 0.0, double 0.0 } 74} 75; CHECK-LABEL: {{^}}test_fp_4@@0: 76; CHECK: fldz 77; CHECK: xorps %xmm0 78; CHECK: xorps %xmm1 79; CHECK: xorps %xmm2 80; CHECK: xorps %xmm3 81 82define x86_vectorcallcc <16 x i8> @test_vec_1(<16 x i8> %a, <16 x i8> %b) { 83 ret <16 x i8> %b 84} 85; CHECK-LABEL: {{^}}test_vec_1@@32: 86; CHECK: movaps %xmm1, %xmm0 87 88define x86_vectorcallcc <16 x i8> @test_vec_2( 89 double, <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> %r) { 90 ret <16 x i8> %r 91} 92; CHECK-LABEL: {{^}}test_vec_2@@104: 93; CHECK: movaps (%{{[re]}}cx), %xmm0 94