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1{
2 "enums": {
3 },
4 "register_mappings": [
5  {
6   "chips": ["gfx6"],
7   "map": {"at": 47148, "to": "mm"},
8   "name": "COMPUTE_MAX_WAVE_ID",
9   "type_ref": "SPI_PS_MAX_WAVE_ID"
10  },
11  {
12   "chips": ["gfx6", "gfx7", "gfx8", "gfx81"],
13   "map": {"at": 53300, "to": "mm"},
14   "name": "SDMA0_STATUS_REG",
15   "type_ref": "SDMA0_STATUS_REG"
16  },
17  {
18   "chips": ["gfx6", "gfx7", "gfx8", "gfx81"],
19   "map": {"at": 55348, "to": "mm"},
20   "name": "SDMA1_STATUS_REG",
21   "type_ref": "SDMA0_STATUS_REG"
22  },
23  {
24   "chips": ["gfx6", "gfx7", "gfx8", "gfx81"],
25   "map": {"at": 3664, "to": "mm"},
26   "name": "SRBM_STATUS",
27   "type_ref": "SRBM_STATUS"
28  },
29  {
30   "chips": ["gfx6", "gfx7", "gfx8", "gfx81"],
31   "map": {"at": 3660, "to": "mm"},
32   "name": "SRBM_STATUS2",
33   "type_ref": "SRBM_STATUS2"
34  },
35  {
36   "chips": ["gfx6", "gfx7", "gfx8", "gfx81"],
37   "map": {"at": 3668, "to": "mm"},
38   "name": "SRBM_STATUS3",
39   "type_ref": "SRBM_STATUS3"
40  }
41 ],
42 "register_types": {
43  "SPI_PS_MAX_WAVE_ID": {
44   "fields": [
45    {"bits": [0, 11], "name": "MAX_WAVE_ID"}
46   ]
47  },
48  "SRBM_STATUS": {
49   "fields": [
50    {"bits": [1, 1], "name": "UVD_RQ_PENDING"},
51    {"bits": [2, 2], "name": "SAMMSP_RQ_PENDING"},
52    {"bits": [3, 3], "name": "ACP_RQ_PENDING"},
53    {"bits": [4, 4], "name": "SMU_RQ_PENDING"},
54    {"bits": [5, 5], "name": "GRBM_RQ_PENDING"},
55    {"bits": [6, 6], "name": "HI_RQ_PENDING"},
56    {"bits": [8, 8], "name": "VMC_BUSY"},
57    {"bits": [9, 9], "name": "MCB_BUSY"},
58    {"bits": [10, 10], "name": "MCB_NON_DISPLAY_BUSY"},
59    {"bits": [11, 11], "name": "MCC_BUSY"},
60    {"bits": [12, 12], "name": "MCD_BUSY"},
61    {"bits": [13, 13], "name": "VMC1_BUSY"},
62    {"bits": [14, 14], "name": "SEM_BUSY"},
63    {"bits": [16, 16], "name": "ACP_BUSY"},
64    {"bits": [17, 17], "name": "IH_BUSY"},
65    {"bits": [19, 19], "name": "UVD_BUSY"},
66    {"bits": [20, 20], "name": "SAMMSP_BUSY"},
67    {"bits": [21, 21], "name": "GCATCL2_BUSY"},
68    {"bits": [22, 22], "name": "OSATCL2_BUSY"},
69    {"bits": [29, 29], "name": "BIF_BUSY"}
70   ]
71  },
72  "SDMA0_STATUS_REG": {
73   "fields": [
74    {"bits": [0, 0], "name": "IDLE"},
75    {"bits": [1, 1], "name": "REG_IDLE"},
76    {"bits": [2, 2], "name": "RB_EMPTY"},
77    {"bits": [3, 3], "name": "RB_FULL"},
78    {"bits": [4, 4], "name": "RB_CMD_IDLE"},
79    {"bits": [5, 5], "name": "RB_CMD_FULL"},
80    {"bits": [6, 6], "name": "IB_CMD_IDLE"},
81    {"bits": [7, 7], "name": "IB_CMD_FULL"},
82    {"bits": [8, 8], "name": "BLOCK_IDLE"},
83    {"bits": [9, 9], "name": "INSIDE_IB"},
84    {"bits": [10, 10], "name": "EX_IDLE"},
85    {"bits": [11, 11], "name": "EX_IDLE_POLL_TIMER_EXPIRE"},
86    {"bits": [12, 12], "name": "PACKET_READY"},
87    {"bits": [13, 13], "name": "MC_WR_IDLE"},
88    {"bits": [14, 14], "name": "SRBM_IDLE"},
89    {"bits": [15, 15], "name": "CONTEXT_EMPTY"},
90    {"bits": [16, 16], "name": "DELTA_RPTR_FULL"},
91    {"bits": [17, 17], "name": "RB_MC_RREQ_IDLE"},
92    {"bits": [18, 18], "name": "IB_MC_RREQ_IDLE"},
93    {"bits": [19, 19], "name": "MC_RD_IDLE"},
94    {"bits": [20, 20], "name": "DELTA_RPTR_EMPTY"},
95    {"bits": [21, 21], "name": "MC_RD_RET_STALL"},
96    {"bits": [22, 22], "name": "MC_RD_NO_POLL_IDLE"},
97    {"bits": [25, 25], "name": "PREV_CMD_IDLE"},
98    {"bits": [26, 26], "name": "SEM_IDLE"},
99    {"bits": [27, 27], "name": "SEM_REQ_STALL"},
100    {"bits": [28, 29], "name": "SEM_RESP_STATE"},
101    {"bits": [30, 30], "name": "INT_IDLE"},
102    {"bits": [31, 31], "name": "INT_REQ_STALL"}
103   ]
104  },
105  "SRBM_STATUS2": {
106   "fields": [
107    {"bits": [0, 0], "name": "SDMA_RQ_PENDING"},
108    {"bits": [1, 1], "name": "TST_RQ_PENDING"},
109    {"bits": [2, 2], "name": "SDMA1_RQ_PENDING"},
110    {"bits": [3, 3], "name": "VCE0_RQ_PENDING"},
111    {"bits": [4, 4], "name": "VP8_BUSY"},
112    {"bits": [5, 5], "name": "SDMA_BUSY"},
113    {"bits": [6, 6], "name": "SDMA1_BUSY"},
114    {"bits": [7, 7], "name": "VCE0_BUSY"},
115    {"bits": [8, 8], "name": "XDMA_BUSY"},
116    {"bits": [9, 9], "name": "CHUB_BUSY"},
117    {"bits": [10, 10], "name": "SDMA2_BUSY"},
118    {"bits": [11, 11], "name": "SDMA3_BUSY"},
119    {"bits": [12, 12], "name": "SAMSCP_BUSY"},
120    {"bits": [13, 13], "name": "ISP_BUSY"},
121    {"bits": [14, 14], "name": "VCE1_BUSY"},
122    {"bits": [15, 15], "name": "ODE_BUSY"},
123    {"bits": [16, 16], "name": "SDMA2_RQ_PENDING"},
124    {"bits": [17, 17], "name": "SDMA3_RQ_PENDING"},
125    {"bits": [18, 18], "name": "SAMSCP_RQ_PENDING"},
126    {"bits": [19, 19], "name": "ISP_RQ_PENDING"},
127    {"bits": [20, 20], "name": "VCE1_RQ_PENDING"}
128   ]
129  },
130  "SRBM_STATUS3": {
131   "fields": [
132    {"bits": [0, 0], "name": "MCC0_BUSY"},
133    {"bits": [1, 1], "name": "MCC1_BUSY"},
134    {"bits": [2, 2], "name": "MCC2_BUSY"},
135    {"bits": [3, 3], "name": "MCC3_BUSY"},
136    {"bits": [4, 4], "name": "MCC4_BUSY"},
137    {"bits": [5, 5], "name": "MCC5_BUSY"},
138    {"bits": [6, 6], "name": "MCC6_BUSY"},
139    {"bits": [7, 7], "name": "MCC7_BUSY"},
140    {"bits": [8, 8], "name": "MCD0_BUSY"},
141    {"bits": [9, 9], "name": "MCD1_BUSY"},
142    {"bits": [10, 10], "name": "MCD2_BUSY"},
143    {"bits": [11, 11], "name": "MCD3_BUSY"},
144    {"bits": [12, 12], "name": "MCD4_BUSY"},
145    {"bits": [13, 13], "name": "MCD5_BUSY"},
146    {"bits": [14, 14], "name": "MCD6_BUSY"},
147    {"bits": [15, 15], "name": "MCD7_BUSY"}
148   ]
149  }
150 }
151}