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1; a6xx microcode
2; Disassembling microcode: src/freedreno/.gitlab-ci/reference/afuc_test.fw
3; Version: 01000001
4
5        [01000001]  ; nop
6        [01000060]  ; nop
7        mov $02, 0x0883	; CP_SCRATCH[0].REG
8        mov $03, 0xbeef
9        mov $04, 0xdead << 16
10        or $03, $03, $04
11        cwrite $02, [$00 + @REG_WRITE_ADDR], 0x0
12        cwrite $03, [$00 + @REG_WRITE], 0x0
13        waitin
14        mov $01, $data
15
16CP_ME_INIT:
17        mov $02, 0x0002
18        waitin
19        mov $01, $data
20
21CP_MEM_WRITE:
22        mov $addr, 0x00a0 << 24
23        mov $02, 0x0004
24        (xmov1)add $data, $02, $data
25        mov $addr, 0xa204 << 16
26        (rep)(xmov3)mov $data, $data
27        waitin
28        mov $01, $data
29
30CP_SCRATCH_WRITE:
31        mov $02, 0x00ff
32        (rep)cwrite $data, [$02 + 0x001], 0x4
33        waitin
34        mov $01, $data
35
36CP_SET_SECURE_MODE:
37        mov $02, $data
38        setsecure $02, #l000
39 l001:  jump #l001
40        nop
41 l000:  waitin
42        mov $01, $data
43fxn00:
44 l004:  cmp $04, $02, $03
45        breq $04, b0, #l002
46        brne $04, b1, #l003
47        breq $04, b2, #l004
48        sub $03, $03, $02
49 l003:  jump #l004
50        sub $02, $02, $03
51 l002:  ret
52        nop
53
54CP_REG_RMW:
55        cwrite $data, [$00 + @REG_READ_ADDR], 0x0
56        add $02, $addr2, 0x0042
57        addhi $03, $00, $addr2
58        sub $02, $02, $addr2
59        call #fxn00
60        subhi $03, $03, $addr2
61        and $02, $02, $addr2
62        or $02, $02, 0x0001
63        xor $02, $02, 0x0001
64        not $02, $02
65        shl $02, $02, $addr2
66        ushr $02, $02, $addr2
67        ishr $02, $02, $addr2
68        rot $02, $02, $addr2
69        min $02, $02, $addr2
70        max $02, $02, $addr2
71        mul8 $02, $02, $addr2
72        msb $02, $02
73        mov $addr2, $data
74        mov $data, $02
75        waitin
76        mov $01, $data
77
78CP_MEMCPY:
79        mov $02, $data
80        mov $03, $data
81        mov $04, $data
82        mov $05, $data
83        mov $06, $data
84 l006:  breq $06, 0x0, #l005
85        cwrite $03, [$00 + @LOAD_STORE_HI], 0x0
86        load $07, [$02 + 0x004], 0x4
87        cwrite $05, [$00 + @LOAD_STORE_HI], 0x0
88        jump #l006
89        store $07, [$04 + 0x004], 0x4
90 l005:  waitin
91        mov $01, $data
92
93CP_MEM_TO_MEM:
94        cwrite $data, [$00 + @MEM_READ_ADDR], 0x0
95        cwrite $data, [$00 + @MEM_READ_ADDR+0x1], 0x0
96        mov $02, $data
97        cwrite $data, [$00 + @LOAD_STORE_HI], 0x0
98        mov $rem, $data
99        cwrite $rem, [$00 + @MEM_READ_DWORDS], 0x0
100        (rep)store $addr, [$02 + 0x004], 0x4
101        waitin
102        mov $01, $data
103
104UNKN15:
105        cread $02, [$00 + 0x101], 0x0
106        brne $02, 0x1, #l007
107        nop
108        preemptleave #l001
109        nop
110        nop
111        nop
112        waitin
113        mov $01, $data
114 l007:  iret
115        nop
116
117UNKN0:
118UNKN1:
119UNKN2:
120UNKN3:
121PKT4:
122UNKN5:
123UNKN6:
124UNKN7:
125UNKN8:
126UNKN9:
127UNKN10:
128UNKN11:
129UNKN12:
130UNKN13:
131UNKN14:
132CP_NOP:
133CP_RECORD_PFP_TIMESTAMP:
134CP_WAIT_MEM_WRITES:
135CP_WAIT_FOR_ME:
136CP_WAIT_MEM_GTE:
137UNKN21:
138UNKN22:
139UNKN23:
140UNKN24:
141CP_DRAW_PRED_ENABLE_GLOBAL:
142CP_DRAW_PRED_ENABLE_LOCAL:
143UNKN27:
144CP_PREEMPT_ENABLE:
145CP_SKIP_IB2_ENABLE_GLOBAL:
146CP_PREEMPT_TOKEN:
147UNKN31:
148UNKN32:
149CP_DRAW_INDX:
150CP_SKIP_IB2_ENABLE_LOCAL:
151CP_DRAW_AUTO:
152CP_SET_STATE:
153CP_WAIT_FOR_IDLE:
154CP_IM_LOAD:
155CP_DRAW_INDIRECT:
156CP_DRAW_INDX_INDIRECT:
157CP_DRAW_INDIRECT_MULTI:
158CP_IM_LOAD_IMMEDIATE:
159CP_BLIT:
160CP_SET_CONSTANT:
161CP_SET_BIN_DATA5_OFFSET:
162CP_SET_BIN_DATA5:
163UNKN48:
164CP_RUN_OPENCL:
165CP_LOAD_STATE6_GEOM:
166CP_EXEC_CS:
167CP_LOAD_STATE6_FRAG:
168CP_SET_SUBDRAW_SIZE:
169CP_LOAD_STATE6:
170CP_INDIRECT_BUFFER_PFD:
171CP_DRAW_INDX_OFFSET:
172CP_REG_TEST:
173CP_COND_INDIRECT_BUFFER_PFE:
174CP_INVALIDATE_STATE:
175CP_WAIT_REG_MEM:
176CP_REG_TO_MEM:
177CP_INDIRECT_BUFFER:
178CP_INTERRUPT:
179CP_EXEC_CS_INDIRECT:
180CP_MEM_TO_REG:
181CP_SET_DRAW_STATE:
182CP_COND_EXEC:
183CP_COND_WRITE5:
184CP_EVENT_WRITE:
185CP_COND_REG_EXEC:
186UNKN73:
187CP_REG_TO_SCRATCH:
188CP_SET_DRAW_INIT_FLAGS:
189CP_SCRATCH_TO_REG:
190CP_DRAW_PRED_SET:
191CP_MEM_WRITE_CNTR:
192UNKN80:
193CP_SET_BIN_SELECT:
194CP_WAIT_REG_EQ:
195CP_SMMU_TABLE_UPDATE:
196UNKN84:
197CP_SET_CTXSWITCH_IB:
198CP_SET_PSEUDO_REG:
199CP_INDIRECT_BUFFER_CHAIN:
200CP_EVENT_WRITE_SHD:
201CP_EVENT_WRITE_CFL:
202UNKN90:
203CP_EVENT_WRITE_ZPD:
204CP_CONTEXT_REG_BUNCH:
205CP_WAIT_IB_PFD_COMPLETE:
206CP_CONTEXT_UPDATE:
207CP_SET_PROTECTED_MODE:
208UNKN96:
209UNKN97:
210CP_WHERE_AM_I:
211CP_SET_MODE:
212CP_SET_VISIBILITY_OVERRIDE:
213CP_SET_MARKER:
214UNKN103:
215UNKN104:
216UNKN105:
217UNKN106:
218UNKN107:
219UNKN108:
220CP_REG_WRITE:
221UNKN110:
222CP_BOOTSTRAP_UCODE:
223CP_WAIT_TWO_REGS:
224CP_TEST_TWO_MEMS:
225CP_REG_TO_MEM_OFFSET_REG:
226CP_REG_TO_MEM_OFFSET_MEM:
227UNKN118:
228UNKN119:
229CP_REG_WR_NO_CTXT:
230UNKN121:
231UNKN122:
232UNKN123:
233UNKN124:
234UNKN125:
235UNKN126:
236UNKN127:
237        waitin
238        mov $01, $data
239