1 /*
2 * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
3 * Copyright 2011 Marek Olšák <maraeo@gmail.com>
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * on the rights to use, copy, modify, merge, publish, distribute, sub
9 * license, and/or sell copies of the Software, and to permit persons to whom
10 * the Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
20 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
21 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
22 * USE OR OTHER DEALINGS IN THE SOFTWARE. */
23
24 #include "r300_chipset.h"
25 #include "radeon/radeon_winsys.h"
26
27 #include "util/u_debug.h"
28 #include "util/u_memory.h"
29 #include "os/os_process.h"
30
31 #include <stdio.h>
32 #include <errno.h>
33
34 /* r300_chipset: A file all to itself for deducing the various properties of
35 * Radeons. */
36
r300_apply_hyperz_blacklist(struct r300_capabilities * caps)37 static void r300_apply_hyperz_blacklist(struct r300_capabilities* caps)
38 {
39 static const char *list[] = {
40 "X", /* the DDX or indirect rendering */
41 "Xorg", /* (alternative name) */
42 "check_gl_texture_size", /* compiz */
43 "Compiz",
44 "gnome-session-check-accelerated-helper",
45 "gnome-shell",
46 "kwin_opengl_test",
47 "kwin",
48 "firefox",
49 };
50 int i;
51 char proc_name[128];
52
53 if (!os_get_process_name(proc_name, sizeof(proc_name)))
54 return;
55
56 for (i = 0; i < ARRAY_SIZE(list); i++) {
57 if (strcmp(list[i], proc_name) == 0) {
58 caps->zmask_ram = 0;
59 caps->hiz_ram = 0;
60 break;
61 }
62 }
63 }
64
65 /* Parse a PCI ID and fill an r300_capabilities struct with information. */
r300_parse_chipset(uint32_t pci_id,struct r300_capabilities * caps)66 void r300_parse_chipset(uint32_t pci_id, struct r300_capabilities* caps)
67 {
68 switch (pci_id) {
69 #define CHIPSET(pci_id, name, chipfamily) \
70 case pci_id: \
71 caps->family = CHIP_##chipfamily; \
72 break;
73 #include "pci_ids/r300_pci_ids.h"
74 #undef CHIPSET
75
76 default:
77 fprintf(stderr, "r300: Warning: Unknown chipset 0x%x\nAborting...",
78 pci_id);
79 abort();
80 }
81
82 /* Defaults. */
83 caps->high_second_pipe = FALSE;
84 caps->num_vert_fpus = 0;
85 caps->hiz_ram = 0;
86 caps->zmask_ram = 0;
87 caps->has_cmask = FALSE;
88
89
90 switch (caps->family) {
91 case CHIP_R300:
92 case CHIP_R350:
93 caps->high_second_pipe = TRUE;
94 caps->num_vert_fpus = 4;
95 caps->has_cmask = TRUE; /* guessed because there is also HiZ */
96 caps->hiz_ram = R300_HIZ_LIMIT;
97 caps->zmask_ram = PIPE_ZMASK_SIZE;
98 break;
99
100 case CHIP_RV350:
101 case CHIP_RV370:
102 caps->high_second_pipe = TRUE;
103 caps->num_vert_fpus = 2;
104 caps->zmask_ram = RV3xx_ZMASK_SIZE;
105 break;
106
107 case CHIP_RV380:
108 caps->high_second_pipe = TRUE;
109 caps->num_vert_fpus = 2;
110 caps->has_cmask = TRUE; /* guessed because there is also HiZ */
111 caps->hiz_ram = R300_HIZ_LIMIT;
112 caps->zmask_ram = RV3xx_ZMASK_SIZE;
113 break;
114
115 case CHIP_RS400:
116 case CHIP_RS600:
117 case CHIP_RS690:
118 case CHIP_RS740:
119 break;
120
121 case CHIP_RC410:
122 case CHIP_RS480:
123 caps->zmask_ram = RV3xx_ZMASK_SIZE;
124 break;
125
126 case CHIP_R420:
127 case CHIP_R423:
128 case CHIP_R430:
129 case CHIP_R480:
130 case CHIP_R481:
131 case CHIP_RV410:
132 caps->num_vert_fpus = 6;
133 caps->has_cmask = TRUE; /* guessed because there is also HiZ */
134 caps->hiz_ram = R300_HIZ_LIMIT;
135 caps->zmask_ram = PIPE_ZMASK_SIZE;
136 break;
137
138 case CHIP_R520:
139 caps->num_vert_fpus = 8;
140 caps->has_cmask = TRUE;
141 caps->hiz_ram = R300_HIZ_LIMIT;
142 caps->zmask_ram = PIPE_ZMASK_SIZE;
143 break;
144
145 case CHIP_RV515:
146 caps->num_vert_fpus = 2;
147 caps->has_cmask = TRUE;
148 caps->hiz_ram = R300_HIZ_LIMIT;
149 caps->zmask_ram = PIPE_ZMASK_SIZE;
150 break;
151
152 case CHIP_RV530:
153 caps->num_vert_fpus = 5;
154 caps->has_cmask = TRUE;
155 caps->hiz_ram = RV530_HIZ_LIMIT;
156 caps->zmask_ram = PIPE_ZMASK_SIZE;
157 break;
158
159 case CHIP_R580:
160 case CHIP_RV560:
161 case CHIP_RV570:
162 caps->num_vert_fpus = 8;
163 caps->has_cmask = TRUE;
164 caps->hiz_ram = RV530_HIZ_LIMIT;
165 caps->zmask_ram = PIPE_ZMASK_SIZE;
166 break;
167 }
168
169 caps->num_tex_units = 16;
170 caps->is_r400 = caps->family >= CHIP_R420 && caps->family < CHIP_RV515;
171 caps->is_r500 = caps->family >= CHIP_RV515;
172 caps->is_rv350 = caps->family >= CHIP_RV350;
173 caps->z_compress = caps->is_rv350 ? R300_ZCOMP_8X8 : R300_ZCOMP_4X4;
174 caps->dxtc_swizzle = caps->is_r400 || caps->is_r500;
175 caps->has_us_format = caps->family == CHIP_R520;
176 caps->has_tcl = caps->num_vert_fpus > 0;
177
178 if (caps->has_tcl) {
179 caps->has_tcl = debug_get_bool_option("RADEON_NO_TCL", FALSE) ? FALSE : TRUE;
180 }
181
182 r300_apply_hyperz_blacklist(caps);
183 }
184