1 //! Implementations for the [RISC-V](https://riscv.org/) architecture. 2 //! 3 //! *Note*: currently only supports integer versions of the ISA. 4 5 use gdbstub::arch::{Arch, SingleStepGdbBehavior}; 6 7 pub mod reg; 8 9 /// Implements `Arch` for 32-bit RISC-V. 10 pub enum Riscv32 {} 11 12 /// Implements `Arch` for 64-bit RISC-V. 13 pub enum Riscv64 {} 14 15 impl Arch for Riscv32 { 16 type Usize = u32; 17 type Registers = reg::RiscvCoreRegs<u32>; 18 type RegId = reg::id::RiscvRegId<u32>; 19 type BreakpointKind = usize; 20 target_description_xml() -> Option<&'static str>21 fn target_description_xml() -> Option<&'static str> { 22 Some(r#"<target version="1.0"><architecture>riscv:rv32</architecture></target>"#) 23 } 24 25 #[inline(always)] single_step_gdb_behavior() -> SingleStepGdbBehavior26 fn single_step_gdb_behavior() -> SingleStepGdbBehavior { 27 SingleStepGdbBehavior::Ignored 28 } 29 } 30 31 impl Arch for Riscv64 { 32 type Usize = u64; 33 type Registers = reg::RiscvCoreRegs<u64>; 34 type RegId = reg::id::RiscvRegId<u64>; 35 type BreakpointKind = usize; 36 target_description_xml() -> Option<&'static str>37 fn target_description_xml() -> Option<&'static str> { 38 Some(r#"<target version="1.0"><architecture>riscv:rv64</architecture></target>"#) 39 } 40 41 #[inline(always)] single_step_gdb_behavior() -> SingleStepGdbBehavior42 fn single_step_gdb_behavior() -> SingleStepGdbBehavior { 43 SingleStepGdbBehavior::Ignored 44 } 45 } 46