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1 //===-- PPCPredicates.h - PPC Branch Predicate Information ------*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file describes the PowerPC branch predicates.
10 //
11 //===----------------------------------------------------------------------===//
12 
13 #ifndef LLVM_LIB_TARGET_POWERPC_MCTARGETDESC_PPCPREDICATES_H
14 #define LLVM_LIB_TARGET_POWERPC_MCTARGETDESC_PPCPREDICATES_H
15 
16 // GCC #defines PPC on Linux but we use it as our namespace name
17 #undef PPC
18 
19 // Generated files will use "namespace PPC". To avoid symbol clash,
20 // undefine PPC here. PPC may be predefined on some hosts.
21 #undef PPC
22 
23 namespace llvm {
24 namespace PPC {
25   /// Predicate - These are "(BI << 5) | BO"  for various predicates.
26   using Predicate = int;
27   constexpr Predicate PRED_LT       = (0 << 5) | 12;
28   constexpr Predicate PRED_LE       = (1 << 5) |  4;
29   constexpr Predicate PRED_EQ       = (2 << 5) | 12;
30   constexpr Predicate PRED_GE       = (0 << 5) |  4;
31   constexpr Predicate PRED_GT       = (1 << 5) | 12;
32   constexpr Predicate PRED_NE       = (2 << 5) |  4;
33   constexpr Predicate PRED_UN       = (3 << 5) | 12;
34   constexpr Predicate PRED_NU       = (3 << 5) |  4;
35   constexpr Predicate PRED_LT_MINUS = (0 << 5) | 14;
36   constexpr Predicate PRED_LE_MINUS = (1 << 5) |  6;
37   constexpr Predicate PRED_EQ_MINUS = (2 << 5) | 14;
38   constexpr Predicate PRED_GE_MINUS = (0 << 5) |  6;
39   constexpr Predicate PRED_GT_MINUS = (1 << 5) | 14;
40   constexpr Predicate PRED_NE_MINUS = (2 << 5) |  6;
41   constexpr Predicate PRED_UN_MINUS = (3 << 5) | 14;
42   constexpr Predicate PRED_NU_MINUS = (3 << 5) |  6;
43   constexpr Predicate PRED_LT_PLUS  = (0 << 5) | 15;
44   constexpr Predicate PRED_LE_PLUS  = (1 << 5) |  7;
45   constexpr Predicate PRED_EQ_PLUS  = (2 << 5) | 15;
46   constexpr Predicate PRED_GE_PLUS  = (0 << 5) |  7;
47   constexpr Predicate PRED_GT_PLUS  = (1 << 5) | 15;
48   constexpr Predicate PRED_NE_PLUS  = (2 << 5) |  7;
49   constexpr Predicate PRED_UN_PLUS  = (3 << 5) | 15;
50   constexpr Predicate PRED_NU_PLUS  = (3 << 5) |  7;
51 
52   // SPE scalar compare instructions always set the GT bit.
53   constexpr Predicate PRED_SPE      = PRED_GT;
54 
55   // When dealing with individual condition-register bits, we have simple set
56   // and unset predicates.
57   constexpr Predicate PRED_BIT_SET =   1024;
58   constexpr Predicate PRED_BIT_UNSET = 1025;
59 
60   // Bit for branch taken (plus) or not-taken (minus) hint
61   using BranchHintBit = int;
62   constexpr BranchHintBit BR_NO_HINT       = 0x0;
63   constexpr BranchHintBit BR_NONTAKEN_HINT = 0x2;
64   constexpr BranchHintBit BR_TAKEN_HINT    = 0x3;
65   constexpr BranchHintBit BR_HINT_MASK     = 0X3;
66 
67   /// Invert the specified predicate.  != -> ==, < -> >=.
68   Predicate InvertPredicate(Predicate Opcode);
69 
70   /// Assume the condition register is set by MI(a,b), return the predicate if
71   /// we modify the instructions such that condition register is set by MI(b,a).
72   Predicate getSwappedPredicate(Predicate Opcode);
73 
74   /// Return the condition without hint bits.
getPredicateCondition(Predicate Opcode)75   inline unsigned getPredicateCondition(Predicate Opcode) {
76     return (unsigned)(Opcode & ~BR_HINT_MASK);
77   }
78 
79   /// Return the hint bits of the predicate.
getPredicateHint(Predicate Opcode)80   inline unsigned getPredicateHint(Predicate Opcode) {
81     return (unsigned)(Opcode & BR_HINT_MASK);
82   }
83 
84   /// Return predicate consisting of specified condition and hint bits.
getPredicate(unsigned Condition,unsigned Hint)85   inline Predicate getPredicate(unsigned Condition, unsigned Hint) {
86     return (Predicate)((Condition & ~BR_HINT_MASK) |
87                        (Hint & BR_HINT_MASK));
88   }
89 }
90 }
91 
92 #endif
93