1 /* 2 * Copyright 2012-2022 NXP 3 * 4 * Licensed under the Apache License, Version 2.0 (the "License"); 5 * you may not use this file except in compliance with the License. 6 * You may obtain a copy of the License at 7 * 8 * http://www.apache.org/licenses/LICENSE-2.0 9 * 10 * Unless required by applicable law or agreed to in writing, software 11 * distributed under the License is distributed on an "AS IS" BASIS, 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 13 * See the License for the specific language governing permissions and 14 * limitations under the License. 15 */ 16 17 #ifndef _PHNXPUCIHAL_H_ 18 #define _PHNXPUCIHAL_H_ 19 20 #include <phNxpUciHal_utils.h> 21 #include <phNxpUciHal_Adaptation.h> 22 #include <hal_nxpuwb.h> 23 #include <phTmlUwb.h> 24 #include <uci_defs.h> 25 /********************* Definitions and structures *****************************/ 26 #define MAX_RETRY_COUNT 0x05 27 #define UCI_MAX_DATA_LEN 4200 // maximum data packet size 28 #define UCI_MAX_PAYLOAD_LEN 4200 29 //#define UCI_RESPONSE_STATUS_OFFSET 0x04 30 #define UCI_PKT_HDR_LEN 0x04 31 #define UCI_PKT_PAYLOAD_STATUS_LEN 0x01 32 #define UCI_PKT_NUM_CAPS_LEN 0x01 33 #define UWB_CHANNELS 0x0B 34 35 36 37 #define MAX_RESPONSE_STATUS 0x0C 38 #define MAX_COMMAND_RETRY_COUNT 0x05 39 40 #define UCI_MT_MASK 0xE0 41 #define UCI_PBF_MASK 0x10 42 #define UCI_GID_MASK 0x0F 43 #define UCI_OID_MASK 0x3F 44 45 #define UCI_GID_RANGE_MANAGE 0x02 /* 0010b Range Management group */ 46 #define UCI_OID_RANGE_DATA_NTF 0x00 47 48 #define UCI_NTF_PAYLOAD_OFFSET 0x04 49 #define NORMAL_MODE_LENGTH_OFFSET 0x03 50 #define EXTENDED_MODE_LEN_OFFSET 0x02 51 #define EXTENDED_MODE_LEN_SHIFT 0x08 52 #define EXTND_LEN_INDICATOR_OFFSET 0x01 53 #define EXTND_LEN_INDICATOR_OFFSET_MASK 0x80 54 #define UCI_SESSION_ID_OFFSET 0x04 55 #define FWD_MAX_RETRY_COUNT 0x05 56 57 #define USER_FW_BOOT_MODE 0x01 58 #define FW_BOOT_MODE_PARAM_ID 0x04 59 60 #define EXT_CONFIG_TAG_ID 0xE3 61 #define DEVICE_NAME_PARAM_ID 0x00 62 63 #define SR1xxT 'T' 64 #define SR1xxS 'S' 65 66 /* Mem alloc. with 8 byte alignment */ 67 #define nxp_malloc(x) malloc(((x - 1) | 7) + 1) 68 69 /* FW debug and crash log path */ 70 const char debug_log_path[] = "/data/vendor/uwb/"; 71 72 /* UCI Data */ 73 #define NXP_MAX_CONFIG_STRING_LEN 260 74 typedef struct uci_data { 75 uint16_t len; 76 uint8_t p_data[UCI_MAX_DATA_LEN]; 77 } uci_data_t; 78 79 typedef enum { 80 HAL_STATUS_CLOSE = 0, 81 HAL_STATUS_OPEN 82 } phNxpUci_HalStatus; 83 84 typedef enum { 85 UWB_DEVICE_INIT = 0, 86 UWB_DEVICE_READY, 87 UWB_DEVICE_BUSY, 88 UWB_DEVICE_STATE_UNKNOWN = 0XA0, 89 UWB_DEVICE_ERROR = 0xFF 90 }phNxpUci_UwbcState; 91 92 /* Macros to enable and disable extensions */ 93 #define HAL_ENABLE_EXT() (nxpucihal_ctrl.hal_ext_enabled = 1) 94 #define HAL_DISABLE_EXT() (nxpucihal_ctrl.hal_ext_enabled = 0) 95 96 /* UCI Control structure */ 97 typedef struct phNxpUciHal_Control { 98 phNxpUci_HalStatus halStatus; /* Indicate if hal is open or closed */ 99 pthread_t client_thread; /* Integration thread handle */ 100 uint8_t thread_running; /* Thread running if set to 1, else set to 0 */ 101 phLibUwb_sConfig_t gDrvCfg; /* Driver config data */ 102 103 /* Rx data */ 104 uint8_t* p_rx_data; 105 uint16_t rx_data_len; 106 107 /* libuwb-uci callbacks */ 108 uwb_stack_callback_t* p_uwb_stack_cback; 109 uwb_stack_data_callback_t* p_uwb_stack_data_cback; 110 111 /* HAL open status */ 112 bool_t hal_open_status; 113 114 /* HAL extensions */ 115 uint8_t hal_ext_enabled; 116 117 /* Waiting semaphore */ 118 phNxpUciHal_Sem_t ext_cb_data; 119 120 phNxpUciHal_Sem_t dev_status_ntf_wait; 121 phNxpUciHal_Sem_t uwb_binding_status_ntf_wait; 122 uint16_t cmd_len; 123 uint8_t p_cmd_data[UCI_MAX_DATA_LEN]; 124 uint16_t rsp_len; 125 uint8_t p_rsp_data[UCI_MAX_DATA_LEN]; 126 uint8_t p_caps_resp[UCI_MAX_DATA_LEN]; 127 128 /* retry count used to force download */ 129 uint8_t read_retry_cnt; 130 131 bool_t isRecoveryTimerStarted; 132 /* To skip sending packets to upper layer from HAL*/ 133 uint8_t isSkipPacket; 134 bool_t fw_dwnld_mode; 135 uint8_t uwbc_device_state; 136 uint8_t dev_state_ntf_wait; 137 } phNxpUciHal_Control_t; 138 139 /* Internal messages to handle callbacks */ 140 #define UCI_HAL_OPEN_CPLT_MSG 0x411 141 #define UCI_HAL_CLOSE_CPLT_MSG 0x412 142 #define UCI_HAL_INIT_CPLT_MSG 0x413 143 #define UCI_HAL_HW_RESET_MSG 0x414 144 #define UCI_HAL_ERROR_MSG 0x415 145 146 #define UCIHAL_CMD_CODE_LEN_BYTE_OFFSET (2U) 147 #define UCIHAL_CMD_CODE_BYTE_LEN (3U) 148 149 /******************** UCI HAL exposed functions *******************************/ 150 151 tHAL_UWB_STATUS phNxpUciHal_write_unlocked(uint16_t data_len, 152 const uint8_t *p_data); 153 void phNxpUciHal_read_complete(void* pContext, 154 phTmlUwb_TransactInfo_t* pInfo); 155 tHAL_UWB_STATUS phNxpUciHal_uwb_reset(); 156 uint8_t phNxpUciHal_sendGetCoreDeviceInfo(); 157 tHAL_UWB_STATUS phNxpUciHal_applyVendorConfig(); 158 159 #endif /* _PHNXPUCIHAL_H_ */ 160