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Searched defs:RegType (Results 1 – 9 of 9) sorted by relevance

/external/sandboxed-api/sandboxed_api/sandbox2/unwind/
Dptrace_hook.cc44 using RegType = long; // NOLINT typedef
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/
DAArch64FrameLowering.cpp1910 enum RegType { GPR, FPR64, FPR128, PPR, ZPR } Type; enum
/external/swiftshader/third_party/subzero/src/
DIceTargetLoweringMIPS32.cpp1629 Type RegType; in addProlog() local
1753 Type RegType; in addEpilog() local
/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/AArch64/
DAArch64FrameLowering.cpp2501 enum RegType { GPR, FPR64, FPR128, PPR, ZPR } Type; enum
/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/Sparc/
DSparcISelLowering.cpp3509 char RegType = RegTypes[RegNo / 8]; in getRegForInlineAsmConstraint() local
/external/mesa3d/src/amd/compiler/
Daco_ir.h250 enum class RegType { enum
/external/llvm/lib/CodeGen/
DCodeGenPrepare.cpp4779 MVT RegType = TLI->getRegisterType(Context, TLI->getValueType(*DL, OldType)); in optimizeSwitchInst() local
/external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/
DCodeGenPrepare.cpp6350 MVT RegType = TLI->getRegisterType(Context, TLI->getValueType(*DL, OldType)); in optimizeSwitchInst() local
/external/swiftshader/third_party/llvm-16.0/llvm/lib/CodeGen/
DCodeGenPrepare.cpp7151 MVT RegType = TLI->getPreferredSwitchConditionType(Context, OldVT); in optimizeSwitchType() local