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/external/mesa3d/.gitlab-ci/
Drun-shader-db.sh2 set -e
4 ARTIFACTSDIR=$(pwd)/shader-db
5 mkdir -p "$ARTIFACTSDIR"
11 cd /usr/local/shader-db
14 section_start shader-db-${driver} "Running shader-db for $driver"
16 ./run -j"${FDO_CI_CONCURRENT:-4}" ./shaders \
17 > "$ARTIFACTSDIR/${driver}-shader-db.txt"
18 section_end shader-db-${driver}
21 # Run shader-db over a number of supported chipsets for nouveau
23 # section_start shader-db-nouveau-${chipset} "Running shader-db for nouveau - ${chipset}"
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/external/mesa3d/docs/drivers/
Dvc4.rst7 option as of the 2016-02-09 Raspbian release using ``raspi-config``.
19 -------------
25 --------------
30 * 4-byte index buffers.
59 front/back mode don't match, we would need to run the vertex shader in
65 -------------
68 <https://gitlab.freedesktop.org/mesa/mesa/-/issues>`__ page.
80 useful. Install `vc4-gpu-tools
81 <https://github.com/anholt/vc4-gpu-tools/>`__ and use
82 ``vc4_dump_hang_state my-app.hang``. Sometimes the hang file will
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Dpanfrost.rst6 on Mali-G52 and Mali-G57 but **non-conformant** on other GPUs. The following
36 --------
38 Panfrost's OpenGL support is a Gallium driver. Since Mali GPUs are 3D-only and
47 Build like ``meson . build/ -Dvulkan-drivers=
48 -Dgallium-drivers=panfrost -Dllvm=disabled`` for a build directory
55 ----
62 --------------------------
67 every system-on-chip with a Mali GPU support all these formats. Many lower-end
70 system-on-chip, Panfrost includes a ``panfrost_texfeatures`` tool to query
73 To use this tool, include the option ``-Dtools=panfrost`` when configuring Mesa.
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Dasahi.rst7 -----------------
12 reverse-engineering the hardware, as glue to get at the "interesting" GPU
15 The library is only built if ``-Dtools=asahi`` is passed. It builds a single
19 For example, to trace an app ``./app``, run:
24 -----------------
26 At an API level, vertex shader outputs need to be interpolated to become
27 fragment shader inputs. This process is logically pipelined in AGX, with a value
28 traveling from a vertex shader to remapping hardware to coefficient register
29 setup to the fragment shader to the iterator hardware. Each stage is described
32 Vertex shader
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Dlima.rst5 (Mali-4xx) embedded GPUs from ARM. It’s a reverse-engineered,
6 community-developed driver, and is not endorsed by ARM. Lima was
12 Mali-400 Utgard Supported
13 Mali-450 Utgard Supported
14 Mali-470 Utgard Unsupported
21 display and has little to do with display-related issues.
24 separate `display driver <#display-drivers>`__ is also required, which
29 --------------
40 are enabled by internal shader transformations.
41 Check the `known hardware limitations <#known-hardware-limitations>`__
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/external/mesa3d/src/gallium/drivers/freedreno/ir3/
Dir3_gallium.c49 * The hardware cso for shader state
55 struct ir3_shader *shader; member
64 * The only case where util_debug_message() is used in the initial-variants
67 * compile the initial shader variant asynchronously.
72 return unlikely(ctx->debug.debug_message) || FD_DBG(SHADERDB) || in initial_variants_synchronous()
85 "%s shader: %u inst, %u nops, %u non-nops, %u mov, %u cov, " in dump_shader_info()
86 "%u dwords, %u last-baryf, %u last-helper, %u half, %u full, %u constlen, " in dump_shader_info()
90 ir3_shader_stage(v), v->info.instrs_count, v->info.nops_count, in dump_shader_info()
91 v->info.instrs_count - v->info.nops_count, v->info.mov_count, in dump_shader_info()
92 v->info.cov_count, v->info.sizedwords, v->info.last_baryf, in dump_shader_info()
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/external/mesa3d/docs/
Denvvars.rst6 but they can sometimes be useful for debugging end-user issues.
9 ---------------------------
18 colon-separated list of paths to search for DRI drivers
42 -------------------------------
57 following comma-separated list of named flags, which adds extra
87 ``GL_EXT_foo -GL_EXT_bar`` will enable the ``GL_EXT_foo`` extension
95 or before year X will be reported. This is to work-around a bug in
96 some games where the extension string is copied into a fixed-size
98 buffer overrun can cause the game to crash. This is a work-around for
106 - The format should be ``MAJOR.MINOR[FC|COMPAT]``
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/external/mesa3d/.gitlab-ci/build/
Dgitlab-ci.yml2 .build-common:
3 extends: .container+build-rules
6 # Build jobs don't take more than 1-3 minutes. 5-8 min max on a fresh runner
18 - _build/meson-logs/*.txt
19 - _build/meson-logs/strace
20 - shader-db
21 - artifacts
24 .build-linux:
25 extends: .build-common
32 - !reference [default, before_script]
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/external/mesa3d/docs/relnotes/
D19.1.3.rst16 ----------------
20 845460b2225d15c15d4a9743dec798ff0b7396b533011d43e774e67f7825b7e0 mesa-19.1.3.tar.xz
23 ------------
28 ---------
30 - `Bug 109203 <https://bugs.freedesktop.org/show_bug.cgi?id=109203>`__
31 - [cfl dxvk] GPU Crash Launching Monopoly Plus (Iris Plus 655 / Wine
33 - `Bug 109524 <https://bugs.freedesktop.org/show_bug.cgi?id=109524>`__
34 - "Invalid glsl version in shading_language_version()" when trying to
35 run directX games using wine
36 - `Bug 110309 <https://bugs.freedesktop.org/show_bug.cgi?id=110309>`__
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D23.1.0.rst1 Mesa 23.1.0 Release Notes / 2023-05-10
20 ---------------
24 a9dde3c76571c4806245a05bda1cceee347c3267127e9e549e4f4e225d92e992 mesa-23.1.0.tar.xz
28 ------------
30 - VK_EXT_pipeline_library_group_handles on RADV
31 - VK_EXT_image_sliced_view_of_3d on RADV/GFX10+
32 - VK_KHR_map_memory2 on ANV and RADV
33 - fullyCoveredFragmentShaderInputVariable on RADV/GFX9+
34 - VK_EXT_discard_rectangles version 2 on RADV
35 - VK_EXT_graphics_pipeline_library on RADV
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D23.1.6.rst1 Mesa 23.1.6 Release Notes / 2023-08-16
18 ---------------
22 f4c7fd8e7b472a88da7d83e9a48f6f3bd17d4ea2cc4386f7231b796f3964157a mesa-23.1.6.tar.xz
26 ------------
28 - None
32 ---------
34 - nouveau prevents hardware acceleration with Chromium (Wayland)
35 - Corrupt text rendering in Blender
36 - DRI2 gallium frontend is using bad format type
37 - Incorrect vlVaCreateBuffer/vlVaMapBuffer behavior for buffer type VAEncCodedBufferType in Gallium
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D23.2.1.rst1 Mesa 23.2.1 Release Notes / 2023-09-28
23 ---------------
27 64de0616fc2d801f929ab1ac2a4f16b3e2783c4309a724c8a259b20df8bbc1cc mesa-23.2.1.tar.xz
32 ------------
34 - VK_EXT_attachment_feedback_loop_dynamic_state on RADV
36 - extendedDynamicState3SampleLocationsEnable on RADV
38 - VK_EXT_dynamic_rendering_unused_attachments on RADV
40 - VK_EXT_mesh_shader on lavapipe
42 - OpenGL 3.1 on Asahi
44 - OpenGL ES 3.0 on Asahi
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D21.0.0.rst1 Mesa 21.0.0 Release Notes / 2021-03-11
20 ---------------
24 e6204e98e6a8d77cf9dc5d34f99dd8e3ef7144f3601c808ca0dd26ba522e0d84 mesa-21.0.0.tar.xz
28 ------------
30 - GL_EXT_demote_to_helper_invocation on radeonsi
32 - GL_NV_compute_shader_derivatives on radeonsi
34 - EGL_MESA_platform_xcb
36 - Removed GL_NV_point_sprite for classic swrast.
38 - driconf: remove glx_disable_oml_sync_control, glx_disable_sgi_video_sync, and glx_disable_ext_buf…
40 - Removed support for loading DRI drivers older than Mesa 8.0, including all DRI1 support
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D21.1.0.rst1 Mesa 21.1.0 Release Notes / 2021-05-05
20 ---------------
24 0128f10e22970d3aed3d1034003731f94623015cd9797c07151417649c1b1ff8 mesa-21.1.0.tar.xz
28 ------------
30 - VK_KHR_workgroup_memory_explicit_layout on Intel, RADV
32 - DRM format modifiers for AMD.
34 - VK_KHR_zero_initialize_workgroup_memory on Intel, RADV
36 - Zink exposes GL 4.6 and ES 3.1
38 - GL_EXT_depth_bounds_test on softpipe, zink
40 - GL_EXT_texture_filter_minmax on nvc0 (gm200+)
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D20.0.0.rst1 Mesa 20.0.0 Release Notes / 2020-02-19
21 ---------------
25 bb6db3e54b608d2536d4000b3de7dd3ae115fc114e8acbb5afff4b3bbed04b34 mesa-20.0.0.tar.xz
28 ------------
30 - OpenGL 4.6 on radeonsi.
31 - GL_ARB_gl_spirv on radeonsi.
32 - GL_ARB_spirv_extensions on radeonsi.
33 - GL_EXT_direct_state_access for compatibility profile.
34 - VK_AMD_device_coherent_memory on RADV.
35 - VK_AMD_mixed_attachment_samples on RADV.
[all …]
D22.3.0.rst1 Mesa 22.3.0 Release Notes / 2022-12-02
20 ---------------
24 644bf936584548c2b88762111ad58b4aa3e4688874200e5a4eb74e53ce301746 mesa-22.3.0.tar.xz
28 ------------
30 - GL_ARB_shader_clock on llvmpipe
31 - VK_KHR_shader_clock on lavapipe
32 - Mesa-DB, the new single file cache type
33 - VK_EXT_attachment_feedback_loop_layout on RADV, lavapipe
34 - VK_KHR_global_priority on RADV
35 - GL_KHR_blend_equation_advanced_coherent on zink
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/external/mesa3d/src/compiler/glsl/glcpp/
Dpp.c35 parser->error = 1; in glcpp_error()
36 _mesa_string_buffer_printf(parser->info_log, in glcpp_error()
39 locp->source, in glcpp_error()
40 locp->first_line, in glcpp_error()
41 locp->first_column); in glcpp_error()
43 _mesa_string_buffer_vprintf(parser->info_log, fmt, ap); in glcpp_error()
45 _mesa_string_buffer_append_char(parser->info_log, '\n'); in glcpp_error()
53 _mesa_string_buffer_printf(parser->info_log, in glcpp_warning()
56 locp->source, in glcpp_warning()
57 locp->first_line, in glcpp_warning()
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/external/mesa3d/src/gallium/drivers/vc4/
Dvc4_context.h37 #include "drm-uapi/vc4_drm.h"
118 /** A name for this program, so you can track it in shader-db output. */
120 /** How many variants of this program were compiled, for shader-db. */
127 * Array of the meanings of the VPM inputs this shader needs.
143 * VC4_DIRTY_* flags that, when set in vc4->dirty, mean that the
144 * uniforms have to be rewritten (and therefore the shader state
155 * failure. In this case, we have no shader to run and should not try
164 /* Byte offsets for the start of the vertex attributes 0-7, and the
196 /* Hash table key for vc4->jobs */
280 uint32_t clear_depth; /**< 24-bit unorm depth */
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/external/crosvm/src/crosvm/sys/linux/
Dgpu.rs2 // Use of this source code is governed by a BSD-style license that can be
32 ) -> GpuCacheInfo<'a> { in get_gpu_cache_info()
39 warn!("shader caching dir {} does not exist", cache_dir); in get_gpu_cache_info()
40 // Deprecated in https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15390 in get_gpu_cache_info()
45 warn!("shader caching not yet supported on ARM with sandbox enabled"); in get_gpu_cache_info()
46 // Deprecated in https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15390 in get_gpu_cache_info()
53 // Deprecated in https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15390 in get_gpu_cache_info()
71 // Deprecated in https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15390 in get_gpu_cache_info()
93 ) -> DeviceResult { in create_gpu_device()
113 // - is_sandboxed implies that blob mapping will be done out-of-process by the crosvm in create_gpu_device()
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/external/mesa3d/src/intel/vulkan/
DgenX_simple_shader.c38 assert(state->cmd_buffer == NULL || in genX()
39 state->cmd_buffer->state.current_pipeline == _3D); in genX()
41 struct anv_batch *batch = state->batch; in genX()
42 struct anv_device *device = state->device; in genX()
44 brw_wm_prog_data_const(state->kernel->prog_data); in genX()
53 * Find more about how to set up a 3D pipeline with a fragment shader but in genX()
54 * without a vertex shader in blorp_emit_vertex_elements() in in genX()
103 * allocate space for the VS. Even though one isn't run, we need VUEs to in genX()
110 genX(emit_l3_config)(batch, device, state->l3_config); in genX()
112 state->cmd_buffer->state.current_l3_config = state->l3_config; in genX()
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/external/mesa3d/src/gfxstream/
D.gitignore4 /config-devices.*
5 /config-all-devices.*
6 /config-all-disas.*
7 /config-host.*
8 /config-target.*
10 /config-temp
11 /trace-events-all
12 /trace/generated-events.h
13 /trace/generated-events.c
14 /trace/generated-helpers-wrappers.h
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/external/mesa3d/src/intel/vulkan_hasvk/
Danv_pipeline.c30 #include "util/mesa-sha1.h"
54 const struct anv_physical_device *pdevice = device->physical; in anv_shader_stage_to_nir()
55 const struct anv_instance *instance = pdevice->instance; in anv_shader_stage_to_nir()
56 const struct elk_compiler *compiler = pdevice->compiler; in anv_shader_stage_to_nir()
57 gl_shader_stage stage = vk_to_mesa_shader_stage(stage_info->stage); in anv_shader_stage_to_nir()
59 compiler->nir_options[stage]; in anv_shader_stage_to_nir()
70 .float16 = pdevice->info.ver >= 8, in anv_shader_stage_to_nir()
71 .float32_atomic_add = pdevice->info.has_lsc, in anv_shader_stage_to_nir()
72 .float32_atomic_min_max = pdevice->info.ver >= 9, in anv_shader_stage_to_nir()
73 .float64 = pdevice->info.ver >= 8, in anv_shader_stage_to_nir()
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/external/mesa3d/src/gallium/drivers/radeonsi/
Dsi_pipe.h5 * SPDX-License-Identifier: MIT
37 * be a commonly-used one.
47 /* Tunables for compute-based clear_buffer and copy_buffer: */
50 /* L2 LRU is recommended because the compute shader can finish sooner due to fewer L2 evictions. */
59 /* Scalar cache. (GFX6-9: scalar L1; GFX10: scalar L0)
60 * GFX10: This also invalidates the L1 shader array cache. */
62 /* Vector cache. (GFX6-9: vector L1; GFX10: vector L0)
63 * GFX10: This also invalidates the L1 shader array cache. */
66 * GFX6-8: Used by shaders only. GFX9-10: Used by everything. */
68 /* L2 writeback (write dirty L2 lines to memory for non-L2 clients).
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Dsi_state_draw.c18 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
63 * LS.LDS_SIZE is shared by all 3 shader stages.
65 * The information about LDS and other non-compile-time parameters is then
71 struct radeon_cmdbuf *cs = sctx->gfx_cs; in si_emit_derived_tess_state()
74 /* The TES pointer will only be used for sctx->last_tcs. in si_emit_derived_tess_state()
77 sctx->tcs_shader.cso ? sctx->tcs_shader.cso : sctx->tes_shader.cso; in si_emit_derived_tess_state()
78 unsigned tess_uses_primid = sctx->ia_multi_vgt_param_key.u.tess_uses_prim_id; in si_emit_derived_tess_state()
79 bool has_primid_instancing_bug = sctx->chip_class == GFX6 && sctx->screen->info.max_se == 1; in si_emit_derived_tess_state()
80 unsigned tes_sh_base = sctx->shader_pointers.sh_base[PIPE_SHADER_TESS_EVAL]; in si_emit_derived_tess_state()
81 unsigned num_tcs_input_cp = info->vertices_per_patch; in si_emit_derived_tess_state()
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/external/mesa3d/src/mesa/main/
Dconsts_exts.h2 * Mesa 3-D graphics library
4 * Copyright (C) 1999-2008 Brian Paul All Rights Reserved.
303 * By default, the value is equal to ctx->Version. This changes to ~0
314 /** Driver-selectable options: */
357 * - preferring DP4 instructions (rather than MUL/MAD) for
362 /** Clamp UBO and SSBO block indices so they don't go out-of-bounds. */
375 * Precision info for shader datatypes. See glGetShaderPrecisionFormat().
397 GLuint MaxAddressOffset; /**< [-MaxAddressOffset, MaxAddressOffset-1] */
414 * \name Per-stage input / output limits
420 * Starting with OpenGL 3.2, the limits are advertised with per-stage
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