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/art/compiler/utils/riscv64/
Djni_macro_assembler_riscv64.h62 void Store(FrameOffset offs, ManagedRegister src, size_t size) override;
63 void Store(ManagedRegister base, MemberOffset offs, ManagedRegister src, size_t size) override;
64 void StoreRawPtr(FrameOffset offs, ManagedRegister src) override;
65 void StoreStackPointerToThread(ThreadOffset64 offs, bool tag_sp) override;
68 void Load(ManagedRegister dest, FrameOffset offs, size_t size) override;
69 void Load(ManagedRegister dest, ManagedRegister base, MemberOffset offs, size_t size) override;
70 void LoadRawPtrFromThread(ManagedRegister dest, ThreadOffset64 offs) override;
73 MemberOffset offs) override;
74 void LoadStackReference(ManagedRegister dest, FrameOffset offs) override;
Djni_macro_assembler_riscv64.cc158 void Riscv64JNIMacroAssembler::Store(FrameOffset offs, ManagedRegister m_src, size_t size) { in Store() argument
159 Store(Riscv64ManagedRegister::FromXRegister(SP), MemberOffset(offs.Int32Value()), m_src, size); in Store()
163 MemberOffset offs, in Store() argument
170 __ Storew(src.AsXRegister(), base.AsXRegister(), offs.Int32Value()); in Store()
173 __ Stored(src.AsXRegister(), base.AsXRegister(), offs.Int32Value()); in Store()
178 __ FStorew(src.AsFRegister(), base.AsXRegister(), offs.Int32Value()); in Store()
181 __ FStored(src.AsFRegister(), base.AsXRegister(), offs.Int32Value()); in Store()
186 void Riscv64JNIMacroAssembler::StoreRawPtr(FrameOffset offs, ManagedRegister m_src) { in StoreRawPtr() argument
188 Store(sp, MemberOffset(offs.Int32Value()), m_src, static_cast<size_t>(kRiscv64PointerSize)); in StoreRawPtr()
191 void Riscv64JNIMacroAssembler::StoreStackPointerToThread(ThreadOffset64 offs, bool tag_sp) { in StoreStackPointerToThread() argument
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/art/compiler/utils/
Djni_macro_assembler.cc107 MemberOffset offs) { in LoadGcRootWithoutReadBarrier() argument
109 Load(dest, base, offs, sizeof(uint32_t)); in LoadGcRootWithoutReadBarrier()
115 MemberOffset offs);
119 MemberOffset offs);
122 void JNIMacroAssembler<kPointerSize>::LoadStackReference(ManagedRegister dest, FrameOffset offs) { in LoadStackReference() argument
124 Load(dest, offs, sizeof(uint32_t)); in LoadStackReference()
129 FrameOffset offs);
132 FrameOffset offs);
Djni_macro_assembler.h119 virtual void Store(FrameOffset offs, ManagedRegister src, size_t size) = 0;
120 virtual void Store(ManagedRegister base, MemberOffset offs, ManagedRegister src, size_t size) = 0;
131 virtual void Load(ManagedRegister dest, ManagedRegister base, MemberOffset offs, size_t size) = 0;
132 virtual void LoadRawPtrFromThread(ManagedRegister dest, ThreadOffset<kPointerSize> offs) = 0;
138 MemberOffset offs);
142 virtual void LoadStackReference(ManagedRegister dest, FrameOffset offs);
/art/runtime/
Doffsets.cc23 std::ostream& operator<<(std::ostream& os, const Offset& offs) { in operator <<() argument
24 return os << offs.Int32Value(); in operator <<()
Doffsets.h67 std::ostream& operator<<(std::ostream& os, const Offset& offs);
/art/compiler/utils/x86/
Djni_macro_assembler_x86.cc133 void X86JNIMacroAssembler::Store(FrameOffset offs, ManagedRegister msrc, size_t size) { in Store() argument
134 Store(X86ManagedRegister::FromCpuRegister(ESP), MemberOffset(offs.Int32Value()), msrc, size); in Store()
138 MemberOffset offs, in Store() argument
147 __ movl(Address(base.AsCpuRegister(), offs), src.AsCpuRegister()); in Store()
150 __ movl(Address(base.AsCpuRegister(), offs), src.AsRegisterPairLow()); in Store()
151 __ movl(Address(base.AsCpuRegister(), FrameOffset(offs.Int32Value()+4)), in Store()
155 __ fstps(Address(base.AsCpuRegister(), offs)); in Store()
157 __ fstpl(Address(base.AsCpuRegister(), offs)); in Store()
162 __ movss(Address(base.AsCpuRegister(), offs), src.AsXmmRegister()); in Store()
164 __ movsd(Address(base.AsCpuRegister(), offs), src.AsXmmRegister()); in Store()
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Djni_macro_assembler_x86.h60 void Store(FrameOffset offs, ManagedRegister src, size_t size) override;
61 void Store(ManagedRegister base, MemberOffset offs, ManagedRegister src, size_t size) override;
68 void Load(ManagedRegister dest, ManagedRegister base, MemberOffset offs, size_t size) override;
70 void LoadRawPtrFromThread(ManagedRegister dest, ThreadOffset32 offs) override;
/art/compiler/utils/x86_64/
Djni_macro_assembler_x86_64.h61 void Store(FrameOffset offs, ManagedRegister src, size_t size) override;
62 void Store(ManagedRegister base, MemberOffset offs, ManagedRegister src, size_t size) override;
69 void Load(ManagedRegister dest, ManagedRegister base, MemberOffset offs, size_t size) override;
71 void LoadRawPtrFromThread(ManagedRegister dest, ThreadOffset64 offs) override;
Djni_macro_assembler_x86_64.cc162 void X86_64JNIMacroAssembler::Store(FrameOffset offs, ManagedRegister msrc, size_t size) { in Store() argument
163 Store(X86_64ManagedRegister::FromCpuRegister(RSP), MemberOffset(offs.Int32Value()), msrc, size); in Store()
167 MemberOffset offs, in Store() argument
177 __ movl(Address(base.AsCpuRegister(), offs), src.AsCpuRegister()); in Store()
180 __ movq(Address(base.AsCpuRegister(), offs), src.AsCpuRegister()); in Store()
184 __ fstps(Address(base.AsCpuRegister(), offs)); in Store()
186 __ fstpl(Address(base.AsCpuRegister(), offs)); in Store()
191 __ movss(Address(base.AsCpuRegister(), offs), src.AsXmmRegister()); in Store()
193 __ movsd(Address(base.AsCpuRegister(), offs), src.AsXmmRegister()); in Store()
221 MemberOffset offs, in Load() argument
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/art/compiler/utils/arm/
Djni_macro_assembler_arm_vixl.h63 void Store(FrameOffset offs, ManagedRegister src, size_t size) override;
64 void Store(ManagedRegister base, MemberOffset offs, ManagedRegister src, size_t size) override;
71 void Load(ManagedRegister dest, ManagedRegister base, MemberOffset offs, size_t size) override;
73 void LoadRawPtrFromThread(ManagedRegister dest, ThreadOffset32 offs) override;
Djni_macro_assembler_arm_vixl.cc274 MemberOffset offs, in Store() argument
285 asm_.StoreToOffset(kStoreWord, AsVIXLRegister(src), AsVIXLRegister(base), offs.Int32Value()); in Store()
290 MemOperand(AsVIXLRegister(base), offs.Int32Value())); in Store()
293 asm_.StoreSToOffset(AsVIXLSRegister(src), AsVIXLRegister(base), offs.Int32Value()); in Store()
297 asm_.StoreDToOffset(AsVIXLDRegister(src), AsVIXLRegister(base), offs.Int32Value()); in Store()
314 MemberOffset offs, in Load() argument
316 return Load(m_dst.AsArm(), AsVIXLRegister(m_base.AsArm()), offs.Int32Value(), size); in Load()
320 void ArmVIXLJNIMacroAssembler::LoadRawPtrFromThread(ManagedRegister mdest, ThreadOffset32 offs) { in LoadRawPtrFromThread() argument
324 asm_.LoadFromOffset(kLoadWord, dest, tr, offs.Int32Value()); in LoadRawPtrFromThread()
/art/compiler/utils/arm64/
Djni_macro_assembler_arm64.h69 void Store(FrameOffset offs, ManagedRegister src, size_t size) override;
70 void Store(ManagedRegister base, MemberOffset offs, ManagedRegister src, size_t size) override;
76 void Load(ManagedRegister dest, ManagedRegister base, MemberOffset offs, size_t size) override;
77 void LoadRawPtrFromThread(ManagedRegister dest, ThreadOffset64 offs) override;
Dassembler_arm64.cc88 void Arm64Assembler::LoadRawPtr(ManagedRegister m_dst, ManagedRegister m_base, Offset offs) { in LoadRawPtr() argument
95 ___ Ldr(reg_x(dst.AsXRegister()), MEM_OP(reg_x(base.AsXRegister()), offs.Int32Value())); in LoadRawPtr()
98 void Arm64Assembler::JumpTo(ManagedRegister m_base, Offset offs, ManagedRegister m_scratch) { in JumpTo() argument
106 ___ Ldr(reg_x(scratch.AsXRegister()), MEM_OP(reg_x(base.AsXRegister()), offs.Int32Value())); in JumpTo()
Djni_macro_assembler_arm64.cc171 void Arm64JNIMacroAssembler::Store(FrameOffset offs, ManagedRegister m_src, size_t size) { in Store() argument
172 Store(Arm64ManagedRegister::FromXRegister(SP), MemberOffset(offs.Int32Value()), m_src, size); in Store()
176 MemberOffset offs, in Store() argument
185 StoreWToOffset(kStoreWord, src.AsWRegister(), base.AsXRegister(), offs.Int32Value()); in Store()
188 StoreToOffset(src.AsXRegister(), base.AsXRegister(), offs.Int32Value()); in Store()
190 StoreSToOffset(src.AsSRegister(), base.AsXRegister(), offs.Int32Value()); in Store()
193 StoreDToOffset(src.AsDRegister(), base.AsXRegister(), offs.Int32Value()); in Store()
197 void Arm64JNIMacroAssembler::StoreRawPtr(FrameOffset offs, ManagedRegister m_src) { in StoreRawPtr() argument
200 StoreToOffset(src.AsXRegister(), SP, offs.Int32Value()); in StoreRawPtr()
306 MemberOffset offs, in Load() argument
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Dassembler_arm64.h96 void LoadRawPtr(ManagedRegister dest, ManagedRegister base, Offset offs);
124 void JumpTo(ManagedRegister m_base, Offset offs, ManagedRegister m_scratch);