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1/*
2 * Copyright (C) 2023 The Android Open Source Project
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *  * Redistributions of source code must retain the above copyright
9 *    notice, this list of conditions and the following disclaimer.
10 *  * Redistributions in binary form must reproduce the above copyright
11 *    notice, this list of conditions and the following disclaimer in
12 *    the documentation and/or other materials provided with the
13 *    distribution.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
16 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
17 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
18 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
19 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
21 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
22 * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
23 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
24 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
25 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
27 */
28/*
29 * Copyright (c) 2023 SiFive, Inc.
30 * All rights reserved.
31 *
32 * Redistribution and use in source and binary forms, with or without
33 * modification, are permitted provided that the following conditions
34 * are met:
35 * 1. Redistributions of source code must retain the above copyright
36 *    notice, this list of conditions and the following disclaimer.
37 * 2. Redistributions in binary form must reproduce the above copyright
38 *    notice, this list of conditions and the following disclaimer in the
39 *    documentation and/or other materials provided with the distribution.
40 * 3. The name of the company may not be used to endorse or promote
41 *    products derived from this software without specific prior written
42 *    permission.
43 *
44 * THIS SOFTWARE IS PROVIDED BY SIFIVE INC ``AS IS'' AND ANY EXPRESS OR IMPLIED
45 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
46 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
47 * IN NO EVENT SHALL SIFIVE INC BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
48 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
49 * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
50 * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
51 * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
52 * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
53 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
54 */
55
56#include <private/bionic_asm.h>
57
58#define iResult a0
59
60#define pStr1 a0
61#define pStr2 a1
62
63#define iVL a2
64#define iTemp1 a3
65#define iTemp2 a4
66#define iLMUL1 a5
67#define iLMUL2 a6
68#define iLMUL4 a7
69
70#define iLMUL t0
71
72#define vStr1 v0
73#define vStr2 v8
74#define vMask1 v16
75#define vMask2 v17
76
77ENTRY(strcmp_v)
78
79    # increase the lmul using the following sequences:
80    # 1/2, 1/2, 1, 2, 4, 4, 4, ...
81
82    # lmul=1/2
83    vsetvli iVL, zero, e8, mf2, ta, ma
84
85    vle8ff.v vStr1, (pStr1)
86     # check if vStr1[i] == 0
87    vmseq.vx vMask1, vStr1, zero
88
89    vle8ff.v vStr2, (pStr2)
90    # check if vStr1[i] != vStr2[i]
91    vmsne.vv vMask2, vStr1, vStr2
92
93    # find the index x for vStr1[x]==0
94    vfirst.m iTemp1, vMask1
95    # find the index x for vStr1[x]!=vStr2[x]
96    vfirst.m iTemp2, vMask2
97
98    bgez iTemp1, L(check1)
99    bgez iTemp2, L(check2)
100
101    # get the current vl updated by vle8ff.
102    csrr iVL, vl
103    add pStr1, pStr1, iVL
104    add pStr2, pStr2, iVL
105
106    vsetvli iVL, zero, e8, mf2, ta, ma
107    addi iLMUL1, zero, 1
108    addi iLMUL, zero, 1
109    j L(loop)
110L(m1):
111    vsetvli iVL, zero, e8, m1, ta, ma
112    addi iLMUL2, zero, 2
113    addi iLMUL, zero, 2
114    j L(loop)
115L(m2):
116    vsetvli iVL, zero, e8, m2, ta, ma
117    addi iLMUL4, zero, 4
118    addi iLMUL, zero, 4
119    j L(loop)
120L(m4):
121    vsetvli iVL, zero, e8, m4, ta, ma
122
123L(loop):
124    vle8ff.v vStr1, (pStr1)
125    vmseq.vx vMask1, vStr1, zero
126
127    vle8ff.v vStr2, (pStr2)
128    vmsne.vv vMask2, vStr1, vStr2
129
130    vfirst.m iTemp1, vMask1
131    vfirst.m iTemp2, vMask2
132
133    bgez iTemp1, L(check1)
134    bgez iTemp2, L(check2)
135
136    csrr iVL, vl
137    add pStr1, pStr1, iVL
138    add pStr2, pStr2, iVL
139
140    beq iLMUL, iLMUL1, L(m1)
141    beq iLMUL, iLMUL2, L(m2)
142    beq iLMUL, iLMUL4, L(m4)
143    j L(loop)
144
145    // iTemp1>=0
146L(check1):
147    bltz iTemp2, 1f
148    blt iTemp2, iTemp1, L(check2)
1491:
150    // iTemp2<0
151    // iTemp2>=0 && iTemp1<iTemp2
152    add pStr1, pStr1, iTemp1
153    add pStr2, pStr2, iTemp1
154    lbu iTemp1, 0(pStr1)
155    lbu iTemp2, 0(pStr2)
156    sub iResult, iTemp1, iTemp2
157    ret
158
159    // iTemp1<0
160    // iTemp2>=0
161L(check2):
162    add pStr1, pStr1, iTemp2
163    add pStr2, pStr2, iTemp2
164    lbu iTemp1, 0(pStr1)
165    lbu iTemp2, 0(pStr2)
166    sub iResult, iTemp1, iTemp2
167    ret
168
169END(strcmp_v)
170